公开(公告)号：US20160365323A1

公开(公告)日：2016-12-15

申请号：US15247393

申请日：2016-08-25

Applicant: Freescale Semiconductor, Inc.

Inventor： Lakshminarayan Viswanathan ,  Jaynal A. Molla

IPC: H01L23/00 ,  H01L29/16 ,  H01L21/48 ,  H01L23/48 ,  H01L23/495 ,  H01L21/78 ,  H01L29/20 ,  H01L23/66

CPC classification number: H01L24/83 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/741 ,  H01L24/743 ,  H01L24/92 ,  H01L24/94 ,  H01L29/16 ,  H01L29/2003 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/03002 ,  H01L2224/03312 ,  H01L2224/0332 ,  H01L2224/03436 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03505 ,  H01L2224/04026 ,  H01L2224/05009 ,  H01L2224/05018 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05551 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/05864 ,  H01L2224/05887 ,  H01L2224/0589 ,  H01L2224/05893 ,  H01L2224/27002 ,  H01L2224/2731 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/27436 ,  H01L2224/27438 ,  H01L2224/27505 ,  H01L2224/29006 ,  H01L2224/29011 ,  H01L2224/29012 ,  H01L2224/29015 ,  H01L2224/29017 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29117 ,  H01L2224/29118 ,  H01L2224/2912 ,  H01L2224/29124 ,  H01L2224/29138 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/2918 ,  H01L2224/29184 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29387 ,  H01L2224/2939 ,  H01L2224/29393 ,  H01L2224/29499 ,  H01L2224/296 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/741 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83815 ,  H01L2224/8384 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/1016 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1421 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/3512 ,  H01L2224/27 ,  H01L2224/11 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/01015 ,  H01L2924/01048 ,  H01L2924/01014 ,  H01L2924/01032 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01028 ,  H01L2924/01027 ,  H01L2924/01026 ,  H01L2224/03 ,  H01L2224/05099 ,  H01L2924/01006 ,  H01L2924/04642 ,  H01L2924/0503 ,  H01L2924/01005 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2221/68304 ,  H01L21/304 ,  H01L2224/83 ,  H01L2924/0781 ,  H01L2924/00 ,  H01L2224/034 ,  H01L2221/68368 ,  H01L2224/274

Abstract: An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a conductive layer underlying the sintered metallic layer, and a conductive substrate underlying the conductive layer.

Abstract translation: 电子器件包括具有下表面的半导体管芯，位于半导体管芯的下表面下方的烧结金属层，位于烧结金属层下面的导电层，以及导电层下面的导电基底。

公开(公告)号：US20160282388A1

公开(公告)日：2016-09-29

申请号：US15179147

申请日：2016-06-10

Applicant: Allegro Microsystems, LLC

Inventor： Shaun D. Milano ,  Shixi Louis Liu

IPC: G01R15/20 ,  H01L43/04 ,  G01R19/00 ,  H01L43/06 ,  H01L43/08 ,  H01L43/12 ,  H01L23/495 ,  H01L23/00

CPC classification number: G01R15/20 ,  G01R15/202 ,  G01R15/207 ,  G01R19/0092 ,  G01R33/0052 ,  G01R33/07 ,  G01R33/09 ,  H01L21/4828 ,  H01L23/49506 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49558 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L43/02 ,  H01L43/04 ,  H01L43/065 ,  H01L43/08 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16245 ,  H01L2224/29084 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73103 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/07025 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/10332 ,  H01L2924/15162 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/07802 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A current sensor integrated circuit includes a lead frame having a primary conductor and at least one secondary lead, a semiconductor die disposed adjacent to the primary conductor, an insulation structure disposed between the primary conductor and the semiconductor die, and a non-conductive insulative material enclosing the semiconductor die, the insulation structure, a first portion of the primary conductor, and a first portion of the at least one secondary lead to form a package. The first portion of the at least one secondary lead (between a first end proximal to the primary conductor and a second end proximal to the second, exposed portion of the at least one secondary lead) has a thickness that is less than a thickness of the second, exposed portion of the least one secondary lead. A distance between the second, exposed portion of the primary conductor and the second, exposed portion of the at least one secondary lead is at least 7.2 mm.

Abstract translation: 电流传感器集成电路包括具有主导体和至少一个次级引线的引线框架，与主导体相邻设置的半导体管芯，设置在主导体和半导体管芯之间的绝缘结构，以及非导电绝缘材料 封装半导体管芯，绝缘结构，初级导体的第一部分和至少一个次级引线的第一部分以形成封装。 至少一个次级引线的第一部分（在靠近主导体的第一端和靠近至少一个次级引线的第二暴露部分的第二端之间）具有的厚度小于 第二，至少一个次级引线的暴露部分。 主导体的第二暴露部分和至少一个次级引线的第二暴露部分之间的距离为至少7.2mm。

公开(公告)号：US09324674B2

公开(公告)日：2016-04-26

申请号：US14562129

申请日：2014-12-05

Applicant: NXP B.V.

Inventor： Johannes Wilhelmus van Rijckevorsel ,  Emiel de Bruin

IPC: H01L23/482 ,  H01L23/00 ,  H01L23/66

CPC classification number: H01L24/29 ,  H01L23/4827 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/32 ,  H01L24/83 ,  H01L2223/6644 ,  H01L2224/03825 ,  H01L2224/03826 ,  H01L2224/05026 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2224/2745 ,  H01L2224/2746 ,  H01L2224/27464 ,  H01L2224/29084 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/32245 ,  H01L2224/32502 ,  H01L2224/83203 ,  H01L2224/83207 ,  H01L2224/83444 ,  H01L2224/83805 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/1421 ,  H01L2924/15747 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/01014

Abstract: A die comprising a body of semiconductor material, said body configured to receive a solder layer of gold containing alloy for use in die bonding said die to a substrate, wherein the die includes an interface layer on a surface of the body for receiving the solder layer, the interface layer having a plurality of sub-layers of different metals.

Abstract translation: 一种包括半导体材料体的芯片，所述主体被配置为接收用于将所述裸片接合到基板的用于将所述裸片接合的含金合金的焊料层，其中所述管芯包括在所述主体的表面上用于接纳焊料层的界面层 ，界面层具有多个不同金属的子层。

公开(公告)号：US20160099199A1

公开(公告)日：2016-04-07

申请号：US14508645

申请日：2014-10-07

Applicant: Lakshminarayan Viswanathan ,  Jaynal A. Molla

Inventor： Lakshminarayan Viswanathan ,  Jaynal A. Molla

IPC: H01L23/495

CPC classification number: H01L23/3114 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/741 ,  H01L24/743 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/03002 ,  H01L2224/03312 ,  H01L2224/0332 ,  H01L2224/03436 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03505 ,  H01L2224/04026 ,  H01L2224/05009 ,  H01L2224/05018 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05551 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/05864 ,  H01L2224/05887 ,  H01L2224/0589 ,  H01L2224/05893 ,  H01L2224/27002 ,  H01L2224/2731 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/27436 ,  H01L2224/27438 ,  H01L2224/27505 ,  H01L2224/29006 ,  H01L2224/29011 ,  H01L2224/29012 ,  H01L2224/29015 ,  H01L2224/29017 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29117 ,  H01L2224/29118 ,  H01L2224/2912 ,  H01L2224/29124 ,  H01L2224/29138 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2918 ,  H01L2224/29184 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29387 ,  H01L2224/2939 ,  H01L2224/29393 ,  H01L2224/29499 ,  H01L2224/296 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/741 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83815 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/1016 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1421 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/3512 ,  H01L2224/27 ,  H01L2224/11 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/01015 ,  H01L2924/01048 ,  H01L2924/01014 ,  H01L2924/01032 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01028 ,  H01L2924/01027 ,  H01L2924/01026 ,  H01L2224/03 ,  H01L2224/05099 ,  H01L2924/01006 ,  H01L2924/04642 ,  H01L2924/0503 ,  H01L2924/01005 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2221/68304 ,  H01L21/304 ,  H01L21/78 ,  H01L2224/83 ,  H01L2924/0781 ,  H01L2924/00 ,  H01L2224/034 ,  H01L2221/68368 ,  H01L2224/274

Abstract: An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a thermally conductive flow layer underlying the sintered metallic layer, and a thermally conductive substrate underlying the thermally conductive flow layer.

Abstract translation: 电子器件包括具有下表面的半导体管芯，位于半导体管芯的下表面下方的烧结金属层，在烧结金属层下面的导热流动层，以及位于导热流动层下面的导热基底。

公开(公告)号：US09171819B2

公开(公告)日：2015-10-27

申请号：US14511158

申请日：2014-10-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cheol-woo Lee ,  Ji-han Ko

IPC: H01L23/52 ,  H01L23/00

CPC classification number: H01L24/32 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49575 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/06135 ,  H01L2224/27003 ,  H01L2224/27436 ,  H01L2224/29082 ,  H01L2224/29084 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/3201 ,  H01L2224/32013 ,  H01L2224/32014 ,  H01L2224/32053 ,  H01L2224/32056 ,  H01L2224/32058 ,  H01L2224/32059 ,  H01L2224/32105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45169 ,  H01L2224/45184 ,  H01L2224/45565 ,  H01L2224/456 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/4886 ,  H01L2224/48866 ,  H01L2224/48881 ,  H01L2224/48884 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83201 ,  H01L2224/83856 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/8546 ,  H01L2224/92147 ,  H01L2224/92165 ,  H01L2224/92242 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/06 ,  H01L2924/10161 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10333 ,  H01L2924/10335 ,  H01L2924/13091 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/14511 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/35 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0635 ,  H01L2924/0665 ,  H01L2924/066 ,  H01L2924/05442 ,  H01L2224/83

Abstract: Provided is a semiconductor package that may prevent deformation of stacked semiconductor chips and minimize a semiconductor package size. The semiconductor package includes a package base substrate, a lower chip stacked on the package base substrate, an upper chip stacked on the lower chip, and a first die attach film (DAF) attached to a bottom surface of the upper chip to cover at least a portion of the lower chip. The first DAF may be a multi-layer film including a first attaching layer contacting the bottom surface of the upper chip and a second attaching layer attached to a bottom of the first attaching layer to cover at least a portion of a side surface of the lower chip.

Abstract translation: 提供了可以防止堆叠的半导体芯片的变形并使半导体封装尺寸最小化的半导体封装。 半导体封装包括封装基底基板，堆叠在封装基底基板上的下部芯片，堆叠在下部芯片上的上部芯片，以及附接到上部芯片的底表面上的至少覆盖的第一芯片附着膜（DAF） 下部芯片的一部分。 第一DAF可以是多层膜，其包括接触上芯片的底表面的第一附着层和附接到第一附着层的底部的第二附着层，以覆盖下层的侧表面的至少一部分 芯片。

公开(公告)号：US09099425B2

公开(公告)日：2015-08-04

申请号：US14322216

申请日：2014-07-02

Applicant: Kabushiki Kaisha Toshiba

Inventor： Keiichi Matsushita ,  Yo Sasaki

IPC: H01L23/373 ,  H01L23/00 ,  H01L23/10 ,  H01L23/482 ,  H01L21/50 ,  H01L23/14

CPC classification number: H01L23/3736 ,  H01L21/50 ,  H01L23/10 ,  H01L23/142 ,  H01L23/4827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L2224/0346 ,  H01L2224/04026 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05647 ,  H01L2224/2741 ,  H01L2224/2743 ,  H01L2224/29082 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83359 ,  H01L2224/83379 ,  H01L2224/83447 ,  H01L2224/83825 ,  H01L2224/85444 ,  H01L2924/00014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/161 ,  H01L2924/16195 ,  H01L2924/163 ,  H01L2924/171 ,  H01L2924/2064 ,  H01L2224/05644 ,  H01L2924/00012 ,  H01L2224/06164 ,  H01L2224/45099

Abstract: According to one embodiment, a semiconductor device includes a semiconductor element, a mounting member including Cu, and a bonding layer provided between the semiconductor element and the mounting member. The bonding layer includes a first region including Ti and Cu, and a second region provided between the first region and the mounting member, and including Sn and Cu. A first position along the first direction is positioned between the semiconductor element and a second position along the first direction. The first position is where the composition ratio of Ti in the first region is 0.1 times a maximum value of the composition ratio of Ti. The second position is where the composition ratio of Sn in the second region is 0.1 times a maximum value of the composition ratio of Sn. A distance between the first position and the second position is not less than 0.1 micrometers.

Abstract translation: 根据一个实施例，半导体器件包括半导体元件，包括Cu的安装构件和设置在半导体元件和安装构件之间的接合层。 接合层包括包括Ti和Cu的第一区域，以及设置在第一区域和安装构件之间的包括Sn和Cu的第二区域。 沿着第一方向的第一位置位于半导体元件和沿第一方向的第二位置之间。 第一位置是第一区域中的Ti的组成比为Ti的组成比的最大值的0.1倍。 第二位置是第二区域中的Sn的组成比为Sn的组成比的最大值的0.1倍。 第一位置和第二位置之间的距离不小于0.1微米。

公开(公告)号：US20170271295A1

公开(公告)日：2017-09-21

申请号：US15514524

申请日：2015-09-17

Applicant: OSRAM Oplo Semiconductors GmbH

Inventor： Andreas Ploessl

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/15

CPC classification number: H01L24/29 ,  H01L23/15 ,  H01L23/49513 ,  H01L23/49866 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/15 ,  H01L24/16 ,  H01L24/27 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L33/40 ,  H01L33/62 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05678 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1141 ,  H01L2224/11436 ,  H01L2224/13294 ,  H01L2224/13339 ,  H01L2224/13347 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/29171 ,  H01L2224/29173 ,  H01L2224/29178 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81207 ,  H01L2224/81208 ,  H01L2224/81469 ,  H01L2224/81473 ,  H01L2224/81478 ,  H01L2224/8184 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83207 ,  H01L2224/83208 ,  H01L2224/83359 ,  H01L2224/83439 ,  H01L2224/83447 ,  H01L2224/83469 ,  H01L2224/83473 ,  H01L2224/83478 ,  H01L2224/8384 ,  H01L2924/00015 ,  H01L2924/1033 ,  H01L2924/10349 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/13014 ,  H01L2924/13064 ,  H01L2924/15724 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2224/05639 ,  H01L2924/00012

Abstract: An electronic device and a method for producing an electronic device are disclosed. In an embodiment the electronic device includes a first component and a second component and a sinter layer connecting the first component to the second component, the sinter layer comprising a first metal, wherein at least one of the components comprises at least one contact layer which is arranged in direct contact with the sinter layer, which comprises a second metal different from the first metal and which is free of gold.

公开(公告)号：US09502376B2

公开(公告)日：2016-11-22

申请号：US14773970

申请日：2014-03-24

Applicant: OSRAM Opto Semiconductors GmbH

Inventor： Andreas Plöβl

IPC: H01L21/288 ,  H01L21/285 ,  H01L21/768 ,  H01L23/00

CPC classification number: H01L24/83 ,  H01L21/2855 ,  H01L21/2885 ,  H01L21/76874 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/27444 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/29109 ,  H01L2224/29113 ,  H01L2224/29139 ,  H01L2224/29166 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32505 ,  H01L2224/83054 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83359 ,  H01L2224/83539 ,  H01L2224/83825 ,  H01L2224/83902 ,  H01L2224/83948 ,  H01L2924/12041 ,  H01L2924/01083 ,  H01L2924/00012 ,  H01L2924/01322 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method is provided for connecting parts to be joined. A first layer sequence is applied to a first part to be joined. The first layer sequence contains silver. A second layer sequence is applied to a second part to be joined. The second layer sequence contains indium and bismuth. The first layer sequence and the second layer sequence are pressed together at their end faces respectively remote from the first part to be joined and the second part to be joined through application of a joining pressure at a joining temperature which amounts to at most 120° C. for a predetermined joining time. The first layer sequence and the second layer sequence fuse together to form a bonding layer which directly adjoins the first part to be joined and the second part to be joined and the melting temperature of which amounts to at least 260° C.

Abstract translation: 提供了用于连接要连接的部件的方法。 将第一层序列应用于要接合的第一部分。 第一层序列包含银。 将第二层序列应用于待连接的第二部分。 第二层序列包含铟和铋。 第一层序列和第二层序列在其端面处被压在一起，分别远离待接合的第一部分和待连接的第二部分，通过在接合温度下施加接合压力达到至多120℃ 预定的接合时间。 第一层序列和第二层序列熔合在一起形成直接毗邻待接合的第一部分和待接合的第二部分的接合层，其熔融温度等于至少260℃。

公开(公告)号：US09490193B2

公开(公告)日：2016-11-08

申请号：US13309163

申请日：2011-12-01

Applicant: Alexander Heinrich ,  Michael Juerss ,  Konrad Roesl ,  Oliver Eichinger ,  Kok Chai Goh ,  Tobias Schmidt

Inventor： Alexander Heinrich ,  Michael Juerss ,  Konrad Roesl ,  Oliver Eichinger ,  Kok Chai Goh ,  Tobias Schmidt

IPC: H01L29/43 ,  H01L29/45 ,  H01L23/482 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L24/32 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L29/43 ,  H01L29/45 ,  H01L2224/03438 ,  H01L2224/0345 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/08503 ,  H01L2224/2745 ,  H01L2224/29082 ,  H01L2224/29084 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/29171 ,  H01L2224/29184 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/83191 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/83469 ,  H01L2224/83815 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01048 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/17738 ,  H01L2924/17747 ,  H01L2924/1776 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01023 ,  H01L2924/01015 ,  H01L2924/00

Abstract: The electronic device includes a carrier, a semiconductor substrate attached to the carrier, and a layer system disposed between the semiconductor substrate and the carrier. The layer system includes an electrical contact layer disposed on the semiconductor substrate. A functional layer is disposed on the electrical contact layer. An adhesion layer is disposed on the functional layer. A solder layer is disposed between the adhesion layer and the carrier.

Abstract translation: 电子设备包括载体，附着到载体的半导体衬底以及设置在半导体衬底和载体之间的层系统。 层系统包括设置在半导体衬底上的电接触层。 功能层设置在电接触层上。 粘附层设置在功能层上。 在粘合层和载体之间设置焊料层。

公开(公告)号：US09443903B2

公开(公告)日：2016-09-13

申请号：US13361569

申请日：2012-01-30

Applicant: Michael John Bergmann ,  Christopher D. Williams ,  Kevin Shawne Schneider ,  Kevin Haberern ,  Matthew Donofrio

Inventor： Michael John Bergmann ,  Christopher D. Williams ,  Kevin Shawne Schneider ,  Kevin Haberern ,  Matthew Donofrio

IPC: H01L33/62 ,  H01L27/15 ,  H01L23/00 ,  H01L25/075 ,  H01L33/40

CPC classification number: H01L27/153 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0753 ,  H01L33/40 ,  H01L33/62 ,  H01L2224/16225 ,  H01L2224/29 ,  H01L2224/2908 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29155 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32258 ,  H01L2224/3303 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/4814 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49107 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10158 ,  H01L2924/12041 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929

Abstract: A light emitting diode structure includes a diode region and a metal stack on the diode region. The metal stack includes a barrier layer on the diode region and a bonding layer on the barrier layer. The barrier layer is between the bonding layer and the diode region. The bonding layer includes gold, tin and nickel. A weight percentage of tin in the bonding layer is greater than 20 percent and a weight percentage of gold in the bonding layer is less than about 75 percent. A weight percentage of nickel in the bonding layer may be greater than 10 percent.

Abstract translation: 发光二极管结构包括二极管区域和二极管区域上的金属堆叠。 金属堆叠包括二极管区域上的阻挡层和阻挡层上的结合层。 阻挡层在结合层和二极管区之间。 结合层包括金，锡和镍。 接合层中锡的重量百分比大于20％，接合层中的金的重量百分数小于约75％。 接合层中镍的重量百分数可以大于10％。