公开(公告)号：US12119294B2

公开(公告)日：2024-10-15

申请号：US18177953

申请日：2023-03-03

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon ,  Francis J. Carney

IPC分类号： H01L23/498 ,  H01L21/02 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/48 ,  H01L21/56 ,  H01L21/66 ,  H01L21/67 ,  H01L21/683 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/482 ,  H01L23/495 ,  H01L23/544 ,  H01L25/00 ,  H01L25/065 ,  H01L27/02 ,  H01L27/088 ,  H01L27/14 ,  H01L27/146 ,  H01L29/08 ,  H02M3/158 ,  H01L23/14 ,  H01L23/15 ,  H01L23/367

CPC分类号： H01L23/49827 ,  H01L21/02035 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3083 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/67069 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L22/12 ,  H01L22/26 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/4822 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/544 ,  H01L23/562 ,  H01L24/00 ,  H01L24/05 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/14 ,  H01L27/14683 ,  H01L29/0847 ,  H02M3/158 ,  H01L23/147 ,  H01L23/15 ,  H01L23/3677 ,  H01L23/49816 ,  H01L27/14625 ,  H01L27/14685 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05184 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/3511

摘要： A through-substrate via structure includes a conductive via structure including trench portions at a first major surface of a substrate and extending to a first distance. A first insulating structure is over sidewalls of the trench portions, and a conductive material is over the first insulating structure. A recessed region extends from a second major surface of the substrate to a second distance greater than the first distance and laterally overlaps and interfaces both trench portions. A second insulating structure includes a first portion within the recessed region and a second portion adjacent to the second major surface outside of the recessed region, which includes an outer surface overlapping the second major surface outside of the recessed region. A first conductive region includes a proximate end coupled to the conductive material through openings in the first portion, and an opposite distal that is outward from the second portion.

公开(公告)号：US12080600B2

公开(公告)日：2024-09-03

申请号：US17010610

申请日：2020-09-02

申请人： STATS ChipPAC Pte. Ltd.

发明人： Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/66 ,  H01L21/78 ,  H01L23/498 ,  H01L23/31 ,  H01L23/538

CPC分类号： H01L21/78 ,  H01L21/4857 ,  H01L21/561 ,  H01L22/14 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/562 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/04 ,  H01L24/05 ,  H01L2224/02125 ,  H01L2224/02145 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/02351 ,  H01L2224/0236 ,  H01L2224/02377 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05011 ,  H01L2224/05017 ,  H01L2224/05022 ,  H01L2224/05083 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05184 ,  H01L2224/05551 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/0535 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/0635 ,  H01L2924/0665 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10322 ,  H01L2924/10324 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10335 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/13091 ,  H01L2924/1421 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/1434 ,  H01L2924/186 ,  H01L2924/351 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/92 ,  H01L21/78 ,  H01L2224/19 ,  H01L2224/94 ,  H01L2224/03 ,  H01L2224/94 ,  H01L2224/11

摘要： A semiconductor device has a semiconductor die. A first insulating layer is disposed over the semiconductor die. A first via is formed in the first insulating layer over a contact pad of the semiconductor die. A first conductive layer is disposed over the first insulating layer and in the first via. A second insulating layer is disposed over a portion of the first insulating layer and first conductive layer. An island of the second insulating layer is formed over the first conductive layer and within the first via. The first conductive layer adjacent to the island is devoid of the second insulating layer. A second conductive layer is disposed over the first conductive layer, second insulating layer, and island. The second conductive layer has a corrugated structure. A width of the island is greater than a width of the first via.

公开(公告)号：US20240194623A1

公开(公告)日：2024-06-13

申请号：US18554923

申请日：2022-03-08

申请人： TDK ELECTRONICS AG

发明人： Mehrdad Shayganpoor ,  Guenter Aflenzer ,  Davor Tomassevic ,  Thomas Feichtinger

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L21/784 ,  H01L23/31

CPC分类号： H01L24/05 ,  H01L21/561 ,  H01L23/3171 ,  H01L24/02 ,  H01L24/03 ,  H01L24/06 ,  H01L24/95 ,  H01L21/784 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/02371 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/03002 ,  H01L2224/03422 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/0529 ,  H01L2224/05339 ,  H01L2224/05347 ,  H01L2224/05548 ,  H01L2224/05583 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/06181 ,  H01L2224/95001 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/10253 ,  H01L2924/1203

摘要： A semiconductor die and a method for manufacturing a semiconductor die are disclosed. In an embodiment a semiconductor die includes a base body having a semiconductor material and a surface with two contact areas having contact pads at which the semiconductor die is electrically contactable and two metal caps arranged directly at the contact pads.

公开(公告)号：US11923325B2

公开(公告)日：2024-03-05

申请号：US17695654

申请日：2022-03-15

申请人： Kioxia Corporation

发明人： Yasuhito Yoshimizu ,  Takashi Fukushima ,  Tatsuro Hitomi ,  Arata Inoue ,  Masayuki Miura ,  Shinichi Kanno ,  Toshio Fujisawa ,  Keisuke Nakatsuka ,  Tomoya Sanuki

IPC分类号： H01L23/00 ,  G06F11/07 ,  H01L23/544

CPC分类号： H01L24/05 ,  G06F11/073 ,  G06F11/0751 ,  H01L23/544 ,  H01L2223/5446 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2924/14511

摘要： A memory chip unit includes a pad electrode including first and second portions, and a memory cell array. A prober includes a probe card and a movement mechanism. The probe card includes a probe electrode to be in contact with the pad electrode, and a memory controller electrically coupled to the probe electrode and executes reading and writing on the memory cell array. The movement mechanism executes a first operation that brings the probe electrode into contact with the first portion and does not bring the probe electrode into contact with the second portion, and a second operation that does not bring the probe electrode into contact with the first portion and brings the probe electrode into contact with the second portion.

公开(公告)号：US11908816B2

公开(公告)日：2024-02-20

申请号：US17538133

申请日：2021-11-30

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao Huang

IPC分类号： H01L23/00

CPC分类号： H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/024 ,  H01L2224/0239 ,  H01L2224/02311 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/0508 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05184 ,  H01L2224/05193 ,  H01L2224/13026 ,  H01L2924/0105 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/0509 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/05994

摘要： The present application discloses a method for fabricating a semiconductor device with graphene layers The method includes providing a substrate; forming a first passivation layer above the substrate; forming a redistribution layer on the first passivation layer; forming a first adjustment layer on the redistribution layer; forming a pad layer on the first adjustment layer; forming a second adjustment layer between the pad layer and the first adjustment layer; forming a second passivation layer on the first passivation layer; wherein the first adjustment layer and the second adjustment layer are formed of graphene.

公开(公告)号：US11854957B2

公开(公告)日：2023-12-26

申请号：US17705668

申请日：2022-03-28

申请人： Seiko Epson Corporation

发明人： Naoki Il ,  Yosuke Itasaka

IPC分类号： H01L23/50 ,  H03H9/05 ,  H03H9/10 ,  H03H9/17 ,  H03B5/36 ,  H03H3/02 ,  H01L23/00

CPC分类号： H01L23/50 ,  H03B5/36 ,  H03H3/02 ,  H03H9/0557 ,  H03H9/1021 ,  H03H9/178 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/13144 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/81206

摘要： The integrated circuit device includes: a pad that has a shape having a longitudinal direction and a lateral direction; a circuit that overlaps the pad in a plan view, and that is electrically coupled to the pad; a lead-out wiring that is led out from an outer edge on a longitudinal side of the pad along the lateral direction of the pad; and a via group that electrically couples the lead-out wiring and a wiring of the circuit and that does not overlap the pad in the plan view.

公开(公告)号：US20230352376A1

公开(公告)日：2023-11-02

申请号：US18004860

申请日：2021-06-21

申请人： ROHM CO., LTD.

发明人： Takumi KANDA

IPC分类号： H01L23/495 ,  H01L23/00

CPC分类号： H01L23/49562 ,  H01L23/49524 ,  H01L23/49551 ,  H01L24/37 ,  H01L24/40 ,  H01L24/32 ,  H01L24/73 ,  H01L24/05 ,  H01L24/48 ,  H01L24/29 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2224/37147 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05644 ,  H01L2224/29116 ,  H01L2224/37011 ,  H01L2224/40245 ,  H01L2224/73263

摘要： A semiconductor device includes a first die pad having a first obverse face oriented in a thickness direction, a semiconductor element having an electrode located on a side to which the first obverse face is oriented in the thickness direction, the semiconductor element being connected to the first obverse face, a conductive material electrically connected to the electrode, and a first bonding layer electrically connecting the conductive material and the electrode. The conductive material includes a main portion, a first connecting portion electrically connected to the electrode via the first bonding layer, a first joint portion connecting the main portion and the first connecting portion, and a distal end portion spaced apart from the first joint portion, and connected to the first connecting portion. As viewed along an in-plane direction of the first obverse face, the distal end portion is inclined so as to be farther from the electrode, in a direction away from the first connecting portion. As viewed along the thickness direction, the electrode includes an expanded region, protruding from the conductive material to an opposite side of the first connecting portion in the in-plane direction, with respect to the distal end portion.

公开(公告)号：US11715715B2

公开(公告)日：2023-08-01

申请号：US17200922

申请日：2021-03-15

申请人： Unimicron Technology Corp.

发明人： Tzyy-Jang Tseng ,  Ming-Ru Chen ,  Cheng-Chung Lo ,  Chin-Sheng Wang ,  Wen-Sen Tang

IPC分类号： H01L23/00 ,  H01L25/075 ,  H01L27/12 ,  H01L33/62

CPC分类号： H01L24/13 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L25/0753 ,  H01L27/1214 ,  H01L33/62 ,  H01L2224/03312 ,  H01L2224/03552 ,  H01L2224/0401 ,  H01L2224/0518 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05193 ,  H01L2224/11464 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/12041 ,  H01L2924/1426 ,  H01L2933/0066

摘要： A manufacturing method of a metal bump structure is provided. A driving base is provided. At least one pad and an insulating layer are formed on the driving base. The pad is formed on an arrangement surface of the driving base and has an upper surface. The insulating layer covers the arrangement surface of the driving base and the pad, and exposes a part of the upper surface of the pad. A patterned metal layer is formed on the upper surface of the pad exposed by the insulating layer, and extends to cover a part of the insulating layer. An electro-less plating process is performed to form at least one metal bump on the patterned metal layer. A first extension direction of the metal bump is perpendicular to a second extension direction of the driving base.

公开(公告)号：US10083924B2

公开(公告)日：2018-09-25

申请号：US14891319

申请日：2014-11-13

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Kazuyoshi Maekawa ,  Yuichi Kawano

IPC分类号： H01L23/12 ,  H01L23/00 ,  H01L21/3205 ,  H01L23/522 ,  H01L21/768

CPC分类号： H01L24/02 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/02166 ,  H01L2224/02181 ,  H01L2224/02185 ,  H01L2224/0219 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03462 ,  H01L2224/03466 ,  H01L2224/0347 ,  H01L2224/035 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05007 ,  H01L2224/05008 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05176 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05566 ,  H01L2224/05567 ,  H01L2224/05664 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/4502 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48664 ,  H01L2224/48864 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/04941 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/1306 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/01008

摘要： A semiconductor device includes: a pad electrode 9a formed in an uppermost layer of a plurality of wiring layers; a base insulating film 11 having an opening 11a on the pad electrode 9a; a base metal film UM formed on the base insulating film 11; a redistribution line RM formed on the base metal film UM; and a cap metal film CM formed so as to cover an upper surface and a side surface of the redistribution line RM. In addition, in a region outside the redistribution line RM, the base metal film UM made of a material different from that of the redistribution line RM and the cap metal film CM made of a material different from the redistribution line RM are formed between the cap metal film CM formed on the side surface of the redistribution line RM and the base insulating film 11, and the base metal film UM and the cap metal film CM are in direct contact with each other in the region outside the redistribution line RM.

公开(公告)号：US20180240742A1

公开(公告)日：2018-08-23

申请号：US15957731

申请日：2018-04-19

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Francis J. CARNEY ,  Michael J. SEDDON

IPC分类号： H01L23/498 ,  H01L23/495 ,  H01L23/482 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L21/02 ,  H01L21/308 ,  H01L21/66 ,  H01L21/3065 ,  H01L21/67 ,  H01L21/304 ,  H01L27/146 ,  H01L21/78 ,  H01L23/544 ,  H01L25/00 ,  H01L23/00 ,  H02M3/158 ,  H01L25/065

CPC分类号： H01L23/49827 ,  H01L21/02035 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3083 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/67069 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L22/12 ,  H01L22/26 ,  H01L23/147 ,  H01L23/15 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/4822 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/544 ,  H01L23/562 ,  H01L24/00 ,  H01L24/05 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/14 ,  H01L27/14625 ,  H01L27/14683 ,  H01L27/14685 ,  H01L29/0847 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05184 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M3/158

摘要： A semiconductor device has a first semiconductor die with a base material. A covering layer is formed over a surface of the base material. The covering layer can be made of an insulating material or metal. A trench is formed in the surface of the base material. The covering layer extends into the trench to provide the cantilevered protrusion of the covering layer. A portion of the base material is removed by plasma etching to form a cantilevered protrusion extending beyond an edge of the base material. The cantilevered protrusion can be formed by removing the base material to the covering layer, or the cantilevered protrusion can be formed within the base material under the covering layer. A second semiconductor die is disposed partially under the cantilevered protrusion. An interconnect structure is formed between the cantilevered protrusion and second semiconductor die.