公开(公告)号：US20140339695A1

公开(公告)日：2014-11-20

申请号：US14231163

申请日：2014-03-31

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Motoi YAMAUCHI ,  Osamu KAWACHI ,  Yasushi FUKUDA ,  Yoshinobu ISHIBASHI

IPC: H01L23/00

CPC classification number: H01L24/81 ,  H01L23/15 ,  H01L24/13 ,  H01L24/16 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/13111 ,  H01L2224/16238 ,  H01L2224/7598 ,  H01L2224/81007 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81206 ,  H01L2224/81207 ,  H01L2224/81815 ,  H01L2224/83007 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83815 ,  H01L2224/97 ,  H01L2924/351 ,  H03H9/059 ,  H05K1/0271 ,  H05K1/0306 ,  H05K3/3431 ,  H05K2201/09781 ,  H05K2201/2009 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/01047

Abstract: An electronic component includes: a substrate formed of ceramic and including one or more pads on an upper surface thereof; a component flip-chip mounted on the upper surface of the substrate with one or more bumps bonded to the one or more pads; and an additional film located on a lower surface of the substrate and overlapping with at least a part of a smaller one of the pad and the bump in each of one or more pad/bump pairs, the one or more pad/bump pairs being composed of the one or more pads and the one or more bumps bonded to each other.

Abstract translation: 电子部件包括：由陶瓷形成的基板，在其上表面上包括一个或多个焊盘; 安装在所述基板的上表面上的部件倒装芯片，其中一个或多个凸起焊接到所述一个或多个焊盘; 以及位于所述基板的下表面上并且与一个或多个垫/凸块对中的每一个中的所述焊盘和所述凸块中的较小一个的至少一部分重叠的附加膜，所述一个或多个焊盘/凸块对被组成 的一个或多个焊盘和一个或多个凸块彼此粘接。

公开(公告)号：US20070114673A1

公开(公告)日：2007-05-24

申请号：US11655238

申请日：2007-01-19

Applicant: Kei Murayama ,  Masahiro Sunohara

Inventor： Kei Murayama ,  Masahiro Sunohara

IPC: H01L23/48

CPC classification number: H01L23/49827 ,  H01L23/562 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/81206 ,  H01L2224/81801 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H05K1/113 ,  H05K3/328 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2201/0979 ,  H05K2201/10674 ,  H05K2203/0285 ,  H01L2924/00

Abstract: In a wiring substrate of the present invention in which a bump of an electronic parts is bonded to a connection pad of a wiring pattern provided on an insulating film by an ultrasonic flip-chip packaging, a via hole into which a via post acting as a strut to support the connection pad upon the ultrasonic flip-chip packaging is filled is arranged in the insulating film under the connection pad.

公开(公告)号：US20040212087A1

公开(公告)日：2004-10-28

申请号：US10709096

申请日：2004-04-13

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kei MURAYAMA ,  Masahiro SUNOHARA

IPC: H01L023/48

CPC classification number: H01L23/49827 ,  H01L23/562 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/81206 ,  H01L2224/81801 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H05K1/113 ,  H05K3/328 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2201/0979 ,  H05K2201/10674 ,  H05K2203/0285 ,  H01L2924/00

Abstract: In a wiring substrate of the present invention in which a bump of an electronic parts is bonded to a connection pad of a wiring pattern provided on an insulating film by an ultrasonic flip-chip packaging, a via hole into which a via post acting as a strut to support the connection pad upon the ultrasonic flip-chip packaging is filled is arranged in the insulating film under the connection pad.

Abstract translation: 在本发明的布线基板中，电子部件的凸块通过超声波倒装芯片封装被接合到设置在绝缘膜上的布线图案的连接焊盘，通孔，通孔作为 在超声波倒装芯片封装被填充的支撑件支撑连接垫被布置在连接垫下面的绝缘膜中。

公开(公告)号：US06543668B1

公开(公告)日：2003-04-08

申请号：US09287639

申请日：1999-04-07

Applicant: Tomonori Fujii ,  Kazutaka Suzuki

Inventor： Tomonori Fujii ,  Kazutaka Suzuki

IPC: B23K3102

CPC classification number: H01L24/81 ,  B23K20/023 ,  B23K20/025 ,  B23K20/10 ,  B23K20/106 ,  B23K2101/40 ,  B29C65/08 ,  B29C66/8322 ,  H01L24/75 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/75 ,  H01L2224/75251 ,  H01L2224/81121 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81206 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00

Abstract: A mounting method and a mounting apparatus of an electronic part onto a substrate are provided, which enable inspection of a bond formed between an electronic part and a substrate when flip-chip bonding is executed by an ultrasonic wave and thermocompression bonding connecting method. The semiconductor chip has bumps which, when are compressed and subjected to ultrasonic vibration, enable formation of a connection between the semiconductor chip and a substrate conductor. The mounting apparatus is constructed so that the amount of compression of the bumps (sinking amounts of bumps) when a predetermined weight R and an ultrasonic vibration US are applied to the bumps for a predetermined time are monitored by the laser displacement meter, a judgment is made as to whether or not the sinking amounts respectively fall within desired ranges, and then a judgment is made as to whether the joint formed by the ultrasonic wave and thermocompression bonding connection utilizing the flip-chip bonding system is defective or non-defective.

Abstract translation: 提供了一种将电子部件安装到基板上的安装方法和安装装置，当通过超声波和热压接连接方法进行倒装芯片接合时，能够检查在电子部件和基板之间形成的接合。 半导体芯片具有凸起，当被压缩并进行超声波振动时，能够形成半导体芯片和基板导体之间的连接。 安装装置被构造成使得当将预定重量R和超声波振动US施加到凸起预定时间时的凸块的压缩量（凹凸量）由激光位移计监测，判断为 关于下沉量是否分别落入所需范围内，然后判断由超声波形成的接头和利用倒装芯片接合系统的热压接连接是否有缺陷或无缺陷。

公开(公告)号：US06509206B2

公开(公告)日：2003-01-21

申请号：US09828942

申请日：2001-04-10

Applicant: Toshihiro Iwasaki ,  Satoshi Yamada

Inventor： Toshihiro Iwasaki ,  Satoshi Yamada

IPC: H01L2144

CPC classification number: H01L24/81 ,  H01L21/68 ,  H01L24/75 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/75 ,  H01L2224/7525 ,  H01L2224/753 ,  H01L2224/75305 ,  H01L2224/75314 ,  H01L2224/75317 ,  H01L2224/75986 ,  H01L2224/81005 ,  H01L2224/81206 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/15787 ,  H01L2924/19043 ,  Y10T29/53178 ,  H01L2924/00014 ,  H01L2924/00

Abstract: In connection with a method of manufacturing a semiconductor device including a step of establishing electrical connection between terminal electrodes of a circuit board and electrode pads of a semiconductor substrate by means of ultrasonic vibration, prevention of flaws stemming from ultrasonic vibration is aimed. A semiconductor substrate is mounted on the surface of an insulation circuit board such that terminal electrodes of the insulation circuit board oppose electrode pads of a semiconductor board. Desired electrical connection is established by means of applying ultrasonic vibration between a first holding tool for holding the insulation circuit board and a second holding tool for holding the semiconductor substrate. Ultrasonic vibration is applied while intermediate material of lower hardness is interposed between the first holding tool and the insulation circuit board and while another intermediate material of lower hardness is interposed between the second holding tool and the insulation circuit board.

公开(公告)号：US06169330A

公开(公告)日：2001-01-02

申请号：US09292080

申请日：1999-04-14

Applicant: Jacques Isaac Pankove

Inventor： Jacques Isaac Pankove

IPC: H01L2348

CPC classification number: H01L24/48 ,  H01L24/33 ,  H01L24/45 ,  H01L24/49 ,  H01L24/75 ,  H01L24/83 ,  H01L31/0203 ,  H01L2224/04026 ,  H01L2224/05644 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45164 ,  H01L2224/48472 ,  H01L2224/48599 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/75302 ,  H01L2224/78743 ,  H01L2224/81206 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/85207 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/07802 ,  H01L2924/10272 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

Abstract: A semiconductor-chip is bonded to a chip-carrier substrate by way of a gold-to-gold bonding interface. A vacuum chuck is provided to physically hold the semiconductor-chip in physical contact with, the chip-carrier substrate as static force, ultrasonic power, and an elevated temperature are applied to two mating gold surfaces that are formed by two continuous and physically mating gold layers. The bonded assembly is encased in a potting ceramic, or the bonded assembly is encased in a housing that includes a transparent cover that enables use as an optoelectronic semiconductor device.

Abstract translation: 通过金 - 金键合界面将半导体芯片结合到芯片 - 载体衬底。 提供真空卡盘以物理地保持半导体芯片与芯片载体基板物理接触，作为静力，超声功率和升高的温度被施加到由两个连续和物理匹配的金形成的两个配对金表面 层。 粘合组件被封装在灌封陶瓷中，或者粘合的组件被封装在包括能够用作光电子半导体器件的透明盖的壳体中。

公开(公告)号：US20170365569A1

公开(公告)日：2017-12-21

申请号：US15635189

申请日：2017-06-27

Applicant: SMARTRAC TECHNOLOGY GmbH

Inventor： Frank Kriebel

IPC: H01L23/00 ,  H01L23/538 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L24/11 ,  H01L21/4825 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/4985 ,  H01L23/5387 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/15 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/742 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/95 ,  H01L2223/6677 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1161 ,  H01L2224/11622 ,  H01L2224/1182 ,  H01L2224/13006 ,  H01L2224/13011 ,  H01L2224/13012 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13599 ,  H01L2224/16113 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/2731 ,  H01L2224/27418 ,  H01L2224/278 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32265 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/75348 ,  H01L2224/75349 ,  H01L2224/81005 ,  H01L2224/81014 ,  H01L2224/8112 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81206 ,  H01L2224/81345 ,  H01L2224/81385 ,  H01L2224/814 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/8149 ,  H01L2224/8181 ,  H01L2224/81898 ,  H01L2224/81907 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83874 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/206 ,  H01L2924/2064 ,  Y10T29/49018 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2224/03 ,  H01L2224/27 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/16225 ,  H01L2924/00

Abstract: Contact bumps between a contact pad and a substrate can include a rough surface that can mate with the material of the substrate of which may be flexible. The rough surface can enhance the bonding strength of the contacts, for example, against shear and tension forces, especially for flexible systems such as smart label and may be formed via roller or other methods.

公开(公告)号：US20150228529A1

公开(公告)日：2015-08-13

申请号：US14179779

申请日：2014-02-13

Applicant: Apple Inc.

Inventor： Gerard Anthony C. Afable ,  Howell John Chua Toc ,  Prakash Venkatesappa ,  Kok Peng Teo ,  Annabelle Q. Yang

IPC: H01L21/687 ,  H01L23/00

CPC classification number: H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/95 ,  H01L27/14618 ,  H01L2224/73204 ,  H01L2224/75343 ,  H01L2224/75704 ,  H01L2224/7598 ,  H01L2224/81206 ,  H01L2224/83104 ,  H01L2224/95 ,  H01L2924/15153 ,  Y10T29/49826 ,  Y10T29/49998 ,  H01L2224/81 ,  H01L2924/00014

Abstract: A method and clamping apparatus for securing a substrate within a substrate carrier during an ultrasonic mounting process. The clamping apparatus may include a substrate carrier having a top plate and a bottom plate, the top plate and the bottom plate forming a cavity dimensioned to hold a substrate. A clamping plate is positioned on a side of the top plate opposite the bottom plate, the clamping plate having an opening aligned with the cavity and a pair of clamping members, each of the pair of clamping members extending toward a center of the opening and through the cavity such that the clamping member presses portions of the substrate exposed through the opening against the bottom plate. The method may include providing a clamping plate having an opening configured for alignment with a cavity formed in a substrate carrier and mounting a pair of resilient arms to the clamping plate.

Abstract translation: 一种用于在超声波安装过程中将衬底固定在衬底载体内的方法和夹紧装置。 夹持装置可以包括具有顶板和底板的基板载体，顶板和底板形成尺寸适于保持基板的空腔。 夹板位于与底板相对的顶板的一侧上，夹板具有与空腔对准的开口和一对夹紧构件，每对夹紧构件中的每一个夹紧构件朝向开口的中心延伸并且通过 所述空腔使得所述夹紧构件将通过所述开口暴露的所述基板的部分压靠在所述底板上。 该方法可以包括提供具有开口的夹持板，所述开口被配置为与形成在基板载体中的空腔对准并将一对弹性臂安装到夹紧板。

公开(公告)号：US20150208508A1

公开(公告)日：2015-07-23

申请号：US14420730

申请日：2013-08-09

Applicant: SMARTRAC TECHNOLOGY GMBH

Inventor： Carsten Nieland ,  Frank Kriebel

IPC: H05K1/18 ,  H05K3/30 ,  H01L23/00

CPC classification number: H05K1/18 ,  H01L21/76885 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/11462 ,  H01L2224/11622 ,  H01L2224/13006 ,  H01L2224/13011 ,  H01L2224/13012 ,  H01L2224/13019 ,  H01L2224/13022 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81201 ,  H01L2224/81206 ,  H01L2224/81345 ,  H01L2224/81898 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2924/00014 ,  H05K3/301 ,  H05K3/3431 ,  H05K2201/1059 ,  H05K2201/10674 ,  H05K2201/10954 ,  H05K2203/0415 ,  Y10T29/49018 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/05552

Abstract: The invention relates to a contact bump connection (24) and to a method for producing a contact bump connection between an electronic component being provided with at least one terminal face (11) and a contact substrate (26) being contacted with the component and having at least one second terminal face (25), wherein the first terminal face is provided with a contact bump (10), which has a raised edge (15) and has at least one displacement pin (16) in a displacement compartment (18) being surrounded by the raised edge and being open towards a head end of the contact bump, and wherein, in a contact region (31) with the first terminal face, the second terminal face has a contact bead (30), which is formed by displacement of a contact material (29) of the second terminal face into the displacement compartment and which surrounds the displacement pin, said contact bead having a bead crown (33) which is oriented to a bottom (17) of the displacement compartment and is raised relative to a level contact surface (32) of the second terminal face surrounding the contact region.

Abstract translation: 本发明涉及一种接触凸块连接（24）以及一种在电子部件之间产生接触凸块连接的方法，该电子部件设置有至少一个端面（11）和与部件接触的接触基板（26），并具有 至少一个第二端面（25），其中所述第一端面设置有接触凸块（10），所述接触凸块具有凸起边缘（15），并且在位移室（18）中具有至少一个位移销（16） 被凸起边缘包围并且朝向接触凸块的头端开口，并且其中，在具有第一端子面的接触区域（31）中，第二端子面具有接触凸缘（30），其形成为接触凸起 第二端面的接触材料（29）移动到位移室中并且围绕位移销，所述接触凸珠具有朝向位移室的底部（17）的凸缘（33），并且升高 相对于le 围绕接触区域的第二端面的vel接触表面（32）。

公开(公告)号：US07557450B2

公开(公告)日：2009-07-07

申请号：US11655238

申请日：2007-01-19

Applicant: Kei Murayama ,  Masahiro Sunohara

Inventor： Kei Murayama ,  Masahiro Sunohara

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L23/49827 ,  H01L23/562 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/81206 ,  H01L2224/81801 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H05K1/113 ,  H05K3/328 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2201/0979 ,  H05K2201/10674 ,  H05K2203/0285 ,  H01L2924/00

Abstract: In a wiring substrate of the present invention in which a bump of an electronic parts is bonded to a connection pad of a wiring pattern provided on an insulating film by an ultrasonic flip-chip packaging, a via hole into which a via post acting as a strut to support the connection pad upon the ultrasonic flip-chip packaging is filled is arranged in the insulating film under the connection pad.

Abstract translation: 在本发明的布线基板中，电子部件的凸块通过超声波倒装芯片封装被接合到设置在绝缘膜上的布线图案的连接焊盘，通孔，通孔作为 在超声波倒装芯片封装被填充的支撑件支撑连接垫被布置在连接垫下面的绝缘膜中。