公开(公告)号：US20240332032A1

公开(公告)日：2024-10-03

申请号：US18623233

申请日：2024-04-01

申请人： Amkor Technology Singapore Holding Pte. Ltd.

发明人： Dong Jin Kim ,  Jin Han Kim ,  Won Chul Do ,  Jae Hun Bae ,  Won Myoung Ki ,  Dong Hoon Han ,  Do Hyung Kim ,  Ji Hun Lee ,  Jun Hwan Park ,  Seung Nam Son ,  Hyun Cho ,  Curtis Zwenger

IPC分类号： H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538

CPC分类号： H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/92 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68304 ,  H01L2221/68318 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/1132 ,  H01L2224/131 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81224 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81464 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2224/81911 ,  H01L2224/81913 ,  H01L2224/81914 ,  H01L2224/83 ,  H01L2224/83005 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/1421 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/18161

摘要： A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

公开(公告)号：US11790206B1

公开(公告)日：2023-10-17

申请号：US17704191

申请日：2022-03-25

申请人： Impinj, Inc.

发明人： Ronald Lee Koepp ,  Harley Heinrich ,  Christopher J. Diorio

IPC分类号： G06K19/077 ,  H01Q1/22 ,  H01P5/02 ,  H05K3/34 ,  H05K3/32 ,  H01L23/00

CPC分类号： G06K19/07754 ,  G06K19/0775 ,  G06K19/07722 ,  G06K19/07752 ,  H01P5/028 ,  H01Q1/2225 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/16245 ,  H01L2224/73204 ,  H01L2224/81143 ,  H01L2224/81424 ,  H01L2224/81447 ,  H01L2224/81464 ,  H01L2224/81493 ,  H01L2924/00014 ,  H01L2924/14 ,  H05K3/321 ,  H05K3/3431 ,  H05K2201/10098 ,  Y10T29/49002 ,  Y10T29/49016

摘要： RFID inlays or straps may be assembled using impulse heating of metal precursors. Metal precursors are applied to and/or included in contacts on an RFID IC and/or terminals on a substrate. During assembly of the tag, the IC is disposed onto the substrate such that the IC contacts physically contact either the substrate terminals or metal precursors that in turn physically contact the substrate terminals. Impulse heating is then used to rapidly apply heat to the metal precursors, processing them into metallic structures that electrically couple the IC contacts to the substrate terminals.

公开(公告)号：US11670618B2

公开(公告)日：2023-06-06

申请号：US17008918

申请日：2020-09-01

申请人： STATS ChipPAC Pte. Ltd.

发明人： DeokKyung Yang ,  YongMin Kim ,  JaeHyuk Choi ,  YeoChan Ko ,  HeeSoo Lee

IPC分类号： H01L25/065 ,  H01L21/56 ,  H01L25/00 ,  H01L23/552 ,  H01L21/683 ,  H01L23/31 ,  H01L25/16 ,  H01L23/00 ,  H01L21/66 ,  H01L23/538 ,  H01L21/48 ,  H01L23/498 ,  H01L23/50

CPC分类号： H01L25/0655 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/566 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/552 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L21/486 ,  H01L22/14 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/5384 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L24/94 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16113 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81201 ,  H01L2224/81203 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81466 ,  H01L2224/81484 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06572 ,  H01L2924/0105 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3025 ,  H01L2224/94 ,  H01L2224/11 ,  H01L2224/94 ,  H01L2224/03 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2224/97 ,  H01L2224/83 ,  H01L2224/11901 ,  H01L2224/11849 ,  H01L2224/05124 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/00014 ,  H01L2224/05111 ,  H01L2924/00014 ,  H01L2224/05155 ,  H01L2924/00014 ,  H01L2224/05144 ,  H01L2924/00014 ,  H01L2224/05139 ,  H01L2924/00014 ,  H01L2224/05624 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05611 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/13124 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13155 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13144 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13139 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13116 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13113 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13147 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/013 ,  H01L2924/01082 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/013 ,  H01L2924/0105 ,  H01L2924/00014 ,  H01L2224/13116 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81424 ,  H01L2924/00014 ,  H01L2224/81447 ,  H01L2924/00014 ,  H01L2224/81411 ,  H01L2924/00014 ,  H01L2224/81455 ,  H01L2924/00014 ,  H01L2224/81444 ,  H01L2924/00014 ,  H01L2224/81439 ,  H01L2924/00014 ,  H01L2224/81466 ,  H01L2924/00014 ,  H01L2224/81484 ,  H01L2924/00014

摘要： A semiconductor device includes a substrate with an opening formed through the substrate. A first electronic component is disposed over the substrate outside a footprint of the first opening. A second electronic component is disposed over the substrate opposite the first electrical component. A third electronic component is disposed over the substrate adjacent to the first electronic component. The substrate is disposed in a mold including a second opening of the mold over a first side of the substrate. The mold contacts the substrate between the first electronic component and the third electronic component. An encapsulant is deposited into the second opening. The encapsulant flows through the first opening to cover a second side of the substrate. In some embodiments, a mold film is disposed in the mold, and an interconnect structure on the substrate is embedded in the mold film.

公开(公告)号：US20230154877A1

公开(公告)日：2023-05-18

申请号：US17702812

申请日：2022-03-24

申请人： Industrial Technology Research Institute

发明人： Yu-Ming Peng ,  Chien-Chou Tseng ,  Chih-Chia Chang ,  Kuan-Chu Wu ,  Yu-Lin Hsu

IPC分类号： H01L23/00 ,  H01L33/62 ,  H01L23/13 ,  H01L21/66

CPC分类号： H01L24/06 ,  H01L33/62 ,  H01L24/05 ,  H01L23/13 ,  H01L24/08 ,  H01L24/16 ,  H01L24/80 ,  H01L24/81 ,  H01L22/20 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05686 ,  H01L2924/0549 ,  H01L2224/0569 ,  H01L2224/05693 ,  H01L24/13 ,  H01L2224/13186 ,  H01L2224/1319 ,  H01L2224/13193 ,  H01L2224/0603 ,  H01L2224/08238 ,  H01L2224/16227 ,  H01L2224/80411 ,  H01L2224/80424 ,  H01L2224/80439 ,  H01L2224/80444 ,  H01L2224/80447 ,  H01L2224/80455 ,  H01L2224/80486 ,  H01L2224/8049 ,  H01L2224/80493 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L23/145

摘要： An electronic device includes a substrate, an electronic component, a first interposing layer and a second interposing layer. The substrate is non-planar and the substrate includes a first substrate pad and a second substrate pad. The electronic component includes a first component pad and a second component pad corresponding to the first substrate pad and the second substrate pad respectively. When the first component pad contacts the first substrate pad, a height difference exists between the second component pad and the second substrate pad. The first interposing layer connects between the first component pad and the first substrate pad. The second interposing layer connects between the second component pad and the second substrate pad. A thickness difference between the first interposing layer and the second interposing layer is 0.5 to 1 time the height difference.

公开(公告)号：US20190244920A1

公开(公告)日：2019-08-08

申请号：US16384136

申请日：2019-04-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wen-Hsiung Lu ,  Hsuan-Ting Kuo ,  Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/00 ,  H01L21/768 ,  H01L23/532 ,  H01L23/525 ,  H01L23/29 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L24/11 ,  H01L21/566 ,  H01L21/76885 ,  H01L23/293 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02331 ,  H01L2224/0345 ,  H01L2224/0347 ,  H01L2224/036 ,  H01L2224/0362 ,  H01L2224/03828 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05582 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/10126 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/1148 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81815 ,  H01L2924/04953 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

摘要： Embodiments of the present disclosure include interconnect structures and methods of forming interconnect structures. An embodiment is an interconnect structure including a post-passivation interconnect (PPI) over a first substrate and a conductive connector on the PPI. The interconnect structure further includes a molding compound on a top surface of the PPI and surrounding a portion of the conductive connector, a top surface of the molding compound adjoining the conductive connector at an angle from about 10 degrees to about 60 degrees relative to a plane parallel with a major surface of the first substrate, the conductive connector having a first width at the adjoining top surface of the molding compound, and a second substrate over the conductive connector, the second substrate being mounted to the conductive connector.

公开(公告)号：US20190122976A1

公开(公告)日：2019-04-25

申请号：US16228928

申请日：2018-12-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Min Liang ,  Jiun Yi Wu

IPC分类号： H01L23/498 ,  H01L23/48 ,  H01L23/00 ,  H05K1/02 ,  H05K1/11 ,  H05K3/40 ,  H01L21/66

CPC分类号： H01L23/49838 ,  H01L22/14 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/11614 ,  H01L2224/11622 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/1712 ,  H01L2224/17132 ,  H01L2224/81424 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81466 ,  H01L2224/81815 ,  H01L2924/01057 ,  H01L2924/01072 ,  H01L2924/05042 ,  H01L2924/0533 ,  H01L2924/0534 ,  H01L2924/05342 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/05994 ,  H01L2924/14 ,  H01L2924/1531 ,  H01L2924/15787 ,  H01L2924/2064 ,  H01L2924/20641 ,  H05K1/0268 ,  H05K1/113 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/096 ,  H05K2201/0989 ,  H05K2201/10674 ,  H05K2203/0353 ,  H01L2924/014 ,  H01L2924/00014

摘要： A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially therethrough. Each of the first subset of conductive pillars comprises a protrusion bump pad protruding from a surface of the substrate, and the second subset of conductive pillars each partially form a trace recessed within the surface of the substrate. The die is coupled to the substrate via a plurality of conductive bumps each extending between one of the protrusion bump pads and the die.

公开(公告)号：US20180047691A1

公开(公告)日：2018-02-15

申请号：US15729127

申请日：2017-10-10

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Hiroyuki UTSUNOMIYA

IPC分类号： H01L23/00

CPC分类号： H01L24/13 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03831 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/10145 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11903 ,  H01L2224/13005 ,  H01L2224/13014 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81424 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81469 ,  H01L2224/81815 ,  H01L2924/206 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014

摘要： A flip-chip mounting technique with high reliability is provided in flip-chip mounting using a Cu pillar. In a semiconductor device to be coupled to a mounting board via a Cu pillar, the Cu pillar is caused to have a laminated structure including a pillar layer, a barrier layer, and a bump in this order from below, and the bump is formed to be smaller than the barrier layer.

公开(公告)号：US20170323863A1

公开(公告)日：2017-11-09

申请号：US15150342

申请日：2016-05-09

申请人： Amkor Technology, Inc.

发明人： Kyoung Yeon Lee ,  Tae Yong Lee ,  Min Chul Shin ,  Se Man Oh

IPC分类号： H01L23/00

CPC分类号： H01L24/11 ,  H01L21/4846 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1111 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16012 ,  H01L2224/16013 ,  H01L2224/16057 ,  H01L2224/16104 ,  H01L2224/16238 ,  H01L2224/81203 ,  H01L2224/81224 ,  H01L2224/81359 ,  H01L2224/81379 ,  H01L2224/81385 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/014

摘要： A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device, and a method of manufacturing thereof, that comprises a substrate including a dielectric layer, at least one conductive trace and conductive bump pad formed on one surface of the dielectric layer, and a protection layer covering the at least one conductive trace and conductive bump pad, the at least one conductive bump pad having one end exposed through the protection layer, and a semiconductor die electrically connected to the conductive bump pad of the substrate.

公开(公告)号：US20170294372A1

公开(公告)日：2017-10-12

申请号：US15632669

申请日：2017-06-26

申请人： Siliconware Precision Industries Co., Ltd.

发明人： Chia-Cheng Chen ,  Chi-Ching Ho ,  Shao-Tzu Tang ,  Yu-Che Liu ,  Ying-Chou Tsai

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC分类号： H01L23/49838 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L2221/68345 ,  H01L2224/05554 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48159 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49173 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/81193 ,  H01L2224/81424 ,  H01L2224/81447 ,  H01L2224/83005 ,  H01L2224/85005 ,  H01L2924/00014 ,  H01L2924/10162 ,  H01L2924/181 ,  H01L2924/35121 ,  H01L2224/13099 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor package is provided, which includes: a dielectric layer made of a material used for fabricating built-up layer structures; a conductive trace layer formed on the dielectric layer; a semiconductor chip is mounted on and electrically connected to the conductive trace layer; and an encapsulant formed over the dielectric layer to encapsulate the semiconductor chip and the conductive trace layer. Since a strong bonding is formed between the dielectric layer and the conductive trace layer, the present invention can prevent delamination between the dielectric layer and the conductive trace layer from occurrence, thereby improving reliability and facilitating the package miniaturization by current fabrication methods.

公开(公告)号：US09786621B2

公开(公告)日：2017-10-10

申请号：US14877525

申请日：2015-10-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chita Chuang ,  Chen-Shien Chen ,  Ming Hung Tseng ,  Yao-Chun Chuang

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/44 ,  H01L23/00 ,  H01L23/498

CPC分类号： H01L24/13 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05572 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/13005 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/14155 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/814 ,  H01L2224/81424 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/81484 ,  H01L2224/81815 ,  H01L2924/00012 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/206 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/01047

摘要： A package structure includes a chip attached to a substrate. The chip includes a bump structure including a conductive pillar having a length (L) measured along a long axis of the conductive pillar and a width (W) measured along a short axis of the conductive pillar. The substrate includes a pad region and a mask layer overlying the pad region, wherein the mask layer has an opening exposing a portion of the pad region. The chip is attached to the substrate to form an interconnection between the conductive pillar and the pad region. The opening has a first dimension (d1) measured along the long axis and a second dimension (d2) measured along the short axis. In an embodiment, L is greater than d1, and W is less than d2.