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公开(公告)号：US20240332032A1
公开(公告)日：2024-10-03
申请号：US18623233
申请日：2024-04-01
发明人： Dong Jin Kim , Jin Han Kim , Won Chul Do , Jae Hun Bae , Won Myoung Ki , Dong Hoon Han , Do Hyung Kim , Ji Hun Lee , Jun Hwan Park , Seung Nam Son , Hyun Cho , Curtis Zwenger
IPC分类号： H01L21/48 , H01L21/56 , H01L21/683 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/538
CPC分类号： H01L21/4857 , H01L21/6835 , H01L23/49822 , H01L23/5389 , H01L24/92 , H01L21/4853 , H01L21/56 , H01L21/561 , H01L21/568 , H01L23/3128 , H01L23/49816 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/97 , H01L2221/68304 , H01L2221/68318 , H01L2221/68331 , H01L2221/68345 , H01L2221/68363 , H01L2224/1132 , H01L2224/131 , H01L2224/13294 , H01L2224/133 , H01L2224/16227 , H01L2224/16237 , H01L2224/16238 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/81192 , H01L2224/81203 , H01L2224/81224 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81464 , H01L2224/81815 , H01L2224/8191 , H01L2224/81911 , H01L2224/81913 , H01L2224/81914 , H01L2224/83 , H01L2224/83005 , H01L2224/83104 , H01L2224/83192 , H01L2224/92 , H01L2224/9202 , H01L2224/92125 , H01L2224/97 , H01L2924/1421 , H01L2924/1433 , H01L2924/14335 , H01L2924/15311 , H01L2924/15331 , H01L2924/1815 , H01L2924/18161
摘要： A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.
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公开(公告)号：US11424180B2
公开(公告)日：2022-08-23
申请号：US16890624
申请日：2020-06-02
发明人： Jong Sik Paek , Jin Young Kim , YoonJoo Kim , Jin Han Kim , SeungJae Lee , Se Woong Cha , SungKyu Kim , Jae Hun Bae , Dong Jin Kim , Doo Hyun Park
IPC分类号： H01L23/498 , H01L23/00 , H01L23/31 , H01L21/56
摘要： A semiconductor device with redistribution layers on partial encapsulation is disclosed and may include providing a carrier with a non-photosensitive protection layer, forming a pattern in the non-photosensitive protection layer, providing a semiconductor die with a contact pad on a first surface, and bonding the semiconductor die to the non-photosensitive protection layer such that the contact pad aligns with the pattern formed in the non-photosensitive protection layer. A second surface opposite to the first surface of the semiconductor die, side surfaces between the first and second surfaces of the semiconductor die, and a portion of a first surface of the non-photosensitive protection layer may be encapsulated with an encapsulant. The carrier may be removed leaving the non-photosensitive protection layer bonded to the semiconductor die. A redistribution layer may be formed on the contact pad and a second surface of the non-photosensitive protection layer opposite to the first surface.
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公开(公告)号：US11195726B2
公开(公告)日：2021-12-07
申请号：US16781703
申请日：2020-02-04
发明人： Dong Jin Kim , Jin Han Kim , Won Chul Do , Jae Hun Bae , Won Myoung Ki , Dong Hoon Han , Do Hyung Kim , Ji Hun Lee , Jun Hwan Park , Seung Nam Son , Hyun Cho , Curtis Zwenger
IPC分类号： H01L21/48 , H01L21/683 , H01L23/538 , H01L23/00 , H01L23/498 , H01L23/31 , H01L21/56
摘要： A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.
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公开(公告)号：US20240363470A1
公开(公告)日：2024-10-31
申请号：US18765853
申请日：2024-07-08
发明人： Yeong Beom Ko , Dong Jin Kim , Se Woong Cha
IPC分类号： H01L23/31 , H01L21/56 , H01L21/78 , H01L23/00 , H01L23/498 , H01L23/538
CPC分类号： H01L23/3185 , H01L21/561 , H01L21/78 , H01L23/3114 , H01L23/49811 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/94 , H01L24/96 , H01L24/97 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/73 , H01L24/81 , H01L24/92 , H01L2224/0401 , H01L2224/04105 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/12105 , H01L2224/131 , H01L2224/16145 , H01L2224/16227 , H01L2224/32245 , H01L2224/73209 , H01L2224/73253 , H01L2224/73267 , H01L2224/81005 , H01L2224/92124 , H01L2224/92242 , H01L2224/92244 , H01L2224/94 , H01L2224/97 , H01L2924/1434 , H01L2924/181 , H01L2924/18162
摘要： A semiconductor product in the form of a stack chip package and a method of manufacturing the same, where a plurality of semiconductor chips are stacked one on another so as to enable the exchange of electrical signals between the semiconductor chips, and where a conductive layer is included for inputting and outputting signals to and from individual chips. A stack chip package having a compact size may, for example, be manufactured by stacking, on a first semiconductor chip, a second semiconductor chip having a smaller surface area by means of interconnection structures so as to enable the exchange of electrical signals between the first and second semiconductor chips, and by using a conductive layer for inputting and outputting signals to and from individual semiconductor chips, in lieu of a thick substrate. Furthermore, heat dissipation effects can be enhanced by the addition of a heat dissipation unit.
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公开(公告)号：US12033910B2
公开(公告)日：2024-07-09
申请号：US17028329
申请日：2020-09-22
发明人： Yeong Beom Ko , Dong Jin Kim , Se Woong Cha
IPC分类号： H01L23/31 , H01L21/56 , H01L21/78 , H01L23/00 , H01L23/498 , H01L23/538
CPC分类号： H01L23/3185 , H01L21/561 , H01L21/78 , H01L23/3114 , H01L23/49811 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/94 , H01L24/96 , H01L24/97 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/73 , H01L24/81 , H01L24/92 , H01L2224/0401 , H01L2224/04105 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/12105 , H01L2224/131 , H01L2224/16145 , H01L2224/16227 , H01L2224/32245 , H01L2224/73209 , H01L2224/73253 , H01L2224/73267 , H01L2224/81005 , H01L2224/92124 , H01L2224/92242 , H01L2224/92244 , H01L2224/94 , H01L2224/97 , H01L2924/1434 , H01L2924/181 , H01L2924/18162 , H01L2224/94 , H01L2224/81 , H01L2224/94 , H01L2224/82 , H01L2224/97 , H01L2224/82 , H01L2224/97 , H01L2224/81 , H01L2224/97 , H01L2224/83 , H01L2224/131 , H01L2924/014 , H01L2924/00014 , H01L2924/181 , H01L2924/00012
摘要： A semiconductor product in the form of a stack chip package and a method of manufacturing the same, where a plurality of semiconductor chips are stacked one on another so as to enable the exchange of electrical signals between the semiconductor chips, and where a conductive layer is included for inputting and outputting signals to and from individual chips. A stack chip package having a compact size may, for example, be manufactured by stacking, on a first semiconductor chip, a second semiconductor chip having a smaller surface area by means of interconnection structures so as to enable the exchange of electrical signals between the first and second semiconductor chips, and by using a conductive layer for inputting and outputting signals to and from individual semiconductor chips, in lieu of a thick substrate. Furthermore, heat dissipation effects can be enhanced by the addition of a heat dissipation unit.
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公开(公告)号：US11508712B2
公开(公告)日：2022-11-22
申请号：US17120991
申请日：2020-12-14
发明人： Dong Jin Kim , Jin Han Kim , Se Woong Cha , Ji Hun Lee , Joon Dong Kim , Yeong Beom Ko
摘要： A method for manufacturing a semiconductor package, for example a package-on-package type semiconductor device package. As non-limiting examples, various aspects of this disclosure provide high-yield methods for manufacturing a package-on-package type semiconductor package, or a portion thereof.
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公开(公告)号：US20240266321A1
公开(公告)日：2024-08-08
申请号：US18439002
申请日：2024-02-12
发明人： Yeong Beom Ko , Jin Han Kim , Dong Jin Kim , Do Hyung Kim , Glenn Rinne
IPC分类号： H01L23/00 , H01L21/311 , H01L21/48 , H01L21/56 , H01L21/683 , H01L21/78 , H01L23/31 , H01L23/498 , H01L23/538 , H01L25/00 , H01L25/065
CPC分类号： H01L24/96 , H01L21/311 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L21/78 , H01L23/3114 , H01L23/3185 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L23/49894 , H01L23/5384 , H01L23/562 , H01L24/16 , H01L24/81 , H01L25/0655 , H01L25/50 , H01L21/561 , H01L21/568 , H01L23/3128 , H01L23/49827 , H01L23/5389 , H01L24/97 , H01L2221/68327 , H01L2221/6834 , H01L2221/68345 , H01L2221/68363 , H01L2221/68381 , H01L2224/131 , H01L2224/16227 , H01L2224/16237 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2224/81005 , H01L2224/83005 , H01L2224/92125 , H01L2224/97 , H01L2924/01014 , H01L2924/15311 , H01L2924/15321 , H01L2924/157 , H01L2924/15788 , H01L2924/1811 , H01L2924/18161 , H01L2924/3025 , H01L2924/351
摘要： A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a method for manufacturing a semiconductor device that comprises ordering and performing processing steps in a manner that prevents warpage deformation from occurring to a wafer and/or die due to mismatching thermal coefficients.
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公开(公告)号：US11948808B2
公开(公告)日：2024-04-02
申请号：US17542666
申请日：2021-12-06
发明人： Dong Jin Kim , Jin Han Kim , Won Chul Do , Jae Hun Bae , Won Myoung Ki , Dong Hoon Han , Do Hyung Kim , Ji Hun Lee , Jun Hwan Park , Seung Nam Son , Hyun Cho , Curtis Zwenger
IPC分类号： H01L21/48 , H01L21/683 , H01L23/00 , H01L23/498 , H01L23/538 , H01L21/56 , H01L23/31
CPC分类号： H01L21/4857 , H01L21/6835 , H01L23/49822 , H01L23/5389 , H01L24/92 , H01L21/4853 , H01L21/56 , H01L21/561 , H01L21/568 , H01L23/3128 , H01L23/49816 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/97 , H01L2221/68304 , H01L2221/68318 , H01L2221/68331 , H01L2221/68345 , H01L2221/68363 , H01L2224/1132 , H01L2224/131 , H01L2224/13294 , H01L2224/133 , H01L2224/16227 , H01L2224/16237 , H01L2224/16238 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2224/81192 , H01L2224/81203 , H01L2224/81224 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81464 , H01L2224/81815 , H01L2224/8191 , H01L2224/81911 , H01L2224/81913 , H01L2224/81914 , H01L2224/83 , H01L2224/83005 , H01L2224/83104 , H01L2224/83192 , H01L2224/92 , H01L2224/9202 , H01L2224/92125 , H01L2224/97 , H01L2924/1421 , H01L2924/1433 , H01L2924/14335 , H01L2924/15311 , H01L2924/15331 , H01L2924/1815 , H01L2924/18161 , H01L2224/97 , H01L2224/81 , H01L2224/97 , H01L2224/83 , H01L2224/81447 , H01L2924/00014 , H01L2224/81424 , H01L2924/00014 , H01L2224/81444 , H01L2924/00014 , H01L2224/81439 , H01L2924/00014 , H01L2224/81464 , H01L2924/00014 , H01L2224/131 , H01L2924/014 , H01L2224/81203 , H01L2924/00014 , H01L2224/81224 , H01L2924/00014 , H01L2224/13294 , H01L2924/00014 , H01L2224/133 , H01L2924/014 , H01L2224/1132 , H01L2924/00014 , H01L2224/81913 , H01L2924/00014 , H01L2224/81914 , H01L2924/00014 , H01L2224/8191 , H01L2924/00012 , H01L2224/83104 , H01L2924/00014 , H01L2924/1815 , H01L2924/00012 , H01L2224/92 , H01L2221/68304 , H01L21/4857 , H01L2221/68363 , H01L2224/81 , H01L2224/83 , H01L21/56 , H01L2221/68363 , H01L21/4853 , H01L2224/92 , H01L2221/68304 , H01L21/4857 , H01L2221/68363 , H01L2224/81 , H01L2224/83 , H01L21/56 , H01L2221/68363 , H01L21/4853 , H01L21/4853 , H01L2224/92 , H01L2221/68304 , H01L21/4857 , H01L2224/81 , H01L2224/83 , H01L21/56 , H01L2221/68363 , H01L21/4857 , H01L21/4853 , H01L2224/92 , H01L2221/68304 , H01L21/4857 , H01L2224/81 , H01L2224/83 , H01L21/56 , H01L2221/68363 , H01L21/4853 , H01L2224/92 , H01L2221/68304 , H01L21/4857 , H01L2221/68363 , H01L21/4857 , H01L2224/81 , H01L2224/83 , H01L21/56 , H01L2221/68363 , H01L21/4853
摘要： A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.
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公开(公告)号：US11901332B2
公开(公告)日：2024-02-13
申请号：US17340930
申请日：2021-06-07
发明人： Yeong Beom Ko , Jin Han Kim , Dong Jin Kim , Do Hyung Kim , Glenn Rinne
IPC分类号： H01L21/48 , H01L23/00 , H01L25/00 , H01L21/683 , H01L21/311 , H01L25/065 , H01L23/498 , H01L23/538 , H01L21/56 , H01L21/78 , H01L23/31
CPC分类号： H01L24/96 , H01L21/311 , H01L21/486 , H01L21/4853 , H01L21/4857 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L21/78 , H01L23/3114 , H01L23/3185 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L23/49894 , H01L23/5384 , H01L23/562 , H01L24/16 , H01L24/81 , H01L25/0655 , H01L25/50 , H01L21/561 , H01L21/568 , H01L23/3128 , H01L23/49827 , H01L23/5389 , H01L24/97 , H01L2221/6834 , H01L2221/68327 , H01L2221/68345 , H01L2221/68363 , H01L2221/68381 , H01L2224/131 , H01L2224/16227 , H01L2224/16237 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2224/81005 , H01L2224/83005 , H01L2224/92125 , H01L2224/97 , H01L2924/01014 , H01L2924/157 , H01L2924/15311 , H01L2924/15321 , H01L2924/15788 , H01L2924/1811 , H01L2924/18161 , H01L2924/3025 , H01L2924/351 , H01L2224/97 , H01L2224/83 , H01L2224/97 , H01L2224/81 , H01L2224/131 , H01L2924/014
摘要： A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a method for manufacturing a semiconductor device that comprises ordering and performing processing steps in a manner that prevents warpage deformation from occurring to a wafer and/or die due to mismatching thermal coefficients.
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公开(公告)号：US20230057803A1
公开(公告)日：2023-02-23
申请号：US17891310
申请日：2022-08-19
发明人： Jong Sik Paek , Jin Young Kim , YoonJoo Kim , Jin Han Kim , SeungJae Lee , Se Woong Cha , SungKyu Kim , Jae Hun Bae , Dong Jin Kim , Doo Hyun Park
IPC分类号： H01L23/498 , H01L23/00 , H01L23/31
摘要： A semiconductor device with redistribution layers on partial encapsulation is disclosed and may include providing a carrier with a non-photosensitive protection layer, forming a pattern in the non-photosensitive protection layer, providing a semiconductor die with a contact pad on a first surface, and bonding the semiconductor die to the non-photosensitive protection layer such that the contact pad aligns with the pattern formed in the non-photosensitive protection layer. A second surface opposite to the first surface of the semiconductor die, side surfaces between the first and second surfaces of the semiconductor die, and a portion of a first surface of the non-photosensitive protection layer may be encapsulated with an encapsulant. The carrier may be removed leaving the non-photosensitive protection layer bonded to the semiconductor die. A redistribution layer may be formed on the contact pad and a second surface of the non-photosensitive protection layer opposite to the first surface.
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