公开(公告)号：US20250038042A1

公开(公告)日：2025-01-30

申请号：US18916085

申请日：2024-10-15

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Michael G. Kelly ,  Ronald Patrick Huemoeller ,  Won Chul Do ,  David Jon Hiner

IPC: H01L21/762 ,  H01L21/48 ,  H01L21/683 ,  H01L23/00 ,  H01L23/14 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H01L23/544 ,  H01L25/00

Abstract: Methods and systems for a semiconductor device package with a die to interposer wafer first bond are disclosed and may include bonding a plurality of semiconductor die comprising electronic devices to an interposer wafer, and applying an underfill material between the die and the interposer wafer. Methods and systems for a semiconductor device package with a die-to-packing substrate first bond are disclosed and may include bonding a first semiconductor die to a packaging substrate, applying an underfill material between the first semiconductor die and the packaging substrate, and bonding one or more additional die to the first semiconductor die. Methods and systems for a semiconductor device package with a die-to-die first bond are disclosed and may include bonding one or more semiconductor die comprising electronic devices to an interposer die.

公开(公告)号：US11948808B2

公开(公告)日：2024-04-02

申请号：US17542666

申请日：2021-12-06

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Dong Jin Kim ,  Jin Han Kim ,  Won Chul Do ,  Jae Hun Bae ,  Won Myoung Ki ,  Dong Hoon Han ,  Do Hyung Kim ,  Ji Hun Lee ,  Jun Hwan Park ,  Seung Nam Son ,  Hyun Cho ,  Curtis Zwenger

IPC: H01L21/48 ,  H01L21/683 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/92 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68304 ,  H01L2221/68318 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/1132 ,  H01L2224/131 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81224 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81464 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2224/81911 ,  H01L2224/81913 ,  H01L2224/81914 ,  H01L2224/83 ,  H01L2224/83005 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/1421 ,  H01L2924/1433 ,  H01L2924/14335 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2224/97 ,  H01L2224/83 ,  H01L2224/81447 ,  H01L2924/00014 ,  H01L2224/81424 ,  H01L2924/00014 ,  H01L2224/81444 ,  H01L2924/00014 ,  H01L2224/81439 ,  H01L2924/00014 ,  H01L2224/81464 ,  H01L2924/00014 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2224/81203 ,  H01L2924/00014 ,  H01L2224/81224 ,  H01L2924/00014 ,  H01L2224/13294 ,  H01L2924/00014 ,  H01L2224/133 ,  H01L2924/014 ,  H01L2224/1132 ,  H01L2924/00014 ,  H01L2224/81913 ,  H01L2924/00014 ,  H01L2224/81914 ,  H01L2924/00014 ,  H01L2224/8191 ,  H01L2924/00012 ,  H01L2224/83104 ,  H01L2924/00014 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2224/92 ,  H01L2221/68304 ,  H01L21/4857 ,  H01L2221/68363 ,  H01L2224/81 ,  H01L2224/83 ,  H01L21/56 ,  H01L2221/68363 ,  H01L21/4853 ,  H01L2224/92 ,  H01L2221/68304 ,  H01L21/4857 ,  H01L2221/68363 ,  H01L2224/81 ,  H01L2224/83 ,  H01L21/56 ,  H01L2221/68363 ,  H01L21/4853 ,  H01L21/4853 ,  H01L2224/92 ,  H01L2221/68304 ,  H01L21/4857 ,  H01L2224/81 ,  H01L2224/83 ,  H01L21/56 ,  H01L2221/68363 ,  H01L21/4857 ,  H01L21/4853 ,  H01L2224/92 ,  H01L2221/68304 ,  H01L21/4857 ,  H01L2224/81 ,  H01L2224/83 ,  H01L21/56 ,  H01L2221/68363 ,  H01L21/4853 ,  H01L2224/92 ,  H01L2221/68304 ,  H01L21/4857 ,  H01L2221/68363 ,  H01L21/4857 ,  H01L2224/81 ,  H01L2224/83 ,  H01L21/56 ,  H01L2221/68363 ,  H01L21/4853

Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

公开(公告)号：US11848310B2

公开(公告)日：2023-12-19

申请号：US17391287

申请日：2021-08-02

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Won Geol Lee ,  Won Chul Do ,  Ji Hun Yi

IPC: H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/5389 ,  H01L25/50 ,  H01L23/49811 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/18 ,  H01L2224/32145 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/06582

Abstract: Various aspects of this disclosure provide a semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising a stacked die structure and a method of manufacturing thereof.

公开(公告)号：US11527496B2

公开(公告)日：2022-12-13

申请号：US16890613

申请日：2020-06-02

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Jong Sik Paek ,  Won Chul Do ,  Doo Hyun Park ,  Eun Ho Park ,  Sung Jae Oh

IPC: H01L23/00 ,  H01L21/683 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L21/768 ,  H01L23/31 ,  H01L23/367 ,  H01L21/60

Abstract: A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.

公开(公告)号：US20220005787A1

公开(公告)日：2022-01-06

申请号：US16918074

申请日：2020-07-01

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Yi Seul Han ,  Tae Yong Lee ,  Ji Yeon Ryu ,  Won Chul Do ,  Jin Young Khim ,  Shaun Bowers ,  Ron Huemoeller

IPC: H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L23/538 ,  H01L21/56

Abstract: In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.

公开(公告)号：US11081470B2

公开(公告)日：2021-08-03

申请号：US16680388

申请日：2019-11-11

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Won Geol Lee ,  Won Chul Do ,  Ji Hun Yi

IPC: H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L23/31 ,  H01L23/498

Abstract: Various aspects of this disclosure provide a semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising a stacked die structure and a method of manufacturing thereof.

公开(公告)号：US11018107B2

公开(公告)日：2021-05-25

申请号：US16416756

申请日：2019-05-20

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Jae Hun Bae ,  Won Chul Do ,  Min Yoo ,  Young Rae Kim ,  Min Hwa Chang ,  Dong Hyun Kim ,  Ah Ra Jo ,  Seok Geun Ahn

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065 ,  H01L25/00 ,  H01L23/538 ,  H01L21/683

Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.

公开(公告)号：US20240421127A1

公开(公告)日：2024-12-19

申请号：US18821529

申请日：2024-08-30

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Yi Seul Han ,  Tae Yong Lee ,  Ji Yeon Ryu ,  Won Chul Do ,  Jin Young Khim ,  Shaun Bowers ,  Ron Huemoeller

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538

Abstract: In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.

公开(公告)号：US12033970B2

公开(公告)日：2024-07-09

申请号：US17328766

申请日：2021-05-24

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Jae Hun Bae ,  Won Chul Do ,  Min Yoo ,  Young Rae Kim ,  Min Hwa Chang ,  Dong Hyun Kim ,  Ah Ra Jo ,  Seok Geun Ahn

IPC: H01L23/00 ,  H01L21/683 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/20 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/5383 ,  H01L24/14 ,  H01L24/17 ,  H01L24/19 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L23/3128 ,  H01L23/538 ,  H01L23/5385 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/13082 ,  H01L2224/13101 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2924/15311 ,  H01L2224/13101 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13147 ,  H01L2924/00014

Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.

公开(公告)号：US11658126B2

公开(公告)日：2023-05-23

申请号：US16821899

申请日：2020-03-17

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Jin Young Khim ,  Won Chul Do ,  Sang Hyoun Lee ,  Ji Hun Yi ,  Ji Yeon Ryu

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L2221/68372 ,  H01L2224/214

Abstract: In one example, a semiconductor device, comprises a first redistribution layer (RDL) substrate comprising a first dielectric structure and a first conductive structure through the first dielectric structure and comprising one or more first conductive redistribution layers, an electronic component over the first RDL substrate, wherein the electronic component is coupled with the first conductive structure, a body over a top side of the first RDL substrate, wherein the electronic component is in the body, a second RDL substrate comprising a second dielectric structure over the body, and a second conductive structure through the second dielectric structure and comprising one or more second conductive redistribution layers, and an internal interconnect coupled between the first conductive structure and the second conductive structure. Other examples and related methods are also disclosed herein.