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公开(公告)号：US20230223365A1
公开(公告)日：2023-07-13
申请号：US18079170
申请日：2022-12-12
发明人： Jong Sik Paek , Won Chul Do , Doo Hyun Park , Eun Ho Park , Sung Jae Oh
IPC分类号： H01L23/00 , H01L23/367 , H01L21/56 , H01L21/768 , H01L23/498 , H01L21/683 , H01L23/31 , H01L21/48 , H01L21/60
CPC分类号： H01L24/02 , H01L23/3675 , H01L24/14 , H01L21/563 , H01L21/76805 , H01L24/03 , H01L24/11 , H01L24/17 , H01L24/05 , H01L24/10 , H01L23/49838 , H01L24/08 , H01L24/81 , H01L23/49827 , H01L24/13 , H01L21/6835 , H01L23/3157 , H01L23/49811 , H01L23/3185 , H01L24/97 , H01L23/49816 , H01L21/4853 , H01L21/4882 , H01L2224/32245 , H01L2924/12042 , H01L24/16 , H01L2224/13082 , H01L2924/15311 , H01L2924/164 , H01L2224/13024 , H01L2924/01013 , H01L2224/32225 , H01L2924/16152 , H01L2221/68345 , H01L2224/16225 , H01L2224/73204 , H01L2224/13147 , H01L2224/0239 , H01L2224/024 , H01L2224/16227 , H01L2224/29299 , H01L2924/19105 , H01L2924/05042 , H01L2224/81005 , H01L2224/81193 , H01L2224/0401 , H01L2224/73253 , H01L2221/68381 , H01L2224/131 , H01L2224/0233 , H01L2224/02331 , H01L2924/15788 , H01L2224/02372 , H01L2224/05024 , H01L2224/05155 , H01L2224/13006 , H01L2224/13026 , H01L2224/16113 , H01L2224/16235 , H01L2224/0231 , H01L2021/60022 , H01L2224/05144 , H01L2924/01029 , H01L2224/2929 , H01L2224/33181 , H01L2224/02377 , H01L2924/05442
摘要： A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
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公开(公告)号：US11383970B2
公开(公告)日：2022-07-12
申请号：US16505957
申请日：2019-07-09
发明人： Sung Jae Oh
摘要： In one example, an electronic device can comprise (a) a first substrate comprising a first encapsulant extending from the first substrate bottom side to the first substrate top side, and a first substrate interconnect extending from the substrate bottom side to the substrate top side and coated by the first encapsulant, (b) a first electronic component embedded in the first substrate and comprising a first component sidewall coated by the first encapsulant, (c) a second electronic component coupled to the first substrate top side, (d) a first internal interconnect coupling the second electronic component to the first substrate interconnect, and (e) a cover structure on the first substrate and covering the second component sidewall and the first internal interconnect. Other examples and related methods are also disclosed herein.
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公开(公告)号：US20210009406A1
公开(公告)日：2021-01-14
申请号：US16505957
申请日：2019-07-09
发明人： Sung Jae Oh
摘要： In one example, an electronic device can comprise (a) a first substrate comprising a first encapsulant extending from the first substrate bottom side to the first substrate top side, and a first substrate interconnect extending from the substrate bottom side to the substrate top side and coated by the first encapsulant, (b) a first electronic component embedded in the first substrate and comprising a first component sidewall coated by the first encapsulant, (c) a second electronic component coupled to the first substrate top side, (d) a first internal interconnect coupling the second electronic component to the first substrate interconnect, and (e) a cover structure on the first substrate and covering the second component sidewall and the first internal interconnect. Other examples and related methods are also disclosed herein.
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公开(公告)号：US20230002217A1
公开(公告)日：2023-01-05
申请号：US17862609
申请日：2022-07-12
发明人： Sung Jae Oh
摘要： In one example, an electronic device can comprise (a) a first substrate comprising a first encapsulant extending from the first substrate bottom side to the first substrate top side, and a first substrate interconnect extending from the substrate bottom side to the substrate top side and coated by the first encapsulant, (b) a first electronic component embedded in the first substrate and comprising a first component sidewall coated by the first encapsulant, (c) a second electronic component coupled to the first substrate top side, (d) a first internal interconnect coupling the second electronic component to the first substrate interconnect, and (e) a cover structure on the first substrate and covering the second component sidewall and the first internal interconnect. Other examples and related methods are also disclosed herein.
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5.发明授权公开(公告)号：US11527496B2
公开(公告)日：2022-12-13
申请号：US16890613
申请日：2020-06-02
发明人： Jong Sik Paek , Won Chul Do , Doo Hyun Park , Eun Ho Park , Sung Jae Oh
IPC分类号： H01L23/00 , H01L21/683 , H01L23/498 , H01L21/48 , H01L21/56 , H01L21/768 , H01L23/31 , H01L23/367 , H01L21/60
摘要： A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
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