-
公开(公告)号:US09779965B2
公开(公告)日:2017-10-03
申请号:US15456767
申请日:2017-03-13
IPC分类号: H01L21/449 , H01L23/00 , H01L25/00 , H01L25/065 , H01L21/762 , H01L21/60
CPC分类号: H01L21/449 , H01L21/76251 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/75 , H01L24/81 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2021/60195 , H01L2224/1134 , H01L2224/1145 , H01L2224/11462 , H01L2224/13082 , H01L2224/131 , H01L2224/13109 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13187 , H01L2224/136 , H01L2224/13687 , H01L2224/16148 , H01L2224/16225 , H01L2224/16238 , H01L2224/48091 , H01L2224/48225 , H01L2224/75251 , H01L2224/75252 , H01L2224/75301 , H01L2224/75343 , H01L2224/75348 , H01L2224/75349 , H01L2224/75744 , H01L2224/75745 , H01L2224/759 , H01L2224/81121 , H01L2224/81193 , H01L2224/81201 , H01L2224/81203 , H01L2224/81205 , H01L2224/81207 , H01L2224/81355 , H01L2224/81409 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81801 , H01L2224/81895 , H01L2224/81906 , H01L2224/94 , H01L2225/06513 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01047 , H01L2924/01049 , H01L2924/01079 , H01L2924/01082 , H01L2924/181 , H01L2924/19107 , H01L2924/20102 , H01L2924/20103 , H01L2924/20104 , H01L2924/20105 , H01L2924/20106 , H01L2924/20107 , H01L2924/20301 , H01L2924/20302 , H01L2924/20303 , H01L2924/20304 , H01L2924/20305 , H01L2924/20306 , H01L2924/20307 , H01L2924/01029 , H01L2924/01014 , H01L2924/00012 , H01L2924/014 , H01L2224/8121 , H01L2924/00 , H01L2224/45099 , H01L2224/81 , H01L2924/04941 , H01L2924/04953 , H01L2924/0503 , H01L2924/01013 , H01L2924/0504 , H01L2924/0105 , H01L2924/0502 , H01L2924/0103 , H01L2924/0494 , H01L2924/0104 , H01L2924/0495 , H01L2924/01023 , H01L2924/0496 , H01L2924/01024 , H01L2924/05 , H01L2924/01028 , H01L2924/0543 , H01L2924/0544 , H01L2924/0542 , H01L2924/0534 , H01L2924/0535 , H01L2924/0536 , H01L2924/054 , H01L2924/0463 , H01L2924/0464 , H01L2924/0462 , H01L2924/0454 , H01L2924/0455 , H01L2924/0456 , H01L2924/046 , H01L2924/01105
摘要: A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures. A bonding surface of at least one of the first conductive structures and the second conductive structures includes a frangible coating.
-
公开(公告)号:US20170092620A1
公开(公告)日:2017-03-30
申请号:US15247705
申请日:2016-08-25
申请人: Invensas Corporation
发明人: Belgacem Haba , Arkalgud R. Sitaram
IPC分类号: H01L25/065 , H01L23/00 , H01L21/311 , H01L25/00 , H01L21/02
CPC分类号: H01L25/0657 , H01L21/02164 , H01L21/02181 , H01L21/0228 , H01L21/31111 , H01L23/642 , H01L24/27 , H01L24/32 , H01L24/83 , H01L25/50 , H01L2224/27452 , H01L2224/27614 , H01L2224/29187 , H01L2224/32135 , H01L2224/83896 , H01L2225/06531 , H01L2924/01072 , H01L2924/0534 , H01L2924/05442 , H01L2924/30105
摘要: Capacitive coupling of integrated circuit die components and other conductive areas is provided. Each component to be coupled has a surface that includes at least one conductive area, such as a metal pad or plate. An ultrathin layer of dielectric is formed on at least one surface to be coupled. When the two components, e.g., one from each die, are permanently contacted together, the ultrathin layer of dielectric remains between the two surfaces, forming a capacitor or capacitive interface between the conductive areas of each respective component. The ultrathin layer of dielectric may be composed of multiple layers of various dielectrics, but in one implementation, the overall thickness is less than approximately 50 nanometers. The capacitance per unit area of the capacitive interface formed depends on the particular dielectric constants K of the dielectric materials employed in the ultrathin layer and their respective thicknesses. Electrical and grounding connections can be made at the edge of the coupled stack.
-
公开(公告)号:US20180013260A1
公开(公告)日:2018-01-11
申请号:US15205789
申请日:2016-07-08
CPC分类号: H01S5/026 , H01L24/27 , H01L24/32 , H01L24/83 , H01L2224/27452 , H01L2224/32145 , H01L2224/32505 , H01L2224/8301 , H01L2924/0533 , H01L2924/0534 , H01L2924/05341 , H01L2924/05342 , H01L2924/3641 , H01S5/021 , H01S5/1032 , H01S5/22
摘要: An example device in accordance with an aspect of the present disclosure includes a first layer and a second layer to be bonded to the first layer. The first and second layers are materials that generate gas byproducts when bonded, and the first and/or second layers is/are compatible with photonic device operation based on a separation distance. At least one bonding interface layer is to establish the separation distance for photonic device operation, and is to prevent gas trapping and to facilitate bonding between the first layer and the second layer.
-
公开(公告)号:US20170186627A1
公开(公告)日:2017-06-29
申请号:US15456767
申请日:2017-03-13
IPC分类号: H01L21/449 , H01L21/762 , H01L25/00 , H01L25/065 , H01L23/00
CPC分类号: H01L21/449 , H01L21/76251 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/75 , H01L24/81 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2021/60195 , H01L2224/1134 , H01L2224/1145 , H01L2224/11462 , H01L2224/13082 , H01L2224/131 , H01L2224/13109 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13187 , H01L2224/136 , H01L2224/13687 , H01L2224/16148 , H01L2224/16225 , H01L2224/16238 , H01L2224/48091 , H01L2224/48225 , H01L2224/75251 , H01L2224/75252 , H01L2224/75301 , H01L2224/75343 , H01L2224/75348 , H01L2224/75349 , H01L2224/75744 , H01L2224/75745 , H01L2224/759 , H01L2224/81121 , H01L2224/81193 , H01L2224/81201 , H01L2224/81203 , H01L2224/81205 , H01L2224/81207 , H01L2224/81355 , H01L2224/81409 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81801 , H01L2224/81895 , H01L2224/81906 , H01L2224/94 , H01L2225/06513 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01047 , H01L2924/01049 , H01L2924/01079 , H01L2924/01082 , H01L2924/181 , H01L2924/19107 , H01L2924/20102 , H01L2924/20103 , H01L2924/20104 , H01L2924/20105 , H01L2924/20106 , H01L2924/20107 , H01L2924/20301 , H01L2924/20302 , H01L2924/20303 , H01L2924/20304 , H01L2924/20305 , H01L2924/20306 , H01L2924/20307 , H01L2924/01029 , H01L2924/01014 , H01L2924/00012 , H01L2924/014 , H01L2224/8121 , H01L2924/00 , H01L2224/45099 , H01L2224/81 , H01L2924/04941 , H01L2924/04953 , H01L2924/0503 , H01L2924/01013 , H01L2924/0504 , H01L2924/0105 , H01L2924/0502 , H01L2924/0103 , H01L2924/0494 , H01L2924/0104 , H01L2924/0495 , H01L2924/01023 , H01L2924/0496 , H01L2924/01024 , H01L2924/05 , H01L2924/01028 , H01L2924/0543 , H01L2924/0544 , H01L2924/0542 , H01L2924/0534 , H01L2924/0535 , H01L2924/0536 , H01L2924/054 , H01L2924/0463 , H01L2924/0464 , H01L2924/0462 , H01L2924/0454 , H01L2924/0455 , H01L2924/0456 , H01L2924/046 , H01L2924/01105
摘要: A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures. A bonding surface of at least one of the first conductive structures and the second conductive structures includes a frangible coating.
-
公开(公告)号:US09275967B2
公开(公告)日:2016-03-01
申请号:US14148482
申请日:2014-01-06
发明人: Yu-Min Liang , Jiun-Yi Wu
CPC分类号: H01L23/49838 , H01L22/14 , H01L23/481 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H01L24/02 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/0401 , H01L2224/11614 , H01L2224/11622 , H01L2224/131 , H01L2224/13144 , H01L2224/13294 , H01L2224/133 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/16238 , H01L2224/1712 , H01L2224/17132 , H01L2224/81424 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81466 , H01L2224/81815 , H01L2924/01057 , H01L2924/01072 , H01L2924/05042 , H01L2924/0533 , H01L2924/0534 , H01L2924/05342 , H01L2924/05432 , H01L2924/05442 , H01L2924/05994 , H01L2924/14 , H01L2924/1531 , H01L2924/15787 , H01L2924/2064 , H01L2924/20641 , H05K1/0268 , H05K1/113 , H05K3/4007 , H05K3/4682 , H05K2201/0367 , H05K2201/096 , H05K2201/0989 , H05K2201/10674 , H05K2203/0353 , H01L2924/014 , H01L2924/00014
摘要: A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially therethrough. Each of the first subset of conductive pillars comprises a protrusion bump pad protruding from a surface of the substrate, and the second subset of conductive pillars each partially form a trace recessed within the surface of the substrate. The die is coupled to the substrate via a plurality of conductive bumps each extending between one of the protrusion bump pads and the die.
摘要翻译: 提供了一个管芯和一个衬底。 芯片包括至少一个集成电路芯片,并且该基板包括至少部分延伸穿过其中的导电柱的第一和第二子集。 导电柱的第一子集中的每一个包括从衬底的表面突出的突出隆起焊盘,并且导电柱的第二子集各自部分地形成凹陷在衬底的表面内的迹线。 裸片经由多个导电凸块耦合到基板,每个导电凸块在突起凸块焊盘和模具中的一个之间延伸。
-
公开(公告)号:US07138328B2
公开(公告)日:2006-11-21
申请号:US10847775
申请日:2004-05-18
申请人: Susan H. Downey , Peter R. Harper
发明人: Susan H. Downey , Peter R. Harper
CPC分类号: H01L24/85 , H01L23/3128 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/745 , H01L2224/05554 , H01L2224/43827 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4554 , H01L2224/45565 , H01L2224/45686 , H01L2224/45693 , H01L2224/48091 , H01L2224/4813 , H01L2224/48227 , H01L2224/48465 , H01L2224/4911 , H01L2224/4912 , H01L2224/49171 , H01L2224/745 , H01L2224/7865 , H01L2224/85205 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0104 , H01L2924/01073 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19107 , Y10S228/904 , H01L2924/00014 , H01L2924/05042 , H01L2924/05032 , H01L2924/0503 , H01L2924/05442 , H01L2924/05341 , H01L2924/0532 , H01L2924/0535 , H01L2924/0543 , H01L2924/0536 , H01L2924/05342 , H01L2924/04642 , H01L2924/059 , H01L2924/00012 , H01L2924/01004 , H01L2924/00011 , H01L2224/78 , H01L2924/00 , H01L2924/00015 , H01L2224/45688 , H01L2924/0534 , H01L2924/053
摘要: A packaged IC including insulated wire for electrically connecting conductive structures of the packaged IC. In some embodiments, the packaged IC includes an IC die attached to a package substrate, where bond pads of the IC die are electrically connected to bond fingers of the substrate with insulated wire. The insulated wire has a conductive core and an insulator coating. In some examples, the insulator coating includes an inorganic covalently-bonded substance that is not an oxide of the electrically conductive core such as, e.g., silicon nitride or silicon oxide. In one example, the insulator coating is applied to a conductive core by a chemical vapor deposition (CVD) process such as a plasma enhanced chemical vapor deposition (PECVD).
摘要翻译: 一种封装IC,包括用于电连接封装IC的导电结构的绝缘线。 在一些实施例中,封装的IC包括附接到封装衬底的IC管芯,其中IC管芯的焊盘与绝缘电线与衬底的指状物电连接。 绝缘电线具有导电芯和绝缘体涂层。 在一些实例中,绝缘体涂层包括不是导电芯的氧化物的无机共价键合物质,例如氮化硅或氧化硅。 在一个示例中,通过化学气相沉积(CVD)工艺(诸如等离子体增强化学气相沉积(PECVD))将绝缘体涂层施加到导电芯。
-
公开(公告)号:US20160155697A1
公开(公告)日:2016-06-02
申请号:US15003632
申请日:2016-01-21
发明人: Yu-Min Liang , Jiun Yi Wu
IPC分类号: H01L23/498 , H01L23/00
CPC分类号: H01L23/49838 , H01L22/14 , H01L23/481 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H01L24/02 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/0401 , H01L2224/11614 , H01L2224/11622 , H01L2224/131 , H01L2224/13144 , H01L2224/13294 , H01L2224/133 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/16238 , H01L2224/1712 , H01L2224/17132 , H01L2224/81424 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81466 , H01L2224/81815 , H01L2924/01057 , H01L2924/01072 , H01L2924/05042 , H01L2924/0533 , H01L2924/0534 , H01L2924/05342 , H01L2924/05432 , H01L2924/05442 , H01L2924/05994 , H01L2924/14 , H01L2924/1531 , H01L2924/15787 , H01L2924/2064 , H01L2924/20641 , H05K1/0268 , H05K1/113 , H05K3/4007 , H05K3/4682 , H05K2201/0367 , H05K2201/096 , H05K2201/0989 , H05K2201/10674 , H05K2203/0353 , H01L2924/014 , H01L2924/00014
摘要: A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially therethrough. Each of the first subset of conductive pillars comprises a protrusion bump pad protruding from a surface of the substrate, and the second subset of conductive pillars each partially form a trace recessed within the surface of the substrate. The die is coupled to the substrate via a plurality of conductive bumps each extending between one of the protrusion bump pads and the die.
-
公开(公告)号:US09318471B2
公开(公告)日:2016-04-19
申请号:US14920289
申请日:2015-10-22
发明人: Tatsuya Kabe , Hideyuki Arai
IPC分类号: H01L21/00 , H01L25/065 , H01L23/00 , H01L27/06 , H01L23/522 , H01L21/768 , H01L49/02
CPC分类号: H01L25/0657 , H01L21/76898 , H01L23/5223 , H01L23/5227 , H01L24/05 , H01L24/08 , H01L24/80 , H01L27/0688 , H01L28/20 , H01L28/40 , H01L2224/05568 , H01L2224/05571 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05684 , H01L2224/0603 , H01L2224/06051 , H01L2224/08145 , H01L2224/80097 , H01L2224/80201 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/9202 , H01L2225/06513 , H01L2225/06541 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01074 , H01L2924/0132 , H01L2924/05042 , H01L2924/0534 , H01L2924/05442 , H01L2924/0549 , H01L2924/00014 , H01L2924/00012
摘要: A semiconductor device includes: a first substrate including a first surface layer that includes first and second electrodes; a second substrate including a second surface layer that includes third and fourth electrodes, and directly bonded to the first substrate such that the second surface layer is in contact with the first surface layer; and a functional film provided between the second and fourth electrodes. The first and third electrodes are bonded together so as to be in contact with each other, and the second electrode, the functional film, and the fourth electrode constitute a passive element.
摘要翻译: 一种半导体器件包括:第一衬底,包括包括第一和第二电极的第一表面层; 第二基板,包括包括第三和第四电极的第二表面层,并且直接接合到第一基板,使得第二表面层与第一表面层接触; 以及设置在第二和第四电极之间的功能膜。 第一和第三电极彼此接触结合在一起,并且第二电极,功能膜和第四电极构成无源元件。
-
公开(公告)号:US20150340331A1
公开(公告)日:2015-11-26
申请号:US14818922
申请日:2015-08-05
IPC分类号: H01L23/00
CPC分类号: H01L23/49822 , H01L21/76838 , H01L24/03 , H01L24/05 , H01L2224/0235 , H01L2224/02381 , H01L2224/0239 , H01L2224/024 , H01L2224/05013 , H01L2224/05024 , H01L2224/05092 , H01L2224/05553 , H01L2224/45124 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01073 , H01L2924/01079 , H01L2924/04642 , H01L2924/05042 , H01L2924/0534 , H01L2924/05432 , H01L2924/05442 , H01L2924/059 , H01L2924/05994 , H01L2924/1461 , H01L2924/01029 , H01L2924/00 , H01L2224/48
摘要: A semiconductor device can include a substrate and a trace layer positioned in proximity to the substrate and including a trace for supplying an electrical connection to the semiconductor device. Conductive layers can be positioned in proximity to the trace layer and form a bond pad. A non-conductive thin film layer can be positioned between the trace layer and the conductive layers. The thin film layer can include a via to enable the electrical connection from the trace to the bond pad. A portion of the trace between the substrate and the plurality of conductive layers can have a beveled edge.
摘要翻译: 半导体器件可以包括基板和位于基板附近的迹线层,并且包括用于向半导体器件提供电连接的迹线。 导电层可以位于跟踪层附近并形成接合焊盘。 非导电薄膜层可以位于迹线层和导电层之间。 薄膜层可以包括通孔以使得能够从迹线到接合焊盘的电连接。 衬底和多个导电层之间的迹线的一部分可以具有斜边。
-
公开(公告)号:US20150194404A1
公开(公告)日:2015-07-09
申请号:US14148482
申请日:2014-01-06
发明人: Yu-Min Liang , Jiun-Yi Wu
CPC分类号: H01L23/49838 , H01L22/14 , H01L23/481 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H01L24/02 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L2224/0401 , H01L2224/11614 , H01L2224/11622 , H01L2224/131 , H01L2224/13144 , H01L2224/13294 , H01L2224/133 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/16238 , H01L2224/1712 , H01L2224/17132 , H01L2224/81424 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81466 , H01L2224/81815 , H01L2924/01057 , H01L2924/01072 , H01L2924/05042 , H01L2924/0533 , H01L2924/0534 , H01L2924/05342 , H01L2924/05432 , H01L2924/05442 , H01L2924/05994 , H01L2924/14 , H01L2924/1531 , H01L2924/15787 , H01L2924/2064 , H01L2924/20641 , H05K1/0268 , H05K1/113 , H05K3/4007 , H05K3/4682 , H05K2201/0367 , H05K2201/096 , H05K2201/0989 , H05K2201/10674 , H05K2203/0353 , H01L2924/014 , H01L2924/00014
摘要: A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially therethrough. Each of the first subset of conductive pillars comprises a protrusion bump pad protruding from a surface of the substrate, and the second subset of conductive pillars each partially form a trace recessed within the surface of the substrate. The die is coupled to the substrate via a plurality of conductive bumps each extending between one of the protrusion bump pads and the die.
摘要翻译: 提供了一个管芯和一个衬底。 芯片包括至少一个集成电路芯片,并且该基板包括至少部分延伸穿过其中的导电柱的第一和第二子集。 导电柱的第一子集中的每一个包括从衬底的表面突出的突出隆起焊盘,并且导电柱的第二子集各自部分地形成凹陷在衬底的表面内的迹线。 裸片经由多个导电凸块耦合到基板,每个导电凸块在突起凸块焊盘和模具中的一个之间延伸。
-
-
-
-
-
-
-
-
-