公开(公告)号：US20060185892A1

公开(公告)日：2006-08-24

申请号：US11335125

申请日：2006-01-19

Applicant: Volker Guengerich ,  Horst Theuss

Inventor： Volker Guengerich ,  Horst Theuss

IPC: H05K1/16

CPC classification number: H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/66 ,  H01L24/28 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2223/6611 ,  H01L2223/6622 ,  H01L2223/6627 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/29101 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45033 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45572 ,  H01L2224/45573 ,  H01L2224/45686 ,  H01L2224/45688 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48235 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/4899 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2224/86205 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/1903 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K1/0243 ,  H05K3/341 ,  H05K2201/09472 ,  H05K2201/09809 ,  H05K2201/10287 ,  H05K2201/10356 ,  H01L2924/00014 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/83205

Abstract: A semiconductor device with micro connecting elements and method for producing the same disclosed. In one embodiment, the semiconductor device includes a number of micro connecting elements for the high-frequency coupling of components of the semiconductor device. The micro connecting elements have an at least three-layered structural form with a first layer of conducting material, a second layer of insulating material and a third layer of conducting material. In this configuration, the first and third layers and extend along a common center line and shield one another against electromagnetic interference fields. The first and third layers and are fixed on correspondingly adapted pairs of contact terminal areas of the components.

Abstract translation: 具有微连接元件的半导体器件及其制造方法。 在一个实施例中，半导体器件包括用于半导体器件的部件的高频耦合的多个微连接元件。 微连接元件具有至少三层结构形式，其具有第一层导电材料，第二层绝缘材料和第三层导电材料。 在该配置中，第一和第三层沿公共中心线延伸并相互屏蔽电磁干扰场。 第一和第三层并且固定在部件的相应适应的接触端子区域对上。

公开(公告)号：US07215031B2

公开(公告)日：2007-05-08

申请号：US10985020

申请日：2004-11-10

Applicant: Yoshimi Egawa

Inventor： Yoshimi Egawa

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L24/49 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45565 ,  H01L2224/45686 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4847 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/4899 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/83139 ,  H01L2224/85205 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06575 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45688 ,  H01L2924/01006

Abstract: A multi chip package includes a substrate; a first semiconductor chip mounted on the substrate; a second semiconductor chip mounted above the first semiconductor chip; a first bonding wire electrically coupled to a first bonding pad on the first semiconductor chip; and a second bonding wire electrically coupled to a second bonding pad on the second semiconductor chip. At least the first bonding wire is of a coated wire, which comprises a conductive core and an outer insulation coating. At least the first bonding pad is of a multi layered pad, comprising a base pad formed on the first semiconductor chip; a first conductive layer formed on the base pad; and a second conductive layer formed on the first conductive layer.

Abstract translation: 多芯片封装包括基板; 安装在所述基板上的第一半导体芯片; 安装在所述第一半导体芯片上方的第二半导体芯片; 电耦合到第一半导体芯片上的第一焊盘的第一接合线; 以及电耦合到第二半导体芯片上的第二接合焊盘的第二接合线。 至少第一接合线是涂覆线，其包括导电芯和外绝缘涂层。 至少第一焊盘是多层焊盘，包括形成在第一半导体芯片上的基座焊盘; 形成在所述基座上的第一导电层; 以及形成在所述第一导电层上的第二导电层。

公开(公告)号：US20070284415A1

公开(公告)日：2007-12-13

申请号：US11750051

申请日：2007-05-21

Applicant: Khalil Hosseini

Inventor： Khalil Hosseini

IPC: A47J36/02

CPC classification number: B23K20/004 ,  B23K35/0227 ,  B23K35/0261 ,  B23K35/0266 ,  B23K35/40 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/745 ,  H01L24/85 ,  H01L2224/43826 ,  H01L2224/43827 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4557 ,  H01L2224/45572 ,  H01L2224/45573 ,  H01L2224/456 ,  H01L2224/45624 ,  H01L2224/45686 ,  H01L2224/48472 ,  H01L2224/745 ,  H01L2224/7865 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01204 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/2076 ,  H01L2924/3025 ,  H01L2224/45693 ,  H01L2224/45138 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20755 ,  H01L2924/2075 ,  H01L2924/20754 ,  H01L2224/45688 ,  H01L2924/01203

Abstract: A semiconductor device having a bonding wire is disclosed. In one embodiment, it is a bonding wire for use in a wedge-wedge bonding process for bonding a semiconductor element. One embodiment includes a metallic wire core of greater hardness and a high electric and thermal conductivity and a metallic coating of lower hardness enveloping the wire core.

Abstract translation: 公开了一种具有接合线的半导体器件。 在一个实施例中，它是用于楔形楔形粘合工艺中用于接合半导体元件的接合线。 一个实施例包括具有较高硬度和高导电性和高导热性的金属线芯，以及包围线芯的较低硬度的金属涂层。

公开(公告)号：US20060086314A1

公开(公告)日：2006-04-27

申请号：US10971330

申请日：2004-10-21

Applicant: Fengyan Zhang ,  Robert Barrowcliff ,  Sheng Hsu

Inventor： Fengyan Zhang ,  Robert Barrowcliff ,  Sheng Hsu

IPC: C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14

CPC classification number: H01L24/48 ,  C30B25/005 ,  C30B29/16 ,  C30B29/62 ,  H01L24/45 ,  H01L24/49 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/43827 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45155 ,  H01L2224/45157 ,  H01L2224/45166 ,  H01L2224/45169 ,  H01L2224/45178 ,  H01L2224/45181 ,  H01L2224/45565 ,  H01L2224/45599 ,  H01L2224/45688 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48599 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/1033 ,  H01L2924/10335 ,  H01L2924/14 ,  H01L2924/20751 ,  Y10S977/762 ,  Y10S977/763 ,  Y10S977/811 ,  H01L2924/00014 ,  H01L2924/20651 ,  H01L2924/00 ,  H01L2924/01006

Abstract: Iridium oxide (IrOx) nanowires and a method forming the nanowires are provided. The method comprises: providing a growth promotion film with non-continuous surfaces, having a thickness in the range of 0.5 to 5 nanometers (nm), and made from a material such as Ti, Co, Ni, Au, Ta, polycrystalline silicon (poly-Si), SiGe, Pt, Ir, TiN, or TaN; establishing a substrate temperature in the range of 200 to 600 degrees C.; introducing oxygen as a precursor reaction gas; introducing a (methylcyclopentadienyl)(1,5-cyclooctadiene)iridium(I) precursor; using a metalorganic chemical vapor deposition (MOCVD) process, growing IrOx nanowires from the growth promotion film surfaces. The IrOx nanowires have a diameter in the range of 100 to 1000 Å, a length in the range of 1000 Å to 2 microns, an aspect ratio (length to width) of greater than 50:1. Further, the nanowires include single-crystal nanowire cores covered with an amorphous layer having a thickness of less than 10 Å.

Abstract translation: 提供氧化铱（IrOx）纳米线和形成纳米线的方法。 该方法包括：提供具有0.5至5纳米（nm）范围内的厚度的非连续表面的生长促进膜，并由诸如Ti，Co，Ni，Au，Ta，多晶硅 多晶硅），SiGe，Pt，Ir，TiN或TaN; 建立200〜600℃的基板温度。 引入氧气作为前体反应气体; 引入（甲基环戊二烯基）（1,5-环辛二烯）铱（I）前体; 使用金属有机化学气相沉积（MOCVD）工艺，从生长促进膜表面生长IrOx纳米线。 IrOx纳米线的直径在100至1000埃的范围内，长度在1000埃至2微米之间，纵横比（长宽比）大于50:1。 此外，纳米线包括覆盖有厚度小于Å的非晶层的单晶纳米线芯。

公开(公告)号：US20170264087A1

公开(公告)日：2017-09-14

申请号：US15529379

申请日：2015-11-26

Applicant: Elchai BEN-SHUSHAN ,  Zvi Iheskel LINKOVSKI ,  Mark GELLER ,  Shlomo ZUCKER

Inventor： Elchai BEN-SHUSHAN ,  Zvi Iheskel LINKOVSKI ,  Mark GELLER ,  Shlomo ZUCKER

IPC: H02G1/12 ,  H01L23/00 ,  H01B13/32 ,  H01L23/29

CPC classification number: H02G1/12 ,  H01B13/32 ,  H01L23/29 ,  H01L24/42 ,  H01L24/43 ,  H01L24/45 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/45565 ,  H01L2224/45688 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/43848

Abstract: A method for exposing a microwire from it glass coating in a glass coated microwire. The method for exposing the microwire is facilitated by way of sufficiently bending the glass coated microwire to break the glass coating while maintaining the embedded microwire intact.

公开(公告)号：US07468560B2

公开(公告)日：2008-12-23

申请号：US11335125

申请日：2006-01-19

Applicant: Volker Guengerich ,  Horst Theuss

Inventor： Volker Guengerich ,  Horst Theuss

IPC: H01L23/48 ,  H01L29/40

CPC classification number: H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/66 ,  H01L24/28 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2223/6611 ,  H01L2223/6622 ,  H01L2223/6627 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/29101 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45033 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45572 ,  H01L2224/45573 ,  H01L2224/45686 ,  H01L2224/45688 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48235 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/4899 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/85 ,  H01L2224/85205 ,  H01L2224/86205 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/1903 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K1/0243 ,  H05K3/341 ,  H05K2201/09472 ,  H05K2201/09809 ,  H05K2201/10287 ,  H05K2201/10356 ,  H01L2924/00014 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/83205

Abstract: A semiconductor device with micro connecting elements and method for producing the same disclosed. In one embodiment, the semiconductor device includes a number of micro connecting elements for the high-frequency coupling of components of the semiconductor device. The micro connecting elements have an at least three-layered structural form with a first layer of conducting material, a second layer of insulating material and a third layer of conducting material. In this configuration, the first and third layers and extend along a common center line and shield one another against electromagnetic interference fields. The first and third layers and are fixed on correspondingly adapted pairs of contact terminal areas of the components.

Abstract translation: 具有微连接元件的半导体器件及其制造方法。 在一个实施例中，半导体器件包括用于半导体器件的部件的高频耦合的多个微连接元件。 微连接元件具有至少三层结构形式，其具有第一层导电材料，第二层绝缘材料和第三层导电材料。 在该配置中，第一和第三层沿公共中心线延伸并相互屏蔽电磁干扰场。 第一和第三层并且固定在部件的相应适应的接触端子区域对上。

公开(公告)号：US07138328B2

公开(公告)日：2006-11-21

申请号：US10847775

申请日：2004-05-18

Applicant: Susan H. Downey ,  Peter R. Harper

Inventor： Susan H. Downey ,  Peter R. Harper

IPC: H01L21/44 ,  H01L29/40 ,  B23K31/00

CPC classification number: H01L24/85 ,  H01L23/3128 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/745 ,  H01L2224/05554 ,  H01L2224/43827 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/45686 ,  H01L2224/45693 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/4911 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/745 ,  H01L2224/7865 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  Y10S228/904 ,  H01L2924/00014 ,  H01L2924/05042 ,  H01L2924/05032 ,  H01L2924/0503 ,  H01L2924/05442 ,  H01L2924/05341 ,  H01L2924/0532 ,  H01L2924/0535 ,  H01L2924/0543 ,  H01L2924/0536 ,  H01L2924/05342 ,  H01L2924/04642 ,  H01L2924/059 ,  H01L2924/00012 ,  H01L2924/01004 ,  H01L2924/00011 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/45688 ,  H01L2924/0534 ,  H01L2924/053

Abstract: A packaged IC including insulated wire for electrically connecting conductive structures of the packaged IC. In some embodiments, the packaged IC includes an IC die attached to a package substrate, where bond pads of the IC die are electrically connected to bond fingers of the substrate with insulated wire. The insulated wire has a conductive core and an insulator coating. In some examples, the insulator coating includes an inorganic covalently-bonded substance that is not an oxide of the electrically conductive core such as, e.g., silicon nitride or silicon oxide. In one example, the insulator coating is applied to a conductive core by a chemical vapor deposition (CVD) process such as a plasma enhanced chemical vapor deposition (PECVD).

Abstract translation: 一种封装IC，包括用于电连接封装IC的导电结构的绝缘线。 在一些实施例中，封装的IC包括附接到封装衬底的IC管芯，其中IC管芯的焊盘与绝缘电线与衬底的指状物电连接。 绝缘电线具有导电芯和绝缘体涂层。 在一些实例中，绝缘体涂层包括不是导电芯的氧化物的无机共价键合物质，例如氮化硅或氧化硅。 在一个示例中，通过化学气相沉积（CVD）工艺（诸如等离子体增强化学气相沉积（PECVD））将绝缘体涂层施加到导电芯。

公开(公告)号：US07255745B2

公开(公告)日：2007-08-14

申请号：US10971330

申请日：2004-10-21

Applicant: Fengyan Zhang ,  Robert A. Barrowcliff ,  Sheng Teng Hsu

Inventor： Fengyan Zhang ,  Robert A. Barrowcliff ,  Sheng Teng Hsu

IPC: C30B29/62

CPC classification number: H01L24/48 ,  C30B25/005 ,  C30B29/16 ,  C30B29/62 ,  H01L24/45 ,  H01L24/49 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/43827 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45155 ,  H01L2224/45157 ,  H01L2224/45166 ,  H01L2224/45169 ,  H01L2224/45178 ,  H01L2224/45181 ,  H01L2224/45565 ,  H01L2224/45599 ,  H01L2224/45688 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48599 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/1033 ,  H01L2924/10335 ,  H01L2924/14 ,  H01L2924/20751 ,  Y10S977/762 ,  Y10S977/763 ,  Y10S977/811 ,  H01L2924/00014 ,  H01L2924/20651 ,  H01L2924/00 ,  H01L2924/01006

Abstract: Iridium oxide (IrOx) nanowires and a method forming the nanowires are provided. The method comprises: providing a growth promotion film with non-continuous surfaces, having a thickness in the range of 0.5 to 5 nanometers (nm), and made from a material such as Ti, Co, Ni, Au, Ta, polycrystalline silicon (poly-Si), SiGe, Pt, Ir, TiN, or TaN; establishing a substrate temperature in the range of 200 to 600 degrees C.; introducing oxygen as a precursor reaction gas; introducing a (methylcyclopentadienyl)(1,5-cyclooctadiene)iridium(I) precursor; using a metalorganic chemical vapor deposition (MOCVD) process, growing IrOx nanowires from the growth promotion film surfaces. The IrOx nanowires have a diameter in the range of 100 to 1000 Å, a length in the range of 1000 Å to 2 microns, an aspect ratio (length to width) of greater than 50:1. Further, the nanowires include single-crystal nanowire cores covered with an amorphous layer having a thickness of less than 10 Å.

Abstract translation: 提供氧化铱（IrOx）纳米线和形成纳米线的方法。 该方法包括：提供具有0.5至5纳米（nm）范围内的厚度的非连续表面的生长促进膜，并由诸如Ti，Co，Ni，Au，Ta，多晶硅 多晶硅），SiGe，Pt，Ir，TiN或TaN; 建立200〜600℃的基板温度。 引入氧气作为前体反应气体; 引入（甲基环戊二烯基）（1,5-环辛二烯）铱（I）前体; 使用金属有机化学气相沉积（MOCVD）工艺，从生长促进膜表面生长IrOx纳米线。 IrOx纳米线的直径在100至1000埃的范围内，长度在1000埃至2微米之间，纵横比（长宽比）大于50:1。 此外，纳米线包括覆盖有厚度小于Å的非晶层的单晶纳米线芯。

公开(公告)号：US20060097374A1

公开(公告)日：2006-05-11

申请号：US10985020

申请日：2004-11-10

Applicant: Yoshimi Egawa

Inventor： Yoshimi Egawa

IPC: H01L23/02

CPC classification number: H01L24/49 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45565 ,  H01L2224/45686 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4847 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/4899 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/83139 ,  H01L2224/85205 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06575 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45688 ,  H01L2924/01006

Abstract: A multi chip package includes a substrate; a first semiconductor chip mounted on the substrate; a second semiconductor chip mounted above the first semiconductor chip; a first bonding wire electrically coupled to a first bonding pad on the first semiconductor chip; and a second bonding wire electrically coupled to a second bonding pad on the second semiconductor chip. At least the first bonding wire is of a coated wire, which comprises a conductive core and an outer insulation coating. At least the first bonding pad is of a multi layered pad, comprising a base pad formed on the first semiconductor chip; a first conductive layer formed on the base pad; and a second conductive layer formed on the first conductive layer.

Abstract translation: 多芯片封装包括基板; 安装在所述基板上的第一半导体芯片; 安装在所述第一半导体芯片上方的第二半导体芯片; 电耦合到第一半导体芯片上的第一焊盘的第一接合线; 以及电耦合到第二半导体芯片上的第二接合焊盘的第二接合线。 至少第一接合线是包覆导线，其包括导电芯和外绝缘涂层。 至少第一焊盘是多层焊盘，包括形成在第一半导体芯片上的基座焊盘; 形成在所述基座上的第一导电层; 以及形成在所述第一导电层上的第二导电层。

公开(公告)号：US20040217458A1

公开(公告)日：2004-11-04

申请号：US10847775

申请日：2004-05-18

Inventor： Susan H. Downey ,  Peter R. Harper

IPC: H01L023/58

CPC classification number: H01L24/85 ,  H01L23/3128 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/745 ,  H01L2224/05554 ,  H01L2224/43827 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/45686 ,  H01L2224/45693 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/4911 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/745 ,  H01L2224/7865 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  Y10S228/904 ,  H01L2924/00014 ,  H01L2924/05042 ,  H01L2924/05032 ,  H01L2924/0503 ,  H01L2924/05442 ,  H01L2924/05341 ,  H01L2924/0532 ,  H01L2924/0535 ,  H01L2924/0543 ,  H01L2924/0536 ,  H01L2924/05342 ,  H01L2924/04642 ,  H01L2924/059 ,  H01L2924/00012 ,  H01L2924/01004 ,  H01L2924/00011 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/45688 ,  H01L2924/0534 ,  H01L2924/053

Abstract: A packaged IC including insulated wire for electrically connecting conductive structures of the packaged IC. In some embodiments, the packaged IC includes an IC die attached to a package substrate, where bond pads of the IC die are electrically connected to bond fingers of the substrate with insulated wire. The insulated wire has a conductive core and an insulator coating. In some examples, the insulator coating includes an inorganic covalently-bonded substance that is not an oxide of the electrically conductive core such as, e.g., silicon nitride or silicon oxide. In one example, the insulator coating is applied to a conductive core by a chemical vapor deposition (CVD) process such as a plasma enhanced chemical vapor deposition (PECVD).