公开(公告)号：US09972597B2

公开(公告)日：2018-05-15

申请号：US14800613

申请日：2015-07-15

Applicant: HYUNDAI MOTOR COMPANY

Inventor： Kyoung-Kook Hong ,  Hyun Woo Noh ,  Youngkyun Jung ,  Dae Hwan Chun ,  Jong Seok Lee ,  Su Bin Kang

IPC: B23K31/00 ,  B23K35/00 ,  H01L23/00 ,  B23K35/02 ,  B23K35/26 ,  B23K35/30 ,  B23K20/02 ,  B23K20/16 ,  B23K20/233 ,  H05K3/34 ,  B23K101/42 ,  B23K103/16

CPC classification number: H01L24/83 ,  B23K20/026 ,  B23K20/16 ,  B23K20/233 ,  B23K35/025 ,  B23K35/264 ,  B23K35/3006 ,  B23K2101/42 ,  B23K2103/166 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/13294 ,  H01L2224/13313 ,  H01L2224/13339 ,  H01L2224/16227 ,  H01L2224/16505 ,  H01L2224/29294 ,  H01L2224/29313 ,  H01L2224/29339 ,  H01L2224/32227 ,  H01L2224/32505 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81825 ,  H01L2224/8184 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2924/00015 ,  H01L2924/10272 ,  H01L2924/201 ,  H01L2924/2075 ,  H01L2924/20751 ,  H05K3/341 ,  H05K3/3463 ,  H05K2201/10166 ,  H05K2203/1131 ,  H01L2224/29388 ,  H01L2924/00014 ,  H01L2224/13388 ,  H01L2924/00012

Abstract: A method for bonding with a silver paste includes coating a semiconductor device or a substrate with the silver paste. The silver paste contains a plurality of silver particles and a plurality of bismuth particles. The method further includes disposing the semiconductor on the substrate and forming a bonding layer by heating the silver paste, wherein the semiconductor and the substrate are bonded to each other by the bonding layer.

公开(公告)号：US09972591B2

公开(公告)日：2018-05-15

申请号：US15419069

申请日：2017-01-30

Applicant: Renesas Electronics Corporation

Inventor： Hideki Harano

IPC: H01L21/44 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L24/11 ,  H01L21/563 ,  H01L23/3142 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13006 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/14131 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/92125 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/00

Abstract: To improve reliability of a semiconductor device, in a method of manufacturing the semiconductor device, a semiconductor substrate having an insulating film in which an opening that exposes each of a plurality of electrode pads is formed is provided, and a flux member including conductive particles is arranged over each of the electrode pads. Thereafter, a solder ball is arranged over each of the electrode pads via the flux member, and is then heated via the flux member so that the solder ball is bonded to each of the electrode pads. The width of the opening of the insulating film is smaller than the width (diameter) of the solder ball.

公开(公告)号：US20180090463A1

公开(公告)日：2018-03-29

申请号：US15816568

申请日：2017-11-17

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yukihiro SATOU ,  Toshiyuki HATA

IPC: H01L23/00 ,  H01L29/78 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L24/49 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L29/7827 ,  H01L2224/02166 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/37124 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/73221 ,  H01L2224/8385 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/1811 ,  H01L2924/2075 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/206

Abstract: A semiconductor device includes a header, a semiconductor chip fixed to the header constituting a MOSFET, and a sealing body of insulating resin which covers the semiconductor chip, the header and the like, and further includes a drain lead contiguously formed with the header and projects from one side surface of the sealing body, and a source lead and a gate lead which project in parallel from one side surface of the sealing body, and wires which are positioned in the inside of the sealing body and connect electrodes on an upper surface of the semiconductor chip and the source lead and the gate lead, with a gate electrode pad arranged at a position from the gate lead and the source lead farther than a source electrode pad.

公开(公告)号：US09875988B2

公开(公告)日：2018-01-23

申请号：US14927361

申请日：2015-10-29

Applicant: Semtech Corporation

Inventor： Satyamoorthi Chinnusamy ,  Weng Hing Tan ,  Andrew Pan ,  Kok Khoon Ho

IPC: H01L21/44 ,  H01L25/065 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/495 ,  H01L23/498 ,  H01L25/00 ,  H01L23/552 ,  H01L23/29 ,  H01L23/433 ,  H01L23/00

CPC classification number: H01L25/065 ,  H01L21/4825 ,  H01L21/486 ,  H01L21/4882 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3192 ,  H01L23/367 ,  H01L23/4334 ,  H01L23/49541 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/05008 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13005 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13184 ,  H01L2224/16057 ,  H01L2224/16238 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/3841 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/01046 ,  H01L2924/2064 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2224/03 ,  H01L2224/81

Abstract: A semiconductor device has a first semiconductor die disposed over a substrate. A plurality of composite interconnect structures are formed over the semiconductor die. The composite interconnect structures have a non-fusible conductive pillar and a fusible layer formed over the non-fusible conductive pillar. The fusible layer is reflowed to connect the first semiconductor die to a conductive layer of the substrate. The non-fusible conductive pillar does not melt during reflow eliminating a need to form a solder resist over the substrate. An encapsulant is deposited around the first semiconductor die and composite interconnect structures. The encapsulant flows between the active surface of the first semiconductor die and the substrate. A second semiconductor die is disposed over the substrate adjacent to the first semiconductor die. A heat spreader is disposed over the first semiconductor die. A portion of the encapsulant is removed to expose the heat spreader.

公开(公告)号：US09754831B2

公开(公告)日：2017-09-05

申请号：US15243527

申请日：2016-08-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Pei-Ching Kuo ,  Yi-Hsiu Chen ,  Jun-Lin Yeh ,  Yung-Chi Lin ,  Li-Han Hsu ,  Wei-Cheng Wu ,  Ku-Feng Yang ,  Wen-Chih Chiou

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/00 ,  H01L23/528 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76898 ,  H01L21/76802 ,  H01L21/7684 ,  H01L21/76879 ,  H01L23/481 ,  H01L23/522 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L24/06 ,  H01L2224/05025 ,  H01L2924/2075 ,  H01L2924/20751

Abstract: Apparatus, and methods of manufacture thereof, in which metal is deposited into openings, thus forming a plurality of metal pads, a plurality of through-silicon-vias (TSVs), a plurality of metal lines, a plurality of first dummy structures, and a plurality of second dummy structures. Ones of the plurality of first dummy structures each have a first width that is at least about three times greater than a second width of each of the plurality of metal lines, and ones of the plurality of second dummy structures each have a third width that is at least about five times greater than the second width of each of the plurality of metal lines.

公开(公告)号：US09653425B2

公开(公告)日：2017-05-16

申请号：US14836859

申请日：2015-08-26

Applicant: Apple Inc.

Inventor： Bo Zhang ,  Sang Ha Kim ,  Cyrus Y. Liu ,  Kuo-Hua Sung

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00

CPC classification number: H01L24/83 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/32227 ,  H01L2224/83203 ,  H01L2224/83851 ,  H01L2224/83874 ,  H01L2924/2075

Abstract: Anisotropic conductive film (ACF) structures and manufacturing methods for forming the same are described. The manufacturing methods include preventing clusters of conductive particles from forming between adjacent bonding pads and that are associated with electrical shorting of ACF structures. In some embodiments, the methods involve use of multiple layered ACF materials that include a non-electrically conductive layer that reduces the likelihood of formation of conductive particle clusters between bonding pads. In some embodiment, the methods include the use of ultraviolet sensitive ACF material combined with lithography techniques that eliminate conductive particles from between neighboring bonding pads. In some embodiments, the methods involve the use of insulation spacers that block conductive particles from entering between bonding pads. Any suitable combination of the described methods can be used.

公开(公告)号：US20170125375A1

公开(公告)日：2017-05-04

申请号：US14927361

申请日：2015-10-29

Applicant: Semtech Corporation

Inventor： Satyamoorthi Chinnusamy ,  Weng Hing Tan ,  Andrew Pan ,  Kok Khoon Ho

IPC: H01L25/065 ,  H01L23/367 ,  H01L21/48 ,  H01L23/498 ,  H01L25/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L25/065 ,  H01L21/4825 ,  H01L21/486 ,  H01L21/4882 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3192 ,  H01L23/367 ,  H01L23/4334 ,  H01L23/49541 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/05008 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13005 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13184 ,  H01L2224/16057 ,  H01L2224/16238 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/3841 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/01046 ,  H01L2924/2064 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2224/03 ,  H01L2224/81

Abstract: A semiconductor device has a first semiconductor die disposed over a substrate. A plurality of composite interconnect structures are formed over the semiconductor die. The composite interconnect structures have a non-fusible conductive pillar and a fusible layer formed over the non-fusible conductive pillar. The fusible layer is reflowed to connect the first semiconductor die to a conductive layer of the substrate. The non-fusible conductive pillar does not melt during reflow eliminating a need to form a solder resist over the substrate. An encapsulant is deposited around the first semiconductor die and composite interconnect structures. The encapsulant flows between the active surface of the first semiconductor die and the substrate. A second semiconductor die is disposed over the substrate adjacent to the first semiconductor die. A heat spreader is disposed over the first semiconductor die. A portion of the encapsulant is removed to expose the heat spreader.

公开(公告)号：US20170117231A1

公开(公告)日：2017-04-27

申请号：US15344990

申请日：2016-11-07

Applicant: Invensas Corporation

Inventor： Abiola Awujoola ,  Zhuowen Sun ,  Wael Zohni ,  Ashok S. Prabhu ,  Willmar Subido

IPC: H01L23/552 ,  H01L23/498 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/552 ,  H01L23/49811 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/04042 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/215 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/4942 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73227 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05599

Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.

公开(公告)号：US09391039B2

公开(公告)日：2016-07-12

申请号：US14446788

申请日：2014-07-30

Applicant: MK Electron Co., Ltd.

Inventor： Jeong Tak Moon ,  Jae Yeol Son ,  Santosh Kumar ,  Eung Jae Kim ,  Hui Joong Kim ,  Ho Gun Cha

IPC: H01L23/48 ,  H01L23/00 ,  H01B1/02

CPC classification number: H01L24/17 ,  H01B1/026 ,  H01L24/05 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13111 ,  H01L2224/13647 ,  H01L2224/16113 ,  H01L2224/16157 ,  H01L2224/16225 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/207 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/00014

Abstract: A solder ball and a semiconductor device using the same are provided. In a Sn-based solder ball in which a first plating layer and a second plating layer are sequentially formed on a core ball, the second plating layer includes a Sn—Ag—Cu alloy, and Ag3Sn intermetallic compound (IMC) nanoparticles or Ag—Sn compound nanoparticles exist in the second plating layer. The solder balls have high sphericity and stand-off characteristics and connection reliability so that a semiconductor device having a high degree of integration may be implemented.

Abstract translation: 提供了一种焊球和使用其的半导体器件。 在其中在芯球上依次形成第一镀层和第二镀层的Sn基焊料球中，第二镀层包括Sn-Ag-Cu合金，Ag 3 Sn金属间化合物（IMC）纳米颗粒或Ag- Sn化合物纳米粒子存在于第二镀层中。 焊球具有高球形度，隔离特性和连接可靠性，从而可以实现具有高集成度的半导体器件。

公开(公告)号：US09391002B2

公开(公告)日：2016-07-12

申请号：US14086259

申请日：2013-11-21

Applicant: Amphenol Thermometrics, Inc.

Inventor： Nickolai S. Belov

IPC: H01L23/48 ,  H01L23/00 ,  G01L9/00 ,  G01L19/00

CPC classification number: H01L23/481 ,  G01L9/0054 ,  G01L19/0076 ,  G01L19/0092 ,  H01L24/09 ,  H01L24/45 ,  H01L24/49 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/49 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01032 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/207 ,  H01L2924/2075 ,  H01L2924/20757 ,  H01L2924/20756 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2224/05599

Abstract: Semiconductor sensor chips are provided. In some embodiments, a semiconductor sensor chip can include at least one wire bond pad on one side thereof, at least one bond pad on another, opposite side thereof, and at least one through-silicon via (TSV) extending therebetween and electrically connected to the bond pads on opposite sides of the chip. Each of the bond pads can have a wire attached thereto. In some embodiments, a semiconductor sensor chip can include a pressure sensor, a substrate, and a resistor in a well that provides p-n junction isolation from a body of the substrate. In some embodiments, a semiconductor sensor chip can include a plurality of wire bonds pads with a wire soldered to each of the bond pads. Each of the wires can be soldered with a longitudinal length thereof soldered to its associated bond pad.

Abstract translation: 提供半导体传感器芯片。 在一些实施例中，半导体传感器芯片可以包括在其一侧上的至少一个引线接合焊盘，在其另一侧上的至少一个接合焊盘，以及在其之间延伸的至少一个穿硅通孔（TSV），并且电连接到 芯片对面的接合焊盘。 每个接合焊盘可以具有附接到其上的导线。 在一些实施例中，半导体传感器芯片可以包括压力传感器，衬底和在从衬底的主体提供p-n结隔离的阱中的电阻器。 在一些实施例中，半导体传感器芯片可以包括多个引线接合焊盘，焊盘焊接到每个接合焊盘。 每个电线可以焊接，其纵向长度焊接到其相关联的焊盘。