Invention Grant
US07215031B2 Multi chip package 有权
多芯片封装

Multi chip package
Abstract:
A multi chip package includes a substrate; a first semiconductor chip mounted on the substrate; a second semiconductor chip mounted above the first semiconductor chip; a first bonding wire electrically coupled to a first bonding pad on the first semiconductor chip; and a second bonding wire electrically coupled to a second bonding pad on the second semiconductor chip. At least the first bonding wire is of a coated wire, which comprises a conductive core and an outer insulation coating. At least the first bonding pad is of a multi layered pad, comprising a base pad formed on the first semiconductor chip; a first conductive layer formed on the base pad; and a second conductive layer formed on the first conductive layer.
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