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公开(公告)号：US12087715B2
公开(公告)日：2024-09-10
申请号：US18053220
申请日：2022-11-07
发明人： Shu-Wei Chung , Yen-Sen Wang
IPC分类号： H01L23/00 , G06F30/394 , H01L21/768
CPC分类号： H01L24/03 , G06F30/394 , H01L21/76865 , H01L2224/02313 , H01L2224/0235 , H01L2224/03001 , H01L2224/0347 , H01L2924/3512
摘要： A method includes forming a seed layer on a semiconductor wafer, coating a photo resist on the seed layer, performing a photo lithography process to expose the photo resist, and developing the photo resist to form an opening in the photo resist. The seed layer is exposed, and the opening includes a first opening of a metal pad and a second opening of a metal line connected to the first opening. At a joining point of the first opening and the second opening, a third opening of a metal patch is formed, so that all angles of the opening and adjacent to the first opening are greater than 90 degrees. The method further includes plating the metal pad, the metal line, and the metal patch in the opening in the photo resist, removing the photo resist, and etching the seed layer to leave the metal pad, the metal line and the metal patch.
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公开(公告)号：US12074126B2
公开(公告)日：2024-08-27
申请号：US17725413
申请日：2022-04-20
发明人： Liang Wang , Qian Xu
IPC分类号： H01L23/00
CPC分类号： H01L24/02 , H01L24/03 , H01L24/05 , H01L2224/0235 , H01L2224/0239 , H01L2224/03614 , H01L2224/03622 , H01L2224/0391 , H01L2224/05008 , H01L2924/01013 , H01L2924/01022 , H01L2924/04941
摘要： A semiconductor structure and a method of manufacturing the semiconductor structure are provided. The semiconductor structure includes a substrate including a plurality of pads spaced apart from each other, a first groove, and a second groove connected with the first groove, the first and the second grooves located in the substrate. The first groove is located on the side of the second groove away from the plurality of pads, and the bottom of the second groove exposes a corresponding pad of the plurality of pads. The orthographic projection of the second groove on the substrate is located within the orthographic projection of the first groove on the substrate. A redistribution layer is disposed on a surface of the corresponding pad, the inner wall of the first groove, and the inner wall and the bottom of the second groove. The semiconductor structure prevents contamination or damage of test probes.
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公开(公告)号：US11967573B2
公开(公告)日：2024-04-23
申请号：US18166960
申请日：2023-02-09
发明人： Hsiang-Ku Shen , Dian-Hau Chen
IPC分类号： H01L23/00
CPC分类号： H01L24/05 , H01L24/13 , H01L2224/02311 , H01L2224/02313 , H01L2224/02333 , H01L2224/0235 , H01L2224/02381 , H01L2224/0239 , H01L2224/0401 , H01L2224/05647 , H01L2224/10126 , H01L2224/13024 , H01L2224/1357
摘要： A semiconductor structure includes a first dielectric layer over a metal line and a redistribution layer (RDL) over the first dielectric layer. The RDL is electrically connected to the metal line. The RDL has a curved top surface and a footing feature, where the footing feature extends laterally from a side surface of the RDL. A second dielectric layer is disposed over the RDL, where the second dielectric layer also has a curved top surface.
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公开(公告)号：US20230207501A1
公开(公告)日：2023-06-29
申请号：US17725413
申请日：2022-04-20
发明人： Liang WANG , Qian XU
IPC分类号： H01L23/00
CPC分类号： H01L24/02 , H01L24/03 , H01L24/05 , H01L2224/0235 , H01L2224/0239 , H01L2224/03614 , H01L2224/03622 , H01L2224/0391 , H01L2224/05008 , H01L2924/01013 , H01L2924/01022 , H01L2924/04941
摘要： A semiconductor structure and a method of manufacturing the semiconductor structure are provided. The semiconductor structure includes a substrate including a plurality of pads spaced apart from each other, a first groove, and a second groove connected with the first groove, the first and the second grooves located in the substrate. The first groove is located on the side of the second groove away from the plurality of pads, and the bottom of the second groove exposes a corresponding pad of the plurality of pads. The orthographic projection of the second groove on the substrate is located within the orthographic projection of the first groove on the substrate. A redistribution layer is disposed on a surface of the corresponding pad, the inner wall of the first groove, and the inner wall and the bottom of the second groove. The semiconductor structure prevents contamination or damage of test probes.
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公开(公告)号：US20180308815A1
公开(公告)日：2018-10-25
申请号：US16025267
申请日：2018-07-02
发明人： Dae Jung Byun , Byung Ho Kim , Pyung Hwa Han , Joo Young Choi , Ung Hui Shin
IPC分类号： H01L23/00 , H01L23/28 , H01L23/522
CPC分类号： H01L24/09 , H01L23/28 , H01L23/5226 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/25 , H01L24/82 , H01L2224/0235 , H01L2224/02375 , H01L2224/02377 , H01L2224/02379 , H01L2224/02381 , H01L2224/0401 , H01L2224/04105 , H01L2224/05559 , H01L2224/05569 , H01L2224/05572 , H01L2224/06165 , H01L2224/06167 , H01L2224/12105 , H01L2224/13023 , H01L2224/13024 , H01L2224/131 , H01L2224/16238 , H01L2224/18 , H01L2224/20 , H01L2224/221 , H01L2224/24155 , H01L2224/244 , H01L2224/25171 , H01L2224/25175 , H01L2924/15153 , H01L2924/15311 , H01L2924/3511 , H01L2924/014
摘要： A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; and an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip. The first interconnection member includes a first insulating layer in contact with the second interconnection member, a first redistribution layer disposed on a surface of the first insulating layer in contact with the second interconnection member and electrically connected to the connection pads, and a blocking layer disposed on the surface of the first insulating layer on which the first redistribution layer is disposed and surrounding the through-hole.
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公开(公告)号：US20180308811A1
公开(公告)日：2018-10-25
申请号：US15495271
申请日：2017-04-24
发明人： Chung-Hsuan TSAI
IPC分类号： H01L23/00 , H01L23/31 , H01L21/683
CPC分类号： H01L24/02 , H01L21/6835 , H01L23/3114 , H01L24/13 , H01L24/96 , H01L2221/68359 , H01L2224/02311 , H01L2224/0233 , H01L2224/0235 , H01L2224/12105 , H01L2224/13023 , H01L2224/13024 , H01L2224/13025
摘要： A semiconductor package device comprises a die, a dielectric layer, a plurality of conductive pillars and a package body. The die has an active surface, a back surface opposite to the active surface and a lateral surface extending between the active surface and the back surface. The dielectric layer is on the active surface of die, has a top surface and defines a plurality of openings. Each conductive pillar is disposed in a corresponding opening of the plurality of openings of the dielectric layer. Each conductive pillar is electrically connected to the die. Each conductive pillar has a top surface. The top surface of each conductive pillar is lower than the top surface of the dielectric layer. The package body encapsulates the back surface and the lateral surface of the die.
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公开(公告)号：US10061967B2
公开(公告)日：2018-08-28
申请号：US15663304
申请日：2017-07-28
发明人： Yong Ho Baek , Jung Hyun Cho , Byoung Chan Kim
CPC分类号： G06K9/00053 , G06K9/0002 , H01L21/561 , H01L21/568 , H01L21/768 , H01L23/3128 , H01L24/05 , H01L24/13 , H01L24/17 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/25 , H01L24/26 , H01L2224/0235 , H01L2224/02375 , H01L2224/02379 , H01L2224/02381 , H01L2224/0401 , H01L2224/04105 , H01L2224/05559 , H01L2224/05569 , H01L2224/05572 , H01L2224/12105 , H01L2224/13023 , H01L2224/13024 , H01L2224/16238 , H01L2224/18 , H01L2224/20 , H01L2224/221 , H01L2224/24155 , H01L2224/244 , H01L2224/25171 , H01L2224/25175 , H01L2924/15153
摘要： A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface with connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member respectively include first redistribution layers and second redistribution layers electrically connected to the connection pads and formed of one or more layers, at least one of the first redistribution layers is disposed between a plurality of insulating layers of the first connection member, and at least one of the second redistribution layers includes sensor patterns recognizing a fingerprint.
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公开(公告)号：US20180240736A1
公开(公告)日：2018-08-23
申请号：US15853979
申请日：2017-12-26
发明人： Chen-Heng Liu , Yung-Fu Chang
IPC分类号： H01L23/482 , H01L23/00 , H01L23/498 , H01L21/02
CPC分类号： H01L23/4824 , H01L21/02118 , H01L22/32 , H01L23/3114 , H01L23/3192 , H01L23/49811 , H01L23/5256 , H01L24/02 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L2224/0235 , H01L2224/0236 , H01L2224/02373 , H01L2224/02375 , H01L2224/02379 , H01L2224/0401 , H01L2224/04042 , H01L2224/05548 , H01L2224/05554 , H01L2224/05573 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2924/00014
摘要： Provided is a package structure including a substrate, a metal pad, a first polymer layer, a second polymer layer, a redistribution layer (RDL), and a third polymer layer. The metal pad is located on the substrate. The first polymer layer is located on the substrate. The first polymer layer has a first opening which exposes a portion of a top surface of the metal pad. The second polymer layer is located on the first polymer layer. The second polymer layer has a second opening which exposes the portion of the top surface of the metal pad and a first top surface of the first polymer layer. The RDL covers the portion of the top surface of the metal pad and extends onto a portion of the first top surface of the first polymer layer and the second polymer layer. The third polymer layer is located on the RDL.
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公开(公告)号：US20180232556A1
公开(公告)日：2018-08-16
申请号：US15951677
申请日：2018-04-12
发明人： Yong Ho BAEK , Jung Hyun CHO , Byoung Chan KIM
IPC分类号： G06K9/00 , H01L23/00 , H01L23/31 , H01L21/56 , H01L21/768
CPC分类号： G06K9/00053 , G06K9/0002 , H01L21/561 , H01L21/568 , H01L21/768 , H01L23/3128 , H01L24/05 , H01L24/13 , H01L24/17 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/25 , H01L24/26 , H01L2224/0235 , H01L2224/02375 , H01L2224/02379 , H01L2224/02381 , H01L2224/0401 , H01L2224/04105 , H01L2224/05559 , H01L2224/05569 , H01L2224/05572 , H01L2224/12105 , H01L2224/13023 , H01L2224/13024 , H01L2224/16238 , H01L2224/18 , H01L2224/20 , H01L2224/221 , H01L2224/24155 , H01L2224/244 , H01L2224/25171 , H01L2224/25175 , H01L2924/15153
摘要： A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface with connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member respectively include first redistribution layers and second redistribution layers electrically connected to the connection pads and formed of one or more layers, at least one of the first redistribution layers is disposed between a plurality of insulating layers of the first connection member, and at least one of the second redistribution layers includes sensor patterns recognizing a fingerprint.
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公开(公告)号：US20180174992A1
公开(公告)日：2018-06-21
申请号：US15839818
申请日：2017-12-12
发明人： Fayou Yin , Zeqiang Yao , Ming Xiao , Heng Li
CPC分类号： H01L24/13 , H01L21/56 , H01L23/3171 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/14 , H01L2224/0231 , H01L2224/02331 , H01L2224/0235 , H01L2224/02372 , H01L2224/02381 , H01L2224/0239 , H01L2224/024 , H01L2224/0345 , H01L2224/0346 , H01L2224/03462 , H01L2224/0347 , H01L2224/0391 , H01L2224/05007 , H01L2224/05008 , H01L2224/0508 , H01L2224/05096 , H01L2224/05124 , H01L2224/05147 , H01L2224/05611 , H01L2224/05616 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/11 , H01L2224/11019 , H01L2224/1146 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13017 , H01L2224/13024 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/1411 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01046 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/066 , H01L2924/07025 , H01L2924/14 , H01L2924/2064 , H01L2924/00014 , H01L2924/014
摘要： A semiconductor device having a redistribution layer and a first coating layer. The redistribution layer is formed on a passivation layer of the semiconductor device and has sidewalls and a top surface. The first coating layer covers the sidewalls and the top surface of the redistribution layer. The first coating layer is conductive so that through a conductive bump coupled to the first coating layer, an external circuit is coupled to an electrical terminal of an integrated circuit of the semiconductor device. The first coating layer has sidewalls and a top surface. A second coating layer covers the sidewalls and a part of the top surface of the first coating layer and a part of the passivation layer.
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