公开(公告)号：US20240363561A1

公开(公告)日：2024-10-31

申请号：US18768621

申请日：2024-07-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shu-Wei Chung ,  Yen-Sen Wang

IPC: H01L23/00 ,  G06F30/394 ,  H01L21/768

CPC classification number: H01L24/03 ,  G06F30/394 ,  H01L21/76865 ,  H01L2224/02313 ,  H01L2224/0235 ,  H01L2224/03001 ,  H01L2224/0347 ,  H01L2924/3512

Abstract: A method includes forming a seed layer on a semiconductor wafer, coating a photo resist on the seed layer, performing a photo lithography process to expose the photo resist, and developing the photo resist to form an opening in the photo resist. The seed layer is exposed, and the opening includes a first opening of a metal pad and a second opening of a metal line connected to the first opening. At a joining point of the first opening and the second opening, a third opening of a metal patch is formed, so that all angles of the opening and adjacent to the first opening are greater than 90 degrees. The method further includes plating the metal pad, the metal line, and the metal patch in the opening in the photo resist, removing the photo resist, and etching the seed layer to leave the metal pad, the metal line and the metal patch.

公开(公告)号：US12080636B2

公开(公告)日：2024-09-03

申请号：US17310851

申请日：2019-12-09

Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION

Inventor： Koichi Igarashi

IPC: H01L23/498 ,  H01L23/00 ,  H01L27/146

CPC classification number: H01L23/49816 ,  H01L23/49822 ,  H01L24/03 ,  H01L24/05 ,  H01L24/16 ,  H01L27/14618 ,  H01L2224/0219 ,  H01L2224/03019 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/16225

Abstract: In a semiconductor package in which a semiconductor substrate is mounted, thermal resistance of the semiconductor substrate is reduced. The semiconductor package includes a semiconductor substrate, an insulating layer, a metal layer, an interposer substrate, a mounting substrate, a signal transmission solder ball, and a solder member. A pad is provided on one surface of the semiconductor substrate. A different surface of the semiconductor substrate is covered with the insulating layer. The metal layer covers the insulating layer. A wire to be connected to the pad is formed on the interposer substrate. The signal transmission solder ball is jointed to the wire and the mounting substrate, and transmits a predetermined electrical signal. The solder member is jointed to the metal layer and the mounting substrate.

公开(公告)号：US11990435B2

公开(公告)日：2024-05-21

申请号：US17867287

申请日：2022-07-18

Applicant: Amkor Technology Singapore Holding Pte. Ltd.

Inventor： Sung Sun Park ,  Ji Young Chung ,  Christopher Berry

IPC: G06V40/13 ,  B81C3/00 ,  H01L23/00 ,  H01L23/053 ,  H01L23/31

CPC classification number: H01L24/05 ,  B81C3/00 ,  G06V40/13 ,  G06V40/1329 ,  H01L23/053 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L23/3128 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05684 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16227 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/27622 ,  H01L2224/2784 ,  H01L2224/29006 ,  H01L2224/29007 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/29299 ,  H01L2224/2939 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/8146 ,  H01L2224/81464 ,  H01L2224/81466 ,  H01L2224/81471 ,  H01L2224/81484 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/83101 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2924/014 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/01082 ,  H01L2224/13111 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2224/13111 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2224/13111 ,  H01L2924/01029 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2224/13111 ,  H01L2924/01079 ,  H01L2224/13111 ,  H01L2924/01083 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/01083 ,  H01L2224/13111 ,  H01L2924/0103 ,  H01L2224/13111 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2224/11334 ,  H01L2924/00014 ,  H01L2224/1146 ,  H01L2924/00014 ,  H01L2224/1132 ,  H01L2924/00014 ,  H01L2224/11849 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05624 ,  H01L2924/00014 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/00014 ,  H01L2224/0345 ,  H01L2924/00014 ,  H01L2224/03464 ,  H01L2924/00014 ,  H01L2224/03452 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/00014 ,  H01L2224/05139 ,  H01L2924/00014 ,  H01L2224/05144 ,  H01L2924/00014 ,  H01L2224/05155 ,  H01L2924/00014 ,  H01L2224/0347 ,  H01L2924/00014 ,  H01L2224/1147 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2924/01074 ,  H01L2224/05671 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2924/01028 ,  H01L2224/0361 ,  H01L2924/00014 ,  H01L2224/119 ,  H01L2224/034 ,  H01L2224/1147 ,  H01L2224/034 ,  H01L2224/114 ,  H01L2224/0361 ,  H01L2224/13294 ,  H01L2924/00014 ,  H01L2224/133 ,  H01L2924/014 ,  H01L2224/81203 ,  H01L2924/00014 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2224/2919 ,  H01L2924/0665 ,  H01L2224/2929 ,  H01L2924/0665 ,  H01L2224/2919 ,  H01L2924/07025 ,  H01L2224/2929 ,  H01L2924/07025 ,  H01L2224/2919 ,  H01L2924/069 ,  H01L2224/2929 ,  H01L2924/069 ,  H01L2224/83102 ,  H01L2924/00014 ,  H01L2224/83101 ,  H01L2924/00014 ,  H01L2224/9211 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/29294 ,  H01L2924/00014 ,  H01L2224/2939 ,  H01L2924/00014 ,  H01L2224/29299 ,  H01L2924/00014 ,  H01L2224/27622 ,  H01L2924/00014 ,  H01L2224/2732 ,  H01L2924/00014 ,  H01L2224/27312 ,  H01L2924/00014 ,  H01L2224/81447 ,  H01L2924/00014 ,  H01L2224/81424 ,  H01L2924/00014 ,  H01L2224/81455 ,  H01L2924/00014 ,  H01L2224/8146 ,  H01L2924/00014 ,  H01L2224/81439 ,  H01L2924/00014 ,  H01L2224/81464 ,  H01L2924/00014 ,  H01L2224/81484 ,  H01L2924/00014 ,  H01L2224/81444 ,  H01L2924/00014 ,  H01L2224/81466 ,  H01L2924/00014 ,  H01L2224/81471 ,  H01L2924/00014 ,  H01L2224/8185 ,  H01L2924/00012 ,  H01L2224/05166 ,  H01L2924/00014 ,  H01L2224/05684 ,  H01L2924/00014

Abstract: A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.

公开(公告)号：US11664335B2

公开(公告)日：2023-05-30

申请号：US15358038

申请日：2016-11-21

Applicant: Semikron Elektronik GmbH & Co., KG

Inventor： Wolfgang-Michael Schulz

IPC: H01L23/00 ,  H01L23/488

CPC classification number: H01L24/05 ,  H01L23/488 ,  H01L24/03 ,  H01L24/08 ,  H01L24/48 ,  H01L24/85 ,  H01L24/45 ,  H01L2224/0345 ,  H01L2224/0347 ,  H01L2224/03462 ,  H01L2224/03823 ,  H01L2224/04042 ,  H01L2224/05005 ,  H01L2224/0508 ,  H01L2224/0516 ,  H01L2224/05023 ,  H01L2224/0558 ,  H01L2224/0566 ,  H01L2224/05118 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05179 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05583 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05672 ,  H01L2224/05679 ,  H01L2224/05684 ,  H01L2224/08503 ,  H01L2224/45005 ,  H01L2224/45015 ,  H01L2224/4554 ,  H01L2224/45147 ,  H01L2224/4847 ,  H01L2224/48247 ,  H01L2224/48506 ,  H01L2224/48507 ,  H01L2224/48855 ,  H01L2224/85205 ,  H01L2224/85375 ,  H01L2924/00014 ,  H01L2224/45147 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/2076 ,  H01L2224/05171 ,  H01L2924/00014 ,  H01L2224/05179 ,  H01L2924/00014 ,  H01L2224/05172 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/00014 ,  H01L2224/05139 ,  H01L2924/00014 ,  H01L2224/05164 ,  H01L2924/00014 ,  H01L2224/0516 ,  H01L2924/00014 ,  H01L2224/05118 ,  H01L2924/00014 ,  H01L2224/05155 ,  H01L2924/00014 ,  H01L2224/05664 ,  H01L2924/00014 ,  H01L2224/05166 ,  H01L2924/00014 ,  H01L2224/05184 ,  H01L2924/00014 ,  H01L2224/05186 ,  H01L2924/01074 ,  H01L2224/05186 ,  H01L2924/01022 ,  H01L2224/45005 ,  H01L2924/2076 ,  H01L2224/45147 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/00014 ,  H01L2224/43848 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/013 ,  H01L2924/01014

Abstract: A power semiconductor chip having: a semiconductor component body; a multilayer metallization arranged on the semiconductor component body; and a nickel layer arranged over the semiconductor component body. The invention further relates to a method for producing a power semiconductor chip and to a power semiconductor device. The invention provides a power semiconductor chip which has a metallization to which a copper wire, provided without a thick metallic coating, can be reliably bonded without damage to the power semiconductor chip during bonding.

公开(公告)号：US20190035740A1

公开(公告)日：2019-01-31

申请号：US16048108

申请日：2018-07-27

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Samuele SCIARRILLO ,  Paolo COLPANI ,  Ivan VENEGONI

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/525 ,  H01L23/528 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/53238 ,  H01L21/76852 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/5283 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/02311 ,  H01L2224/02331 ,  H01L2224/02335 ,  H01L2224/0235 ,  H01L2224/02372 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/03005 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05007 ,  H01L2224/05008 ,  H01L2224/05017 ,  H01L2224/05027 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05557 ,  H01L2224/05566 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2924/01014 ,  H01L2924/14

Abstract: A semiconductor device includes a passivation layer, an interconnection metallization 37 having a peripheral portion over the passivation layer, and an outer surface coating 37 on the interconnection metallization. A diffusion barrier layer comprises an inner planar portion directly on the surface of the passivation layer and a peripheral portion extending along a plane at a vertical height higher than the surface of the passivation layer, so that the peripheral portion forms with the inner portion a step in the barrier layer. The outer surface coating, has a vertical wall with a foot adjacent to the peripheral portion and positioned at the vertical height over the surface of the passivation layer to form a hollow recess area between the surface of the passivation layer and both of the peripheral portion and the foot of the outer surface coating.

公开(公告)号：US20180374809A1

公开(公告)日：2018-12-27

申请号：US16117483

申请日：2018-08-30

Applicant: EoPLex Limited

Inventor： David G. Love ,  Philip Eugene Rogren

IPC: H01L23/00 ,  H01L23/31

CPC classification number: H01L24/05 ,  H01L23/3114 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L24/96 ,  H01L2224/03003 ,  H01L2224/031 ,  H01L2224/0311 ,  H01L2224/0312 ,  H01L2224/0344 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/03505 ,  H01L2224/03845 ,  H01L2224/0391 ,  H01L2224/03914 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/051 ,  H01L2224/05109 ,  H01L2224/05111 ,  H01L2224/05116 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05556 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11422 ,  H01L2224/11428 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/0103 ,  H01L2224/03

Abstract: A method of manufacture of an integrated circuit system includes: providing a semiconductor wafer with a bond pad; attaching a detachable carrier to the semiconductor wafer, the detachable carrier including a carrier frame portion and a terminal structure; removing the carrier frame portion with the terminal structure attached to the semiconductor wafer; and forming an encapsulation encapsulating the semiconductor wafer, the bond pad, and the terminal structure.

公开(公告)号：US09997459B2

公开(公告)日：2018-06-12

申请号：US15427428

申请日：2017-02-08

Applicant: Infineon Technologies AG

Inventor： Jochen Hilsenbeck ,  Jens Peter Konrath ,  Stefan Krivec

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/285 ,  H01L29/20 ,  H01L29/16

CPC classification number: H01L23/53238 ,  H01L21/2855 ,  H01L21/28568 ,  H01L21/28575 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76852 ,  H01L23/532 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/8083 ,  H01L2224/0345 ,  H01L2224/0347 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03914 ,  H01L2224/04042 ,  H01L2224/05018 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05188 ,  H01L2224/05551 ,  H01L2224/05561 ,  H01L2224/05566 ,  H01L2224/05599 ,  H01L2224/05688 ,  H01L2224/45099 ,  H01L2224/85375 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/12036 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/0496 ,  H01L2924/01042 ,  H01L2924/01029 ,  H01L2924/01014 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device includes a semiconductor body having a front face, a back face and an active zone at the front face. A front surface metallization layer having a front face and a back face is disposed over the semiconductor body so that the back face of the front surface metallization layer faces the front face of the semiconductor body and is electrically connected to the active zone. An upper barrier layer made of amorphous molybdenum nitride is disposed on the front face of the front surface metallization layer.

公开(公告)号：US09960134B2

公开(公告)日：2018-05-01

申请号：US15269212

申请日：2016-09-19

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yi-Li Hsiao ,  Chen-Hua Yu ,  Shin-Puu Jeng ,  Chih-Hang Tung ,  Cheng-Chang Wei

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/498 ,  H01L21/44 ,  H01L23/52

CPC classification number: H01L24/11 ,  H01L21/44 ,  H01L21/76885 ,  H01L23/49811 ,  H01L23/52 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11 ,  H01L2224/1147 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/13018 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/80815 ,  H01L2224/81815 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00

Abstract: A semiconductor device includes a solder bump overlying and electrically connected to a pad region, and a metal cap layer formed on at least a portion of the solder bump. The metal cap layer has a melting temperature greater than the melting temperature of the solder bump.

公开(公告)号：US20180047698A1

公开(公告)日：2018-02-15

申请号：US15792398

申请日：2017-10-24

Applicant: ROHM CO., LTD.

Inventor： Mamoru YAMAGAMI ,  Kenji FUJII

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31 ,  H01L23/525 ,  H01L23/532

CPC classification number: H01L24/49 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/525 ,  H01L23/53223 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/36 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/02375 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0391 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05557 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05583 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/08245 ,  H01L2224/13024 ,  H01L2224/13076 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/1411 ,  H01L2224/16245 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/40479 ,  H01L2224/40491 ,  H01L2224/40499 ,  H01L2224/40993 ,  H01L2224/4112 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48177 ,  H01L2224/48247 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/4912 ,  H01L2224/49177 ,  H01L2224/73221 ,  H01L2224/8485 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/20754 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2924/20757 ,  H01L2924/20756 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/20755 ,  H01L2924/014 ,  H01L2224/051

Abstract: An inventive semiconductor device includes: a semiconductor chip including an integrated circuit; a plurality of electrode pads provided on the semiconductor chip and connected to the integrated circuit; a rewiring to which the electrode pads are electrically connected together, the rewiring being exposed on an outermost surface of the semiconductor chip and having an exposed surface area greater than the total area of the electrode pads; and a resin package which seals the semiconductor chip.

公开(公告)号：US20180040579A1

公开(公告)日：2018-02-08

申请号：US15786853

申请日：2017-10-18

Applicant: LAPIS SEMICONDUCTOR CO., LTD.

Inventor： HIROKAZU SAITO

IPC: H01L23/00

CPC classification number: H01L24/14 ,  H01L21/6836 ,  H01L23/585 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/0239 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0391 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05569 ,  H01L2224/05647 ,  H01L2224/11002 ,  H01L2224/11009 ,  H01L2224/1184 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1401 ,  H01L2224/1412 ,  H01L2224/94 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2924/01022 ,  H01L2924/01029

Abstract: The present disclosure provides a semiconductor device including: a substrate including, in a central portion the substrate, n first element formation regions having a rectangular shape and are arrayed along a first direction, and n+m second element formation regions arrayed along the first direction adjacent to the first element formation regions; plural projecting electrodes formed at each of the first and the second element formation regions; and plural dummy projecting electrodes formed, at a peripheral portion, overlapping a triangle defined by a first edge of the first element formation region that forms a boundary between the first element formation region and the peripheral portion, and a second edge of the second element formation region that is adjacent to a corner of the first edge and that forms a boundary between the second element formation region and the peripheral portion.