公开(公告)号：US20240178208A1

公开(公告)日：2024-05-30

申请号：US18192645

申请日：2023-03-30

申请人： TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

发明人： Hongzhao DENG

IPC分类号： H01L25/16 ,  H01L23/00

CPC分类号： H01L25/167 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L24/16 ,  H01L2224/11003 ,  H01L2224/1111 ,  H01L2224/13016 ,  H01L2224/13111 ,  H01L2224/16145 ,  H01L2224/81024 ,  H01L2224/81815 ,  H01L2924/12041

摘要： A manufacturing method of a light-emitting substrate and a display device are provided. The manufacturing method includes: providing a substrate provided with a plurality of electrodes, forming a patterned photoresist layer including openings exposing the electrodes on a surface of the substrate, forming connecting parts in the openings, removing the patterned photoresist layer, and bonding a plurality of light-emitting elements on the connecting parts, wherein slope angles of a plurality of connecting part sidewalls of the connecting parts are ranged between 40° and 140°. The method could improve a yield rate of light-emitting elements bonded to electrodes through connecting parts.

公开(公告)号：US20180166409A1

公开(公告)日：2018-06-14

申请号：US15877186

申请日：2018-01-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Meng-Fu Shih ,  Chun-Yen Lo ,  Cheng-Lin Huang ,  Wen-Ming Chen ,  Chien-Ming Huang ,  Yuan-Fu Liu ,  Yung-Chiuan Cheng ,  Wei-Chih Huang ,  Chen-Hsun Liu ,  Chien-Pin Chan ,  Yu-Nu Hsu ,  Chi-Hung Lin ,  Te-Hsun Pang ,  Chin-Yu Ku

IPC分类号： H01L23/00 ,  C25D17/00 ,  H01L23/31

CPC分类号： H01L24/11 ,  C25D17/001 ,  H01L23/3192 ,  H01L24/13 ,  H01L24/742 ,  H01L2224/0345 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/1111 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13551 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01074

摘要： External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.

公开(公告)号：US20170323863A1

公开(公告)日：2017-11-09

申请号：US15150342

申请日：2016-05-09

申请人： Amkor Technology, Inc.

发明人： Kyoung Yeon Lee ,  Tae Yong Lee ,  Min Chul Shin ,  Se Man Oh

IPC分类号： H01L23/00

CPC分类号： H01L24/11 ,  H01L21/4846 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1111 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16012 ,  H01L2224/16013 ,  H01L2224/16057 ,  H01L2224/16104 ,  H01L2224/16238 ,  H01L2224/81203 ,  H01L2224/81224 ,  H01L2224/81359 ,  H01L2224/81379 ,  H01L2224/81385 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/014

摘要： A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device, and a method of manufacturing thereof, that comprises a substrate including a dielectric layer, at least one conductive trace and conductive bump pad formed on one surface of the dielectric layer, and a protection layer covering the at least one conductive trace and conductive bump pad, the at least one conductive bump pad having one end exposed through the protection layer, and a semiconductor die electrically connected to the conductive bump pad of the substrate.

公开(公告)号：US09449931B2

公开(公告)日：2016-09-20

申请号：US14468236

申请日：2014-08-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Chung Lin ,  Chung-Shi Liu ,  Meng-Wei Chou ,  Kuo Cheng Lin ,  Wen-Hsiung Lu ,  Chien Ling Hwang ,  Ying-Jui Huang ,  De-Yuan Lu

IPC分类号： H01L21/44 ,  H01L21/4763 ,  H01L23/00 ,  H01L23/488 ,  H01L21/321 ,  H01L21/02 ,  H01L21/768

CPC分类号： H01L24/11 ,  H01L21/02052 ,  H01L21/32125 ,  H01L21/76873 ,  H01L21/76885 ,  H01L23/488 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2221/1084 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05541 ,  H01L2224/05573 ,  H01L2224/1111 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11472 ,  H01L2224/11474 ,  H01L2224/11614 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/11903 ,  H01L2224/1191 ,  H01L2224/11912 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/81191 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0541 ,  H01L2924/07025 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/20102 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/0105 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/207

摘要： Apparatus and methods for providing solder pillar bumps. Pillar bump connections are formed on input/output terminals for integrated circuits by forming a pillar of conductive material using plating of a conductive material over terminals of an integrated circuit. A base portion of the pillar bump has a greater width than an upper portion. A cross-section of the base portion of the pillar bump may make a trapezoidal, rectangular, or sloping shape. Solder material may be formed on the top surface of the pillar. The resulting solder pillar bumps form fine pitch package solder connections that are more reliable than those of the prior art.

摘要翻译： 用于提供焊料柱凸块的装置和方法。 通过在集成电路的端子上形成导电材料的电镀，形成导电材料的柱，形成用于集成电路的输入/输出端子上的柱凸起连接。 柱状凸块的基部具有比上部更大的宽度。 柱形凸起的基部的横截面可以形成梯形，矩形或倾斜的形状。 焊料可以形成在柱的顶表面上。 所得到的焊料柱凸起形成比现有技术更可靠的细间距封装焊接连接。

公开(公告)号：US20160172299A1

公开(公告)日：2016-06-16

申请号：US14610876

申请日：2015-01-30

申请人： QUALCOMM Incorporated

发明人： Vladimir Noveski ,  Milind Pravin Shah ,  Rajneesh Kumar

IPC分类号： H01L23/528 ,  H01L23/31 ,  H01L23/00 ,  H01L23/522 ,  H01L23/498

CPC分类号： H01L23/5283 ,  H01L23/3157 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5226 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0348 ,  H01L2224/03602 ,  H01L2224/03914 ,  H01L2224/05546 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/1111 ,  H01L2224/11334 ,  H01L2224/11438 ,  H01L2224/13007 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16014 ,  H01L2224/16111 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/2711 ,  H01L2224/27438 ,  H01L2224/29006 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81101 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2924/2064 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012

摘要： An integrated device package that includes a die, a substrate, a fill and a conductive interconnect. The die includes a pillar, where the pillar has a first pillar width. The substrate (e.g., package substrate, interposer) includes a dielectric layer and a substrate interconnect (e.g., surface interconnect, embedded interconnect). The fill is located between the die and the substrate. The conductive interconnect is located within the fill. The conductive interconnect includes a first interconnect width that is about the same or less than the first pillar width. The conductive interconnect is coupled to the pillar and the substrate interconnect. The fill is a non-conductive photosensitive material. The fill is a photosensitive film. The substrate interconnect includes a second interconnect width that is equal or greater than the first pillar width. The conductive interconnect includes one of at least a paste, a solder and/or an enhanced solder comprising a polymeric material.

摘要翻译： 一种集成器件封装，其包括管芯，衬底，填充物和导电互连。 模具包括支柱，其中柱具有第一柱宽度。 衬底（例如，封装衬底，插入器）包括电介质层和衬底互连（例如，表面互连，嵌入式互连）。 填充物位于管芯和衬底之间。 导电互连位于填充物内。 导电互连包括大约等于或小于第一柱宽度的第一互连宽度。 导电互连耦合到柱和衬底互连。 填充物是非导电感光材料。 填充物是感光膜。 衬底互连包括等于或大于第一柱宽度的第二互连宽度。 导电互连包括至少一种包含聚合材料的糊状物，焊料和/或增强焊料中的至少一种。

公开(公告)号：US20130167373A1

公开(公告)日：2013-07-04

申请号：US13527459

申请日：2012-06-19

申请人： Chien Ling Hwang ,  Yeong-Jyh Lin ,  Yi-Li Hsiao ,  Ming-Da Cheng ,  Tsai-Tsung Tsai ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu

发明人： Chien Ling Hwang ,  Yeong-Jyh Lin ,  Yi-Li Hsiao ,  Ming-Da Cheng ,  Tsai-Tsung Tsai ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu

IPC分类号： B26D7/27 ,  H01R43/00

CPC分类号： H01L24/11 ,  H01L21/4853 ,  H01L24/13 ,  H01L24/78 ,  H01L2224/056 ,  H01L2224/1111 ,  H01L2224/1134 ,  H01L2224/13005 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/451 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48 ,  H01L2224/7855 ,  H01L2224/78621 ,  H01L2224/85051 ,  H01L2224/854 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/206 ,  Y10T29/49192 ,  Y10T29/49213 ,  Y10T29/514 ,  Y10T29/5177 ,  Y10T29/53217 ,  Y10T29/53235 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/01049 ,  H01L2224/4554

摘要： An apparatus includes a spool configured to supply a wire, a cutting device configured to form a notch in the wire, and a capillary configured to bond the wire and to form a stud bump. The apparatus is further configured to pull the wire to break at the notch, with a tail region attached to the stud bump.

公开(公告)号：US20130026212A1

公开(公告)日：2013-01-31

申请号：US13543576

申请日：2012-07-06

申请人： Samuel Waising Tam ,  Bryan Sik Pong Lee ,  Tak Shing Pang

发明人： Samuel Waising Tam ,  Bryan Sik Pong Lee ,  Tak Shing Pang

IPC分类号： H05K13/04

CPC分类号： H01L24/11 ,  H01L21/6836 ,  H01L24/13 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2221/68327 ,  H01L2224/11003 ,  H01L2224/1111 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11849 ,  H01L2224/13076 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/3012 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75253 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/00

摘要： A manufacturing technique includes creating stud bumps on the electrical contacts on a die, either in wafer or die form. A separate stencil or carrier is provided with cavities that correspond to the electrical contacts on the die. The cavities are filled with solder paste and the die is brought into close proximity with the stencil so that the stud bumps extend into the cavities and come into contact with the solder paste. When the die is removed, the solder paste stays affixed to the stud bumps and thereby the solder paste is transferred and delivered to the stud bumps. The die can then be affixed to a substrate such as a PCB.

摘要翻译： 一种制造技术包括在晶片或模具形式的模具上的电触点上形成凸块凸块。 单独的模板或载体上设置有与模具上的电触点相对应的空腔。 这些空腔填充有焊膏，并且模具与模板紧密接近，使得凸块凸起延伸到空腔中并与焊膏接触。 当去除模具时，焊膏保持固定到柱形凸块上，由此焊膏被传送并传递到凸块凸块。 然后可以将模具固定到诸如PCB的基板。

公开(公告)号：US06701612B2

公开(公告)日：2004-03-09

申请号：US09753296

申请日：2000-12-29

申请人： Igor Y. Khandros ,  Thomas H. Dozier ,  Gary W. Grube ,  Gaetan L. Mathieu

发明人： Igor Y. Khandros ,  Thomas H. Dozier ,  Gary W. Grube ,  Gaetan L. Mathieu

IPC分类号： H05K300

CPC分类号： H05K3/4015 ,  G01R1/06744 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/1111 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/13018 ,  H01L2224/13144 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/45144 ,  H01L2224/81192 ,  H01L2924/00011 ,  H01L2924/01012 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K2203/049 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49204 ,  H01L2924/00012 ,  H01L2224/1134 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01004

摘要： Interconnection elements for electronic components, exhibiting desirable mechanical characteristic (such as resiliency, for making pressure contacts) are formed by using a shaping tool (512) to shape an elongate core element (502) of a soft material (such as gold or soft copper wire) to have a springable shape (including cantilever beam, S-shape, U-shape), and overcoating the shaped core element with a hard material (such as nickel and its alloys), to impart to desired spring (resilient) characteristic to the resulting composite interconnection element. A final overcoat of a material having superior electrical qualities (e.g., electrical conductivity and/or solderability) may be applied to the composite interconnection element. The resulting interconnection elements may be mounted to a variety of electronic components, including directly to semiconductor dies and wafers (in which case the overcoat material anchors the composite interconnection element to a terminal (or the like) on the electronic component), may be mounted to support substrates for use as interposers and may be mounted to substrates for use as probe cards or probe card inserts. The shaping tool may be an anvil (622) and a die (624), and may nick or sever successive shaped portions of the elongate elements, and the elongate element may be of an inherently hard (springy) material. Methods of fabricating interconnection elements on sacrificial substrates are described. Methods of fabricating tip structures (258) and contact tips at the end of interconnection elements are also described.

摘要翻译： 通过使用成形工具（512）来形成软质材料（例如金或软铜）的细长芯元件（502），形成用于电子部件的互连元件，其具有期望的机械特性（例如弹性，用于形成压力接触） 电线）具有弹性形状（包括悬臂梁，S形，U形），并用硬质材料（例如镍及其合金）涂覆成形芯元件，以赋予期望的弹簧（弹性）特性 所得到的复合互连元件。 可以对复合互连元件施加具有优异电气质量（例如导电性和/或可焊性）的材料的最终外涂层。 所得到的互连元件可以安装到各种电子部件，包括直接连接到半导体管芯和晶片（在这种情况下，外罩材料将复合互连元件锚定到电子部件上的端子等），可以被安装 以支撑用作内插件的基板，并且可以安装到用作探针卡或探针卡插入件的基板。 成型工具可以是砧座（622）和模具（624），并且可以切割或切断细长元件的连续成形部分，并且细长元件可以是固有的硬（弹性）材料。 描述了在牺牲基板上制造互连元件的方法。 还描述了在互连元件的末端处制造尖端结构（258）和接触尖端的方法。

公开(公告)号：US20010020636A1

公开(公告)日：2001-09-13

申请号：US09826585

申请日：2001-04-05

申请人： 3M Innovative Properties Company

发明人： David C. Koskenmaki ,  Randolph D. Schueller ,  Robert P. McCollam

IPC分类号： B23K031/02 ,  B21D039/00 ,  B23K035/12 ,  B23K035/14

CPC分类号： H01L21/6835 ,  H01L21/4814 ,  H01L21/4853 ,  H01L2224/11003 ,  H01L2224/1111 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01025 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/01322 ,  H05K3/041 ,  H05K3/3478 ,  H05K2201/10734 ,  H05K2203/0113 ,  H05K2203/0156 ,  H05K2203/033 ,  H05K2203/0338 ,  H05K2203/0405 ,  H05K2203/043

摘要： The present invention relates to a method for making an array of metal balls. The method includes the step of generating a first pattern on a metal foil which includes a plurality of foil projections. The method also includes the step of generating a second pattern on a carrier substrate. The second pattern includes a plurality of carrier recesses that are arranged and configured to correspond with the foil projections of the first pattern. The method further includes the steps of placing the metal foil and the carrier substrate together such that the foil projections of the metal foil fit within the carrier recesses of the carrier substrate, and melting the metal foil such that the foil projections form metal balls positioned within the carrier recesses of the carrier substrate. The invention also relates to metal ball arrays constructed via the above method.

摘要翻译： 本发明涉及一种制造金属球阵列的方法。 该方法包括在包括多个箔突起的金属箔上产生第一图案的步骤。 该方法还包括在载体基板上产生第二图案的步骤。 第二图案包括多个载体凹部，其布置和构造成与第一图案的箔片突起相对应。 该方法还包括以下步骤：将金属箔和载体衬底放置在一起，使得金属箔的箔突起配合在载体衬底的载体凹槽内，并熔化金属箔，使得箔突起形成位于 载体基板的载体凹部。 本发明还涉及通过上述方法构造的金属球阵列。

公开(公告)号：US6133633A

公开(公告)日：2000-10-17

申请号：US169249

申请日：1998-10-09

申请人： Daniel George Berger ,  Guy Paul Brouillette ,  David Hirsch Danovitch ,  Peter Alfred Gruber ,  Rajesh Shankerlal Patel ,  Stephen Roux ,  Carlos Juan Sambucetti ,  James Louis Speidell

发明人： Daniel George Berger ,  Guy Paul Brouillette ,  David Hirsch Danovitch ,  Peter Alfred Gruber ,  Rajesh Shankerlal Patel ,  Stephen Roux ,  Carlos Juan Sambucetti ,  James Louis Speidell

IPC分类号： H01L21/60 ,  H01L21/68 ,  H01L23/485 ,  H05K3/34 ,  H01L23/48

CPC分类号： H05K3/3468 ,  H01L21/6835 ,  H01L24/11 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/1111 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/128

摘要： A method for forming solder bumps on an electronic structure including the steps of first providing a mold made by a sheet of a mold material having a thickness greater than that of the solder bumps to be formed, the mold material has sufficient optical transparency so as to allow the inspection of a solder material subsequently filled into the mold cavities that are formed in the mold material, and a coefficient of thermal expansion that is substantially similar to the substrate which the mold will be mated to, forming a multiplicity of mold cavities in the sheet of mold material, filling the multiplicity of mold cavities with a solder material, cooling the mold to a temperature that is sufficient to solidify the solder material in the multiplicity of mold cavities, positioning the mold intimately with the electronic structure such that the cavities facing the structure, and heating the mold and the structure together to a temperature sufficiently high such that the solder material transfers onto the electronic structure.