公开(公告)号：US20240120298A1

公开(公告)日：2024-04-11

申请号：US17962131

申请日：2022-10-07

申请人： Infineon Technologies AG

发明人： Dietrich Bonart ,  Bernhard Weidgans

IPC分类号： H01L23/00 ,  H01L23/544

CPC分类号： H01L24/05 ,  H01L23/544 ,  H01L24/03 ,  H01L24/06 ,  H01L2224/03001 ,  H01L2224/0346 ,  H01L2224/05018 ,  H01L2224/05027 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05551 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05566 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05624 ,  H01L2224/05638 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05669 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/06515 ,  H01L2924/01014 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/04941

摘要： A semiconductor die includes: a semiconductor substrate; a first contact pad structure above the semiconductor substrate, the first contact pad structure including a metal contact pad configured for electrical contact and a metal layer adjoining an underside of the metal contact pad and jutting out beyond an edge of the metal contact pad; and a first optical detection marker in a periphery of the first contact pad structure and having a different contrast than the metal contact pad. The first optical detection marker includes a region of the metal layer that is adjacent to the edge of the metal contact pad and unobstructed by the metal contact pad so as to be optically visible in a plan view of the semiconductor die. A method of producing the semiconductor die is also described.

公开(公告)号：US20230238400A1

公开(公告)日：2023-07-27

申请号：US17901613

申请日：2022-09-01

申请人： Samsung Display Co., LTD.

发明人： Seung Lyong BOK ,  Hyun Joon KIM

IPC分类号： H01L27/12 ,  H01L25/16 ,  H01L23/00 ,  G06F3/041 ,  G06F3/044

CPC分类号： H01L27/1248 ,  H01L25/167 ,  H01L24/05 ,  H01L27/124 ,  G06F3/0412 ,  G06F3/0446 ,  G06F3/04184 ,  H01L24/08 ,  H01L2224/05027 ,  H01L2224/05073 ,  H01L2224/05562 ,  H01L2224/05686 ,  H01L2224/08145 ,  H01L2224/05566 ,  H01L2224/05567 ,  H01L2924/0549 ,  H01L24/16 ,  H01L2224/16145

摘要： Provided are a display device and a tiled display device. The display device according to one or more embodiments includes a substrate, transistors above the substrate, a first organic insulating layer above the transistors, a first connection electrode above the first organic insulating layer, and electrically connected to at least one of the transistors, a second connection electrode above the first organic insulating layer, a first power supply line configured to receive a first power voltage, above the first organic insulating layer, and connected to the second connection electrode, and a second organic insulating layer above the first power supply line, and defining an opening area exposing the first power supply line.

公开(公告)号：US20230170342A1

公开(公告)日：2023-06-01

申请号：US17974389

申请日：2022-10-26

申请人： LG Display Co., Ltd.

发明人： ChangKyeong Kong ,  Sangmin Lee

IPC分类号： H01L25/16 ,  G02F1/1335 ,  G02F1/13357 ,  H01L23/00 ,  H01L33/62

CPC分类号： H01L25/167 ,  G02F1/133612 ,  G02F1/133621 ,  H01L24/02 ,  H01L24/05 ,  H01L24/16 ,  H01L24/06 ,  H01L33/62 ,  H01L25/165 ,  H01L2224/05558 ,  H01L2224/02145 ,  H01L2224/05073 ,  H01L2224/05552 ,  H01L2224/05566 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/0568 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05666 ,  H01L2224/0616 ,  H01L2224/16147 ,  H01L2924/12041

摘要： A backlight unit and a display device including the same are disclosed. More specifically, a backlight unit is disclosed that includes a plurality of light sources disposed on a glass substrate and disposed in a plurality of rows and a plurality of columns, and first and second transistors disposed on the glass substrate and spaced apart from each other, wherein each of the first transistor and the second transistor is disposed so as not to overlap the plurality of light sources disposed at points where two rows and two columns cross each other. Thus, image quality is excellent.

公开(公告)号：US20170358546A1

公开(公告)日：2017-12-14

申请号：US15617425

申请日：2017-06-08

申请人： WISOL CO., LTD.

发明人： Young Seok SHIM ,  Hyung Ju KIM ,  Joo Hun PARK ,  Chang Dug KIM

IPC分类号： H01L23/00

CPC分类号： H01L24/13 ,  H01L23/562 ,  H01L24/02 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02166 ,  H01L2224/02175 ,  H01L2224/02185 ,  H01L2224/0219 ,  H01L2224/02206 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05073 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05184 ,  H01L2224/05551 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05564 ,  H01L2224/05566 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11013 ,  H01L2224/13007 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13144 ,  H01L2224/16014 ,  H01L2224/16055 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16112 ,  H01L2224/81205 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/3512

摘要： A flip chip includes a substrate, an electrode pad layer stacked over the substrate, a passivation layer stacked at both ends of the electrode pad layer, an under bump metallurgy (UBM) layer stacked over the electrode pad layer and the passivation layer, and a bump formed over the UBM layer. The width of an opening on which the passivation layer is not formed over the electrode pad layer is greater than the width of the bump. The flip chip can prevent a crack from being generated in the pad upon ultrasonic bonding.

公开(公告)号：US20080026559A1

公开(公告)日：2008-01-31

申请号：US11867466

申请日：2007-10-04

申请人： Hiroshi Miyazaki

发明人： Hiroshi Miyazaki

IPC分类号： H01L21/4763

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05007 ,  H01L2224/05169 ,  H01L2224/05566 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/13007 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2924/0001 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19042 ,  H05K1/0271 ,  H05K1/111 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4007 ,  H05K2201/0133 ,  H05K2201/09909 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2224/05552

摘要： An interconnect structure a substrate, a contact pad disposed over a surface of the substrate, and an insulative mask disposed over the contact pad. The insulative mask can include an opening that is aligned over and exposes an inner portion of the contact pad. The inner portion of the contact pad includes a compliant layer and a conductive layer that is disposed over the compliant layer. The inner portion of the contact pad has sufficient flexibility to distribute mechanical stress applied to the contact pad and can mitigate damage to the interconnect structure.

摘要翻译： 互连结构，衬底，设置在衬底的表面上的接触焊盘以及设置在接触焊盘上的绝缘掩模。 绝缘掩模可以包括对准在接触垫的内部并且暴露接触垫的内部的开口。 接触焊盘的内部部分包括柔性层和布置在柔性层上的导电层。 接触焊盘的内部部分具有足够的灵活性，以分配施加到接触焊盘的机械应力并且可以减轻对互连结构的损坏。

公开(公告)号：US20050146030A1

公开(公告)日：2005-07-07

申请号：US10750059

申请日：2003-12-30

申请人： Hiroshi Miyazaki

发明人： Hiroshi Miyazaki

IPC分类号： H01L21/44 ,  H01L21/60 ,  H01L23/48 ,  H01L23/485 ,  H05K1/02 ,  H05K1/11 ,  H05K3/34 ,  H05K3/40

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05007 ,  H01L2224/05169 ,  H01L2224/05566 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/13007 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2924/0001 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19042 ,  H05K1/0271 ,  H05K1/111 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4007 ,  H05K2201/0133 ,  H05K2201/09909 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2224/05552

摘要： An interconnect structure a substrate, a contact pad disposed over a surface of the substrate, and an insulative mask disposed over the contact pad. The insulative mask can include an opening that is aligned over and exposes an inner portion of the contact pad. The inner portion of the contact pad includes a compliant layer and a conductive layer that is disposed over the compliant layer. The inner portion of the contact pad has sufficient flexibility to distribute mechanical stress applied to the contact pad and can mitigate damage to the interconnect structure.

摘要翻译： 互连结构，衬底，设置在衬底的表面上的接触焊盘以及设置在接触焊盘上的绝缘掩模。 绝缘掩模可以包括对准在接触垫的内部并且暴露接触垫的内部的开口。 接触焊盘的内部部分包括柔性层和布置在柔性层上的导电层。 接触焊盘的内部部分具有足够的灵活性，以分配施加到接触焊盘的机械应力并且可以减轻对互连结构的损坏。

公开(公告)号：US09859235B2

公开(公告)日：2018-01-02

申请号：US12619503

申请日：2009-11-16

申请人： Yu-Wen Liu ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Shin-Puu Jeng ,  Ying-Ju Chen ,  Shang-Yun Hou ,  Pei-Haw Tsao ,  Chen-Hua Yu

发明人： Yu-Wen Liu ,  Hao-Yi Tsai ,  Hsien-Wei Chen ,  Shin-Puu Jeng ,  Ying-Ju Chen ,  Shang-Yun Hou ,  Pei-Haw Tsao ,  Chen-Hua Yu

IPC分类号： H01L23/488 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L24/05 ,  H01L23/3157 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/0215 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05096 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05541 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05566 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13005 ,  H01L2224/13007 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/00014 ,  H01L2924/2064 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599

摘要： A system and method for forming an underbump metallization (UBM) is presented. A preferred embodiment includes a raised UBM which extends through a passivation layer so as to make contact with a contact pad while retaining enough of the passivation layer between the contact pad and the UBM to adequately handle the peeling and shear stress that results from CTE mismatch and subsequent thermal processing. The UBM contact is preferably formed in either an octagonal ring shape or an array of contacts.

公开(公告)号：US09595469B2

公开(公告)日：2017-03-14

申请号：US14071076

申请日：2013-11-04

申请人： Infineon Technologies AG

发明人： Jochen Hilsenbeck ,  Jens Peter Konrath ,  Stefan Krivec

IPC分类号： H01L21/768 ,  H01L23/532 ,  H01L29/16 ,  H01L29/808 ,  H01L29/10 ,  H01L23/00 ,  H01L21/285 ,  H01L29/20

CPC分类号： H01L23/53238 ,  H01L21/2855 ,  H01L21/28568 ,  H01L21/28575 ,  H01L21/76841 ,  H01L21/76843 ,  H01L21/76852 ,  H01L23/532 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/8083 ,  H01L2224/0345 ,  H01L2224/0347 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03914 ,  H01L2224/04042 ,  H01L2224/05018 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05188 ,  H01L2224/05551 ,  H01L2224/05561 ,  H01L2224/05566 ,  H01L2224/05599 ,  H01L2224/05688 ,  H01L2224/45099 ,  H01L2224/85375 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/12036 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/0496 ,  H01L2924/01042 ,  H01L2924/01029 ,  H01L2924/01014 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device includes a semiconductor body with a front face and a back face, having an active zone located at the front face, a front surface metallization layer having a front face and a back face directed towards the active zone, the front surface metallization layer being provided on the front face of the semiconductor body and being electrically connected to the active zone, and a first barrier layer, including amorphous molybdenum nitride, located between the active zone and the metallization layer. Further, a method for producing such a device is provided.

摘要翻译： 半导体器件包括具有正面和背面的半导体本体，具有位于前表面的有源区，前表面金属化层具有指向有源区的正面和背面，前表面金属化层 设置在半导体本体的前表面上并与活性区电连接，以及位于活性区和金属化层之间的包括无定形氮化钼的第一阻挡层。 此外，提供了一种用于制造这种装置的方法。

公开(公告)号：US20160379946A1

公开(公告)日：2016-12-29

申请号：US14891319

申请日：2014-11-13

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Kazuyoshi MAEKAWA ,  Yuichi KAWANO

IPC分类号： H01L23/00

CPC分类号： H01L24/02 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/02166 ,  H01L2224/02181 ,  H01L2224/02185 ,  H01L2224/0219 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03462 ,  H01L2224/03466 ,  H01L2224/0347 ,  H01L2224/035 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05007 ,  H01L2224/05008 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05176 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05566 ,  H01L2224/05567 ,  H01L2224/05664 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/4502 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48664 ,  H01L2224/48864 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/04941 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/1306 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/01008

摘要： A semiconductor device includes: a pad electrode 9a formed in an uppermost layer of a plurality of wiring layers; a base insulating film 11 having an opening 11a on the pad electrode 9a; a base metal film UM formed on the base insulating film 11; a redistribution line RM formed on the base metal film UM; and a cap metal film CM formed so as to cover an upper surface and a side surface of the redistribution line RM. In addition, in a region outside the redistribution line RM, the base metal film UM made of a material different from that of the redistribution line RM and the cap metal film CM made of a material different from the redistribution line RM are formed between the cap metal film CM formed on the side surface of the redistribution line RM and the base insulating film 11, and the base metal film UM and the cap metal film CM are in direct contact with each other in the region outside the redistribution line RM.

摘要翻译： 半导体器件包括：形成在多个布线层的最上层中的焊盘电极9a; 在焊盘电极9a上具有开口11a的基底绝缘膜11; 形成在基底绝缘膜11上的贱金属膜UM; 形成在基底金属膜UM上的再分布线RM; 和形成为覆盖再分配线RM的上表面和侧面的帽金属膜CM。 另外，在再分配线RM外部的区域中，由不同于再分配线RM的材料制成的贱金属膜UM和由再分配线RM不同的材料制成的帽金属膜CM形成在盖 形成在再分配线路RM和基底绝缘膜11的侧面上的金属膜CM和基底金属膜UM和盖金属膜CM在再分配线路RM外部的区域中彼此直接接触。

公开(公告)号：US20160148891A1

公开(公告)日：2016-05-26

申请号：US14554788

申请日：2014-11-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： PEI-HAW TSAO ,  AN-TAI XU ,  HUANG-TING HSIAO ,  KUO-CHIN CHANG

IPC分类号： H01L23/00 ,  H01L23/532 ,  H01L23/528

CPC分类号： H01L24/03 ,  H01L23/145 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5329 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/02372 ,  H01L2224/02381 ,  H01L2224/0382 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05073 ,  H01L2224/05566 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13007 ,  H01L2224/13018 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/16057 ,  H01L2224/16059 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121

摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a semiconductor chip; a substrate facing an active surface of the semiconductor chip; and a conductive bump extending from the active surface of the semiconductor chip toward the substrate, wherein the conductive bump comprises: a plurality of bump segments comprising a first group of bump segments and a second group of bump segments, wherein each bump segment comprises the same segment height in a direction orthogonal to the active surface of the semiconductor chip, and each bump segment comprises a volume defined by the multiplication of the segment height with the average cross-sectional area of the bump segment; wherein the ratio of the total volume of the first group of bump segments to the total volume of the second group of bump segments is between about 0.03 and about 0.8.

摘要翻译： 提供半导体结构及其形成方法。 半导体结构包括：半导体芯片; 面向半导体芯片的有源表面的衬底; 以及从所述半导体芯片的有源表面朝向所述衬底延伸的导电凸块，其中所述导电凸块包括：多个凸起段，包括第一组凸块段和第二组凸块段，其中每个凸块段包括相同的凸起段 在与半导体芯片的有源表面正交的方向上的段高度，并且每个凸块段包括通过段高度与凸块段的平均横截面面积的乘积确定的体积; 其中所述第一组凸块段的总体积与所述第二组凸块段的总体积的比率在约0.03和约0.8之间。