公开(公告)号：US20240047446A1

公开(公告)日：2024-02-08

申请号：US17882626

申请日：2022-08-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Mao-Yen Chang ,  Chun-Cheng Lin ,  Chih-Wei Lin ,  Yi-Da Tsai ,  Hsaing-Pin Kuan ,  Chih-Chiang Tsao ,  Hsuan-Ting Kuo ,  Hsiu-Jen Lin ,  Yu-Chia Lai ,  Kuo-Lung Pan ,  Hao-Yi Tsai ,  Ching-Hua Hsieh

IPC分类号： H01L25/18 ,  H01L23/00 ,  H01R12/57 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L25/18 ,  H01L24/19 ,  H01L24/95 ,  H01R12/57 ,  H01L24/13 ,  H01L25/0652 ,  H01L24/20 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L25/50 ,  H01L24/11 ,  H01L2224/19 ,  H01L2224/95001 ,  H01L2224/214 ,  H01L2224/2101 ,  H01L2224/81815 ,  H01L2224/81201 ,  H01L2224/81862 ,  H01L2224/81193 ,  H01L2224/81906 ,  H01L2224/1403 ,  H01L2224/14517 ,  H01L2224/14505 ,  H01L2224/1319 ,  H01L2924/0665 ,  H01L2924/0635 ,  H01L2924/07025 ,  H01L2224/1329 ,  H01L2224/13386 ,  H01L2924/05442 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13144 ,  H01L2224/16108 ,  H01L2224/16238 ,  H01L2224/16059 ,  H01L2224/13016 ,  H01L2224/1607 ,  H01L2224/8192 ,  H01L2224/1131 ,  H01L2924/1427 ,  H01L2924/14361 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1431

摘要： A semiconductor package and a manufacturing method thereof are described. The semiconductor package includes a package having dies encapsulated by an encapsulant, a redistribution circuit structure, first and second modules and affixing blocks. The redistribution circuit structure is disposed on the package. The first and second modules are disposed on and respectively electrically connected to the redistribution circuit structure by first and second connectors disposed there-between. The first and second modules are adjacent to each other and disposed side by side on the redistribution circuit structure. The affixing blocks are disposed on the redistribution circuit structure and between the first and second modules and the redistribution circuit structure. The affixing blocks include first footing portions located below the first module, second footing portions located below the second module, and exposed portions exposed from the first and second modules. The affixing blocks join the first and second modules to the redistribution circuit structure.

公开(公告)号：US11658142B2

公开(公告)日：2023-05-23

申请号：US16947786

申请日：2020-08-17

申请人： AT&S Austria Technologie & Systemtechnik Aktiengesellschaft

发明人： Heinz Moitzi ,  Johannes Stahr ,  Andreas Zluc

IPC分类号： H01L21/00 ,  H01L23/00 ,  H01L21/48 ,  H01L23/498 ,  H05K1/11 ,  H05K1/18 ,  H05K3/34

CPC分类号： H01L24/16 ,  H01L21/4846 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/13 ,  H01L24/81 ,  H05K1/111 ,  H05K1/181 ,  H05K3/3436 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/05572 ,  H01L2224/13019 ,  H01L2224/1607 ,  H01L2224/16059 ,  H01L2224/81143 ,  H01L2224/81345 ,  H01L2224/81801 ,  H05K2201/09472 ,  H05K2201/10636 ,  H05K2201/10727 ,  H05K2203/048

摘要： A connection arrangement for forming a component carrier structure is disclosed. The connection arrangement includes a first electrically conductive connection element and a second electrically conductive connection element. The first connection element and the second connection element are configured such that, upon connecting the first connection element with the second connection element along a connection direction, a form fit is established between the first connection element and the second connection element that limits a relative motion between the first connection element and the second connection element in a plane perpendicular to the connection direction. A component carrier and a method of forming a component carrier structure are also disclosed.

公开(公告)号：US10002835B2

公开(公告)日：2018-06-19

申请号：US15427156

申请日：2017-02-08

申请人： GLOBALFOUNDRIES INC.

发明人： Benjamin V. Fasano ,  Michael S. Cranmer ,  Richard F. Indyk ,  Harry Cox ,  Katsuyuki Sakuma ,  Eric D. Perfecto

IPC分类号： H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

CPC分类号： H01L23/5386 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/1146 ,  H01L2224/1184 ,  H01L2224/13017 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16113 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/81191 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/81815 ,  H01L2924/014 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/157 ,  H01L2924/15717 ,  H01L2924/15738 ,  H01L2924/15788 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00014

摘要： A semiconductor device and a stacked pillar used to interconnect a first semiconductor die and a second semiconductor die are provided. The semiconductor device has a substrate, a splice interposer, a first semiconductor die, a second semiconductor die and first to fourth plurality of pillars. The first to fourth plurality of pillars and the splice interposer form interconnection and wiring between the first semiconductor die, the second semiconductor die and the substrate. The stacked pillar has a first conductor layer formed on a surface of the first semiconductor die, a first solder layer formed on the first conductor layer, a second conductor layer formed on the first solder layer, and a second solder layer formed on the second conductor layer. The second solder layer is heat-reflowable to attach the stacked pillar to a surface of the second semiconductor.

公开(公告)号：US09926422B2

公开(公告)日：2018-03-27

申请号：US15414942

申请日：2017-01-25

申请人： FUJITSU LIMITED

发明人： Junichi Kon

IPC分类号： H01L23/52 ,  C08J9/00 ,  C08J3/28 ,  C08J9/14 ,  H01L23/00

CPC分类号： C08J9/0061 ,  C08J3/28 ,  C08J9/143 ,  C08J2325/18 ,  C08J2363/04 ,  C08J2433/02 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/1148 ,  H01L2224/13022 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16111 ,  H01L2224/16145 ,  H01L2224/16501 ,  H01L2224/27622 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/3201 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/83075 ,  H01L2224/83095 ,  H01L2224/8321 ,  H01L2224/9212 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/27 ,  H01L2224/11 ,  H01L2924/00

摘要： A material includes a base resin; a solvent; and a foaming agent and a photosensitizer, and/or a substance that serves as a foaming agent and a photosensitizer.

公开(公告)号：US20170358549A1

公开(公告)日：2017-12-14

申请号：US15543113

申请日：2016-01-13

申请人： DEXERIALS CORPORATION

发明人： Seiichiro SHINOHARA ,  Yasushi AKUTSU ,  Tomoyuki ISHIMATSU

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L24/27 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13164 ,  H01L2224/1319 ,  H01L2224/133 ,  H01L2224/13686 ,  H01L2224/1369 ,  H01L2224/1403 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/17107 ,  H01L2224/27003 ,  H01L2224/271 ,  H01L2224/27515 ,  H01L2224/29082 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/81101 ,  H01L2224/81122 ,  H01L2224/81903 ,  H01L2224/83101 ,  H01L2224/83122 ,  H01L2224/83203 ,  H01L2224/83856 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/00015 ,  H01L2924/3841 ,  H01L2224/83851 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/0635 ,  H01L2924/0665 ,  H01L2924/05442 ,  H01L2924/05432

摘要： Provided is a multilayer substrate including laminated semiconductor substrates each having a penetrating hole (hereinafter referred to as through hole) having a plated film formed in the inner surface. The multilayer substrate has excellent conduction characteristics and can be manufactured at low cost. Conductive particles are selectively present at a position where the through holes face each other as viewed in a plan view of the multilayer substrate. The multilayer substrate has a connection structure in which the facing through holes are connected by the conductive particles, and the semiconductor substrates each having the through hole are bonded by an insulating adhesive.

公开(公告)号：US20170358546A1

公开(公告)日：2017-12-14

申请号：US15617425

申请日：2017-06-08

申请人： WISOL CO., LTD.

发明人： Young Seok SHIM ,  Hyung Ju KIM ,  Joo Hun PARK ,  Chang Dug KIM

IPC分类号： H01L23/00

CPC分类号： H01L24/13 ,  H01L23/562 ,  H01L24/02 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02166 ,  H01L2224/02175 ,  H01L2224/02185 ,  H01L2224/0219 ,  H01L2224/02206 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05073 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05184 ,  H01L2224/05551 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05564 ,  H01L2224/05566 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11013 ,  H01L2224/13007 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13144 ,  H01L2224/16014 ,  H01L2224/16055 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16112 ,  H01L2224/81205 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/3512

摘要： A flip chip includes a substrate, an electrode pad layer stacked over the substrate, a passivation layer stacked at both ends of the electrode pad layer, an under bump metallurgy (UBM) layer stacked over the electrode pad layer and the passivation layer, and a bump formed over the UBM layer. The width of an opening on which the passivation layer is not formed over the electrode pad layer is greater than the width of the bump. The flip chip can prevent a crack from being generated in the pad upon ultrasonic bonding.

公开(公告)号：US20170260348A1

公开(公告)日：2017-09-14

申请号：US15414942

申请日：2017-01-25

申请人： FUJITSU LIMITED

发明人： Junichi Kon

IPC分类号： C08J9/00 ,  C08J9/14 ,  H01L23/00 ,  C08J3/28

CPC分类号： C08J9/0061 ,  C08J3/28 ,  C08J9/143 ,  C08J2325/18 ,  C08J2363/04 ,  C08J2433/02 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/1148 ,  H01L2224/13022 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16111 ,  H01L2224/16145 ,  H01L2224/16501 ,  H01L2224/27622 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/3201 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/83075 ,  H01L2224/83095 ,  H01L2224/8321 ,  H01L2224/9212 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/27 ,  H01L2224/11 ,  H01L2924/00

摘要： A material includes a base resin; a solvent; and a foaming agent and a photosensitizer, and/or a substance that serves as a foaming agent and a photosensitizer.

公开(公告)号：US09721916B2

公开(公告)日：2017-08-01

申请号：US15255963

申请日：2016-09-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jung Wei Cheng ,  Tsung-Ding Wang ,  Chien-Hsun Lee

IPC分类号： H01L23/00 ,  H01L23/544 ,  H01L21/78 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L24/14 ,  H01L21/78 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/0214 ,  H01L2224/0215 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05011 ,  H01L2224/05012 ,  H01L2224/05013 ,  H01L2224/05014 ,  H01L2224/05015 ,  H01L2224/05024 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05582 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/06132 ,  H01L2224/06179 ,  H01L2224/06517 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13562 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14104 ,  H01L2224/14132 ,  H01L2224/14134 ,  H01L2224/14179 ,  H01L2224/14517 ,  H01L2224/16013 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/17051 ,  H01L2224/17515 ,  H01L2224/17517 ,  H01L2224/81007 ,  H01L2224/81139 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81194 ,  H01L2224/81345 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2225/06593 ,  H01L2924/01022 ,  H01L2924/01073 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/01029

摘要： An integrated circuit structure includes an alignment bump and an active electrical connector. The alignment bump includes a first non-solder metallic bump. The first non-solder metallic bump forms a ring encircling an opening therein. The active electrical connector includes a second non-solder metallic bump. A surface of the first non-solder metallic bump and a surface of the second non-solder metallic bump are substantially coplanar with each other.

公开(公告)号：US20160336286A1

公开(公告)日：2016-11-17

申请号：US15221370

申请日：2016-07-27

申请人： Invensas Corporation

发明人： Rajesh KATKAR ,  Cyprian Emeka UZOH

IPC分类号： H01L23/00 ,  H05K3/34 ,  H05K1/14 ,  H01L25/10 ,  H01L25/00

CPC分类号： H01L24/14 ,  B23K1/0016 ,  B23K3/0623 ,  B23K35/0244 ,  B23K35/0266 ,  B23K2101/40 ,  H01L21/02225 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/83 ,  H01L24/98 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/03318 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0391 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/0508 ,  H01L2224/051 ,  H01L2224/05567 ,  H01L2224/056 ,  H01L2224/06102 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11009 ,  H01L2224/111 ,  H01L2224/11318 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1405 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/75253 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/8122 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/81825 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K1/115 ,  H05K1/144 ,  H05K3/341 ,  H05K2201/09572 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2224/81 ,  H01L2224/83

摘要： In some embodiments, to increase the height-to-pitch ratio of a solder connection that connects different structures with one or more solder balls, only a portion of a solder ball's surface is melted when the connection is formed on one structure and/or when the connection is being attached to another structure. In some embodiments, non-solder balls are joined by an intermediate solder ball (140i). A solder connection may be surrounded by a solder locking layer (1210) and may be recessed in a hole (1230) in that layer. Other features are also provided.

公开(公告)号：US09437562B2

公开(公告)日：2016-09-06

申请号：US14469056

申请日：2014-08-26

申请人： TOYOTA JIDOSHA KABUSHIKI KAISHA

发明人： Takashi Ushijima ,  Atsushi Imai ,  Jiro Nohara

IPC分类号： H01L21/02 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L24/11 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/03332 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03472 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05571 ,  H01L2224/10145 ,  H01L2224/11472 ,  H01L2224/131 ,  H01L2224/16013 ,  H01L2224/16054 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16111 ,  H01L2224/16227 ,  H01L2224/81801 ,  H01L2924/351 ,  H01L2924/35121 ,  H01L2924/37001 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014

摘要： A manufacturing method of a semiconductor device includes placing a mask having an opening on an external region of a top face of a substrate to locate an end portion of the opening of the mask just above a concave portion formed on the top face of the substrate, the external region being located outside the concave portion. The manufacturing method further includes: growing a conductive film on part of the top face of the substrate through the mask after the mask is placed on the substrate, the part of the top face containing the concave portion; and removing the mask from the substrate after the conductive film is grown.

摘要翻译： 半导体器件的制造方法包括将具有开口的掩模放置在基板的顶面的外部区域上，以将掩模的开口的端部恰好位于形成在基板的顶面上的凹部的正上方， 所述外部区域位于所述凹部的外侧。 该制造方法还包括：在将掩模放置在基板上之后，通过掩模在基板的顶面的一部分上生长导电膜，顶面的一部分包含凹部; 并且在导电膜生长之后从衬底去除掩模。