公开(公告)号：US20240321780A1

公开(公告)日：2024-09-26

申请号：US18732662

申请日：2024-06-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Chih Huang ,  Chih-Hao Chang ,  Po-Chun Lin ,  Chun-Ti Lu ,  Zheng-Gang Tsai ,  Shih-Wei Chen ,  Chia-Hung Liu ,  Hao-Yi Tsai ,  Chung-Shi Liu

IPC分类号： H01L23/58 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L23/585 ,  H01L21/568 ,  H01L23/3157 ,  H01L24/19 ,  H01L24/25 ,  H01L2224/2518

摘要： A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a molded semiconductor device, a first redistribution structure, and conductive vias. The molded semiconductor device comprises a sensor die with a first surface and a second surface opposite the first surface, wherein the sensor die has an input/output region and a sensing region at the first surface. The first redistribution structure is disposed on the first surface of the sensor die, wherein the first redistribution structure covers the input/output region and exposes the sensing region, and the first redistribution structure comprises a conductive layer having a redistribution pattern and a ring structure. The redistribution pattern is electrically connected with the sensor die. The ring structure surrounds the sensing region and is separated from the redistribution pattern, wherein the ring structure is closer to the sensing region than the redistribution pattern. The conductive vias extend through the molded semiconductor device and are electrically connected with the redistribution pattern.

公开(公告)号：US12051666B2

公开(公告)日：2024-07-30

申请号：US17739200

申请日：2022-05-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Yuan Teng ,  Hao-Yi Tsai ,  Kuo-Lung Pan ,  Sen-Kuei Hsu ,  Tin-Hao Kuo ,  Yi-Yang Lei ,  Ying-Cheng Tseng ,  Chi-Hui Lai

IPC分类号： H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/31 ,  H01L23/538

CPC分类号： H01L24/24 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/19 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/24137

摘要： A package structure including at least one semiconductor die and a redistribution structure is provided. The semiconductor die is laterally encapsulated by an encapsulant, and the redistribution structure is disposed on the semiconductor die and the encapsulant and electrically connected with the semiconductor die. The redistribution structure includes signal lines and a pair of repair lines. The signal lines include a pair of first signal lines located at a first level, and each first signal line of the pair of first signal lines has a break that split each first signal line into separate first and second fragments. The pair of repair lines is located above the pair of first signal lines and located right above the break. Opposite ending portions of each repair line are respectively connected with the first and second fragments with each repair line covering the break in each first signal line.

公开(公告)号：US12040283B2

公开(公告)日：2024-07-16

申请号：US18303543

申请日：2023-04-19

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tzu-Sung Huang ,  Cheng-Chieh Hsieh ,  Hsiu-Jen Lin ,  Hui-Jung Tsai ,  Hung-Yi Kuo ,  Hao-Yi Tsai ,  Ming-Hung Tseng ,  Yen-Liang Lin ,  Chun-Ti Lu ,  Chung-Ming Weng

IPC分类号： H01L23/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L23/5389 ,  H01L21/56 ,  H01L21/78 ,  H01L23/3121 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50

摘要： A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion. The first insulating encapsulation laterally encapsulates the second semiconductor die, the first conductive pillars and the second portion.

公开(公告)号：US20240088307A1

公开(公告)日：2024-03-14

申请号：US18513644

申请日：2023-11-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Hsuan Tai ,  Hao-Yi Tsai ,  Yu-Chih Huang ,  Chih-Hao Chang ,  Chia-Hung Liu ,  Ban-Li Wu ,  Ying-Cheng Tseng ,  Po-Chun Lin

IPC分类号： H01L31/0203 ,  H01L31/02 ,  H01L31/024 ,  H01L31/18

CPC分类号： H01L31/0203 ,  H01L31/02002 ,  H01L31/024 ,  H01L31/1892

摘要： A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure. A method of forming the semiconductor package is also provided.

公开(公告)号：US20240047436A1

公开(公告)日：2024-02-08

申请号：US17880687

申请日：2022-08-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tzuan-Horng Liu ,  Hao-Yi Tsai ,  Kris Lipu Chuang ,  Hsin-Yu Pan

IPC分类号： H01L25/10 ,  H01L25/18 ,  H01L25/00

CPC分类号： H01L25/105 ,  H01L25/18 ,  H01L25/50 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1094 ,  H01L2225/1058 ,  H01L24/73

摘要： A semiconductor package and a manufacturing method are provided. The semiconductor package includes a first die disposed on and electrically coupled to a first redistribution structure and laterally covered by a first insulating encapsulation, a second die disposed over the first die and laterally covered by a second insulating encapsulation, a second redistribution structure interposed between and electrically coupled to the first and second dies, a third redistribution structure disposed on the second die and opposite to the second redistribution structure, and at least one thermal-dissipating feature embedded in a dielectric layer of the third redistribution structure and electrically isolated from a patterned conductive layer of the third redistribution structure through the dielectric layer. Through substrate vias of the first die are physically connected to the second redistribution structure or the first redistribution structure. The thermal-dissipating feature is thermally coupled to a back surface of the second die.

公开(公告)号：US11848233B2

公开(公告)日：2023-12-19

申请号：US17705378

申请日：2022-03-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Yuan Teng ,  Bor-Rung Su ,  De-Yuan Lu ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Tzung-Hui Lee ,  Tai-Min Chang

IPC分类号： H01L21/768 ,  H01L23/48 ,  H01L23/31 ,  H01L23/00 ,  H01L21/027 ,  H01L21/56

CPC分类号： H01L21/76871 ,  H01L21/0274 ,  H01L21/565 ,  H01L21/76816 ,  H01L21/76877 ,  H01L23/3107 ,  H01L23/481 ,  H01L24/08 ,  H01L24/49 ,  H01L2224/02331 ,  H01L2224/02372

摘要： A method includes the following steps. A seed layer is formed over a structure having at least one semiconductor die. A first patterned photoresist layer is formed over the seed layer, wherein the first patterned photoresist layer includes a first opening exposing a portion of the seed layer. A metallic wiring is formed in the first opening and on the exposed portion of the seed layer. A second patterned photoresist layer is formed on the first patterned photoresist layer and covers the metallic wiring, wherein the second patterned photoresist layer includes a second opening exposing a portion of the metallic wiring. A conductive via is formed in the second opening and on the exposed portion of the metallic wiring. The first patterned photoresist layer and the second patterned photoresist layer are removed. The metallic wiring and the conductive via are laterally wrapped around with an encapsulant.

公开(公告)号：US11837517B2

公开(公告)日：2023-12-05

申请号：US17668648

申请日：2022-02-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Hao-Yi Tsai ,  Tzu-Sung Huang ,  Ming-Hung Tseng ,  Hung-Yi Kuo

IPC分类号： H01L23/31 ,  H01L21/3205 ,  H01L23/522 ,  H01L23/64 ,  H01L23/10 ,  H01L23/498 ,  H01L23/538 ,  H02J7/00 ,  H02J50/10 ,  H04B5/00 ,  H01F38/14 ,  H01F27/36

CPC分类号： H01L23/3121 ,  H01F27/36 ,  H01F27/363 ,  H01F38/14 ,  H01L21/32051 ,  H01L23/10 ,  H01L23/49822 ,  H01L23/5227 ,  H01L23/5389 ,  H01L23/645 ,  H02J7/0042 ,  H02J50/10 ,  H04B5/0037 ,  H04B5/0075 ,  H01L2224/04105 ,  H01L2224/19 ,  H01L2224/73267 ,  H01L2924/19042 ,  H01L2924/19105

摘要： A semiconductor device package is provided. The semiconductor device package includes a semiconductor device, a molding material surrounding the semiconductor device, and a conductive slot positioned over the molding material. The conductive slot has an opening and at least two channels connecting the opening to the edges of the conductive slot, and at least two of the channels extend in different directions.

公开(公告)号：US11830796B2

公开(公告)日：2023-11-28

申请号：US17213102

申请日：2021-03-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Wei Chen ,  Yu-Chih Huang ,  Chih-Hao Chang ,  Po-Chun Lin ,  Chun-Ti Lu ,  Chia-Hung Liu ,  Hao-Yi Tsai

IPC分类号： H01L23/498 ,  H01L25/065 ,  H01L21/48 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00

CPC分类号： H01L23/49822 ,  H01L21/486 ,  H01L21/4857 ,  H01L23/49838 ,  H01L23/5383 ,  H01L24/16 ,  H01L24/32 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16235 ,  H01L2224/32237

摘要： A circuit substrate includes a base substrate, a plurality of conductive vias, a first redistribution circuit structure, a second redistribution circuit structure and a semiconductor die. The plurality of conductive vias penetrate through the base substrate. The first redistribution circuit structure is located on the base substrate and connected to the plurality of conductive vias. The second redistribution circuit structure is located over the base substrate and electrically connected to the plurality of conductive vias, where the second redistribution circuit structure includes a plurality of conductive blocks, and at least one of the plurality of conductive blocks is electrically connected to two or more than two of the plurality of conductive vias, and where the base substrate is located between the first redistribution circuit structure and the second redistribution circuit structure. The semiconductor die is located over the base substrate and laterally arranged next to the second redistribution circuit structure.

公开(公告)号：US20230378140A1

公开(公告)日：2023-11-23

申请号：US18363731

申请日：2023-08-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hao-Yi Tsai ,  Cheng-Chieh Hsieh ,  Tsung-Hsien Chiang ,  Hui-Chun Chiang ,  Tzu-Sung Huang ,  Ming-Hung Tseng ,  Kris Lipu Chuang ,  Chung-Ming Weng ,  Tsung-Yuan Yu ,  Tzuan-Horng Liu

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L25/10

CPC分类号： H01L25/0657 ,  H01L24/03 ,  H01L24/05 ,  H01L25/50 ,  H01L25/105 ,  H01L24/08 ,  H01L24/02 ,  H01L2224/73204 ,  H01L2225/06586 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2224/0557 ,  H01L2224/05559 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L24/06 ,  H01L2224/06135 ,  H01L2224/0311 ,  H01L2224/0312 ,  H01L2224/02141 ,  H01L2224/08225 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L24/73

摘要： A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through substrate via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through substrate via. The second insulating encapsulation contacts with the second semiconductor die, the first insulting encapsulation, and the dielectric layer structure.

公开(公告)号：US11824017B2

公开(公告)日：2023-11-21

申请号：US17981470

申请日：2022-11-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wei-Kang Hsieh ,  Hao-Yi Tsai ,  Tin-Hao Kuo ,  Shih-Wei Chen

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L23/40 ,  H01L25/065

CPC分类号： H01L23/562 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/4006 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/50 ,  H01L2023/405 ,  H01L2023/4031 ,  H01L2023/4087 ,  H01L2221/68372 ,  H01L2224/95001 ,  H01L2924/3511

摘要： A semiconductor package has central region and peripheral region surrounding central region. The semiconductor package includes dies, encapsulant, and redistribution structure. The dies include functional die and first dummy dies. Functional die is disposed in central region. First dummy dies are disposed in peripheral region. Redistribution structure is disposed on encapsulant over the dies, and is electrically connected to functional die. Vacancy ratio of central region is in the range from 1.01 to 3.00. Vacancy ratio of the peripheral region is in the range from 1.01 to 3.00. Vacancy ratio of central region is a ratio of total area of central region to total area occupied by dies disposed in central region. Vacancy ratio of peripheral region is a ratio of total area of peripheral region to total area occupied by first dummy dies disposed in peripheral region.