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公开(公告)号：US20240356199A1
公开(公告)日：2024-10-24
申请号：US18762578
申请日：2024-07-02
CPC分类号： H01Q1/2283 , H01L21/4846 , H01L23/66 , H01L24/13 , H01L24/24 , H01L24/32 , H01L24/73 , H01Q1/40 , H01L2223/6677 , H01L2224/13024 , H01L2224/24101 , H01L2224/24227 , H01L2224/32225 , H01L2224/73267
摘要： A method of manufacturing an electronic device includes: providing a composite structure, wherein the composite structure comprises a core dielectric layer with two conductive layers formed on two opposite surfaces of the core dielectric layer; thinning the two conductive layers to form two thinned conductive layers; forming an antenna pattern using one of the two thinned conductive layers; forming an antenna package to encapsulate the antenna pattern therein; forming a circuit pattern by patterning the other one of the two thinned conductive layers; and forming a chip package to encapsulate the circuit pattern therein, wherein the chip package is electrically coupled to the antenna package.
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公开(公告)号：US12125797B2
公开(公告)日：2024-10-22
申请号：US17856154
申请日：2022-07-01
IPC分类号： H01L23/538 , H01L21/48 , H01L21/56 , H01L21/683 , H01L23/00 , H01L25/065 , H01L23/31 , H01L23/498 , H01L25/00 , H01L25/10
CPC分类号： H01L23/5386 , H01L21/4857 , H01L21/486 , H01L21/561 , H01L21/566 , H01L21/6835 , H01L23/5383 , H01L23/5384 , H01L23/5389 , H01L24/18 , H01L24/19 , H01L24/20 , H01L25/0657 , H01L21/568 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L25/105 , H01L25/50 , H01L2221/68345 , H01L2221/68359 , H01L2221/68372 , H01L2221/68381 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/18 , H01L2224/24227 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/1203 , H01L2924/1304 , H01L2924/13091 , H01L2924/1431 , H01L2224/97 , H01L2224/83 , H01L2224/97 , H01L2224/81 , H01L2924/13091 , H01L2924/00012 , H01L2924/1431 , H01L2924/00012 , H01L2924/1304 , H01L2924/00012 , H01L2924/1203 , H01L2924/00012
摘要： A package structure is provided. The package structure includes a semiconductor chip and a first dielectric layer over the semiconductor chip and extending across opposite sidewalls of the semiconductor chip. The package structure also includes a conductive layer over the first dielectric layer, and the conductive layer has multiple first protruding portions extending into the first dielectric layer. The package structure further includes a second dielectric layer over the first dielectric layer and the conductive layer. The second dielectric layer has multiple second protruding portions extending into the first dielectric layer. Each of the first protruding portions and the second protruding portions is thinner than the first dielectric layer.
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公开(公告)号：US20240332215A1
公开(公告)日：2024-10-03
申请号：US18741714
申请日：2024-06-12
发明人： Jen-Jui Yu , Ching-Hua Hsieh , Cheng-Ting Chen , Hsiu-Jen Lin , Wei-Yu Chen , Chih-Chiang Tsao , Chao-Wei Chiu
IPC分类号： H01L23/00 , H01L21/48 , H01L21/683 , H01L25/16
CPC分类号： H01L23/562 , H01L21/4853 , H01L21/6836 , H01L24/16 , H01L24/20 , H01L24/24 , H01L24/25 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/92 , H01L25/16 , H01L2221/68331 , H01L2224/16265 , H01L2224/214 , H01L2224/24011 , H01L2224/24105 , H01L2224/24155 , H01L2224/24265 , H01L2224/25171 , H01L2224/32225 , H01L2224/32245 , H01L2224/32265 , H01L2224/73204 , H01L2224/73209 , H01L2224/73217 , H01L2224/81024 , H01L2224/81815 , H01L2224/9211 , H01L2224/92133 , H01L2224/92135 , H01L2924/1815 , H01L2924/19011 , H01L2924/19104
摘要： A package structure and a method of forming the same are provided. The package structure includes a die, an encapsulant, a redistribution layer (RDL) structure, a passive device, and a plurality of dummy items. The encapsulant laterally encapsulates the die. The RDL structure is disposed on the die and the encapsulant. The passive device is disposed on and electrically bonded to the RDL structure. The plurality of dummy items are disposed on the RDL structure and laterally aside the passive device, wherein top surfaces of the plurality of dummy items are higher than a top surface of the passive device.
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公开(公告)号：US20240332132A1
公开(公告)日：2024-10-03
申请号：US18740523
申请日：2024-06-12
发明人： Jen-Chun Liao , Sung-Yueh Wu , Chien-Ling Hwang , Ching-Hua Hsieh
IPC分类号： H01L23/48 , H01L21/56 , H01L21/768 , H01L23/15 , H01L23/31 , H01L23/498 , H01L23/538
CPC分类号： H01L23/481 , H01L21/56 , H01L21/76898 , H01L23/15 , H01L23/3128 , H01L23/49833 , H01L23/49838 , H01L23/5385 , H01L23/5386
摘要： A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.
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公开(公告)号：US12057359B2
公开(公告)日：2024-08-06
申请号：US17884499
申请日：2022-08-09
发明人： Chun-Cheng Lin , Ching-Hua Hsieh , Chen-Hua Yu , Chung-Shi Liu , Chih-Wei Lin
IPC分类号： H01L23/31 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/29 , H01L23/367 , H01L23/498 , H01L23/538 , H01L25/065 , B29C45/14 , B29K63/00 , B29L31/34
CPC分类号： H01L23/3114 , H01L21/4853 , H01L21/486 , H01L21/565 , H01L21/566 , H01L23/295 , H01L23/3121 , H01L23/3135 , H01L23/3675 , H01L23/49816 , H01L23/5384 , H01L23/5385 , H01L23/5386 , H01L24/16 , H01L24/32 , H01L24/33 , H01L24/73 , H01L24/81 , H01L24/95 , H01L25/0655 , B29C45/14655 , B29K2063/00 , B29K2995/0007 , B29L2031/3406 , H01L24/13 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13118 , H01L2224/1312 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13149 , H01L2224/13155 , H01L2224/16225 , H01L2224/33181 , H01L2224/73204 , H01L2224/73253 , H01L2224/81192 , H01L2924/1431 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/19101 , H01L2924/3511 , H01L2924/3511 , H01L2924/00 , H01L2224/13111 , H01L2924/00014 , H01L2224/13139 , H01L2924/00014 , H01L2224/13147 , H01L2924/00014 , H01L2224/13155 , H01L2924/00014 , H01L2224/13113 , H01L2924/00014 , H01L2224/13118 , H01L2924/00014 , H01L2224/13149 , H01L2924/00014 , H01L2224/1312 , H01L2924/00014 , H01L2224/13109 , H01L2924/00014 , H01L2224/13144 , H01L2924/00014 , H01L2924/181 , H01L2924/00012 , H01L2224/73204 , H01L2224/32225 , H01L2224/16225 , H01L2924/00012 , H01L2924/15311 , H01L2224/73204 , H01L2224/16225 , H01L2224/32225 , H01L2924/00012 , H01L2924/1431 , H01L2924/00012
摘要： A semiconductor package including a circuit substrate, an interposer structure, a plurality of dies, and an insulating encapsulant is provided. The interposer structure is disposed on the circuit substrate. The plurality of dies is disposed on the interposer structure, wherein the plurality of dies is electrically connected to the circuit substrate through the interposer structure. The insulating encapsulant is disposed on the circuit substrate, wherein the insulating encapsulant surrounds the plurality of dies and the interposer structure and encapsulates at least the interposer structure, the insulating encapsulant has a groove that surrounds the interposer structure and the plurality of dies, and the interposer structure and the plurality of dies are confined to be located within the groove.
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公开(公告)号：US12033992B2
公开(公告)日：2024-07-09
申请号：US17396781
申请日：2021-08-09
IPC分类号： H01L25/16 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/538
CPC分类号： H01L25/16 , H01L21/4853 , H01L21/4857 , H01L21/568 , H01L23/3128 , H01L23/3135 , H01L23/49822 , H01L23/5381 , H01L24/16 , H01L2224/16225 , H01L2224/17177
摘要： A package includes a first die, a second die, a bridge structure, a first redistribution structure, and an encapsulant. The first die and the second die are disposed side by side. The bridge structure is disposed over the first die and the second die. The bridge structure includes a plurality of routing patterns and a plurality of connectors disposed on the plurality of routing patterns. The first redistribution structure is sandwiched between the first die and the bridge structure and is sandwiched between the second die and the bridge structure. The plurality of connectors of the bridge structure is in physical contact with the first redistribution structure. The encapsulant encapsulates the bridge structure. The plurality of routing patterns and the plurality of connectors of the bridge structure are completely spaced apart from the encapsulant.
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公开(公告)号：US12021037B2
公开(公告)日：2024-06-25
申请号：US18077778
申请日：2022-12-08
发明人： Yi-Da Tsai , Cheng-Ping Lin , Wei-Hung Lin , Chih-Wei Lin , Ming-Da Cheng , Ching-Hua Hsieh , Chung-Shi Liu
IPC分类号： H01L23/538 , H01L21/48 , H01L21/56 , H01L21/683 , H01L23/00 , H01L23/29 , H01L23/31 , H01L25/00 , H01L25/065
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/56 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/295 , H01L23/3135 , H01L23/5386 , H01L24/17 , H01L24/81 , H01L24/96 , H01L24/97 , H01L23/3128 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/0655 , H01L25/50 , H01L2221/68345 , H01L2221/68381 , H01L2224/1146 , H01L2224/11462 , H01L2224/13101 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/16227 , H01L2224/73204 , H01L2224/81005 , H01L2224/81193 , H01L2224/81815 , H01L2924/1203 , H01L2924/1304 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/3511 , H01L2924/3511 , H01L2924/00 , H01L2924/1304 , H01L2924/00012 , H01L2924/1203 , H01L2924/00012 , H01L2224/13101 , H01L2924/014 , H01L2924/00014 , H01L2924/181 , H01L2924/00012 , H01L2224/73204 , H01L2224/32225 , H01L2224/16225 , H01L2924/00012 , H01L2924/15311 , H01L2224/73204 , H01L2224/16225 , H01L2224/32225 , H01L2924/00012 , H01L2224/81815 , H01L2924/00014
摘要： Package structures and methods for forming the same are provided. The method includes forming a passivation layer having an opening and forming a first seed layer in the opening. The method further includes filling the opening with a conductive layer over the first seed layer and bonding an integrated circuit die to the conductive layer over a first side of the passivation layer. The method further includes removing a portion of the first seed layer to expose a top surface of the conductive layer and to partially expose a first sidewall of the passivation layer from a second side of the passivation layer and forming a second seed layer over the top surface of the conductive layer and over the first sidewall of the passivation layer.
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公开(公告)号：US20240063081A1
公开(公告)日：2024-02-22
申请号：US17890262
申请日：2022-08-17
发明人： Kai-Fung Chang , Sheng-Feng Weng , Ming-Yu Yen , Wei-Jhan Tsai , Chao-Wei Chiu , Chao-Wei Li , Chih-Wei Lin , Ching-Hua Hsieh
IPC分类号： H01L23/367 , H01L23/48 , H01L23/00 , H01L21/768 , H01L23/498
CPC分类号： H01L23/3677 , H01L23/481 , H01L24/08 , H01L21/76898 , H01L24/80 , H01L23/49816 , H01L23/49833 , H01L23/49838 , H01L23/49822 , H01L2924/182 , H01L2924/37001 , H01L2924/3511 , H01L2224/08056 , H01L2224/08059 , H01L2224/08225 , H01L2224/80895 , H01L2224/80896 , H01L2224/80097
摘要： A package structure including a semiconductor die, an encapsulant, a redistribution structure, and a through insulating via is provided. The first redistribution structure includes an insulating layer and a circuit layer. The semiconductor die is disposed on the first redistribution structure. The semiconductor die includes a semiconductor base, through semiconductor vias, a dielectric layer, and bonding connectors. Through semiconductor vias penetrate through the semiconductor base. The dielectric layer is disposed on a backside of the semiconductor base. The dielectric layer of the semiconductor die is bonded with the insulating layer of the first redistribution structure. The bonding connectors are embedded in the dielectric layer and connected to the through semiconductor vias. The bonding connectors of the semiconductor die are bonded with bonding pads of the circuit layer. The encapsulant is disposed on the first redistribution structure and encapsulates the semiconductor die.
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公开(公告)号：US11874513B2
公开(公告)日：2024-01-16
申请号：US18162712
申请日：2023-02-01
发明人： Chia-Lun Chang , Ching-Hua Hsieh , Cheng-Ting Chen , Hsiu-Jen Lin , Hsuan-Ting Kuo , Chia-Shen Cheng , Chih-Chiang Tsao
IPC分类号： G02B6/42 , H01L23/538 , H01L25/18 , H01L23/31 , H01L23/00 , H01L25/00 , H01L21/683 , H01L21/56 , G02B6/43 , H05K1/18 , H05K1/02
CPC分类号： G02B6/428 , G02B6/4214 , G02B6/4253 , G02B6/43 , H01L21/561 , H01L21/565 , H01L21/6835 , H01L23/3128 , H01L23/5386 , H01L24/24 , H01L24/82 , H01L24/96 , H01L25/18 , H01L25/50 , H05K1/0274 , H05K1/181 , H01L21/568 , H01L2221/68359 , H01L2221/68372 , H01L2221/68381 , H01L2224/215 , H01L2224/24225 , H01L2224/821 , H01L2224/82005 , H01L2224/95001 , H01L2924/12042 , H01L2924/12043 , H05K2201/10121 , H05K2201/10151 , H05K2201/2054
摘要： In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.
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公开(公告)号：US11855006B2
公开(公告)日：2023-12-26
申请号：US17389313
申请日：2021-07-29
发明人： Kai-Ming Chiang , Chao-wei Li , Wei-Lun Tsai , Chia-Min Lin , Yi-Da Tsai , Sheng-Feng Weng , Yu-Hao Chen , Sheng-Hsiang Chiu , Chih-Wei Lin , Ching-Hua Hsieh
IPC分类号： H01L23/00 , H01L21/48 , H01L21/56 , H01L21/683 , H01L23/31 , H01L23/538 , H01L25/065 , H01L25/00
CPC分类号： H01L23/562 , H01L21/4853 , H01L21/4857 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/3135 , H01L23/5383 , H01L23/5386 , H01L25/0652 , H01L25/50 , H01L2221/68372 , H01L2225/06541 , H01L2225/06586
摘要： A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
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