公开(公告)号：US20240274557A1

公开(公告)日：2024-08-15

申请号：US18568291

申请日：2021-06-14

申请人： Mitsubishi Electric Corporation

发明人： Yo TANAKA ,  Tetsu NEGISHI ,  Seiji OKA

IPC分类号： H01L23/00 ,  H02M7/5387

CPC分类号： H01L24/05 ,  H01L24/04 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/03 ,  H01L24/29 ,  H01L24/32 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/03436 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05013 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05553 ,  H01L2224/05557 ,  H01L2224/05564 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0568 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40225 ,  H01L2224/40499 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/49111 ,  H01L2224/49176 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/0665 ,  H02M7/5387

摘要： A surface electrode on the front surface of a semiconductor element and a metal foil provided on the surface electrode are partially joined, which makes it possible to reduce stress generated at the end of the metal foil, prevent a failure resulting from a crack in the front surface of the semiconductor element, and enhance reliability of the semiconductor device. Such a semiconductor device includes a semiconductor element having a front surface and a back surface, a surface electrode formed on the front surface of the semiconductor element, and a metal foil partially joined onto an upper surface of the surface electrode.

公开(公告)号：US20240120299A1

公开(公告)日：2024-04-11

申请号：US18234609

申请日：2023-08-16

申请人： Samsung Electronics Co., Ltd.

发明人： JIHOON KIM

IPC分类号： H01L23/00 ,  H01L25/065

CPC分类号： H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L25/0657 ,  H01L24/03 ,  H01L24/16 ,  H01L2224/0361 ,  H01L2224/05013 ,  H01L2224/05015 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05555 ,  H01L2224/05556 ,  H01L2224/05564 ,  H01L2224/0557 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/06181 ,  H01L2224/08145 ,  H01L2224/16227 ,  H01L2225/06565

摘要： A semiconductor package includes a first semiconductor structure including a first semiconductor substrate and a lower through structure that penetrates the first semiconductor substrate, a connection structure on the first semiconductor structure and a second semiconductor structure on the connection structure, the second semiconductor structure including a second semiconductor substrate and an upper through structure that penetrates the second semiconductor substrate, where the connection structure includes a lower curved pad on the lower through structure, and an upper curved pad on the lower curved pad, where a top surface of the lower curved pad includes a curved surface, where a bottom surface of the upper curved pad includes a curved surface, and where the upper curved pad is connected to the upper through structure.

公开(公告)号：US20240079359A1

公开(公告)日：2024-03-07

申请号：US18202126

申请日：2023-05-25

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Gayoung Kim

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05564 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147

摘要： A semiconductor package including a redistribution structure comprising a redistribution layer; a semiconductor chip electrically connected to the redistribution layer; bumps disposed on the redistribution structure; and under bump metallurgy (UBM) structures disposed between the bumps and the redistribution structure. Each of the UBM structures includes a first UBM layer including copper or a copper alloy; and a second UBM layer including nickel or nickel alloy and disposed between the redistribution structure and the first UBM layer. An area of a surface of the second UBM layer facing the first UBM layer is greater than an area of a surface of the first UBM layer facing the second UBM layer.

公开(公告)号：US11903298B2

公开(公告)日：2024-02-13

申请号：US17259373

申请日：2020-03-27

申请人： BOE TECHNOLOGY GROUP CO., LTD.

发明人： Junbo Wei ,  Shengji Yang ,  Kuanta Huang ,  Pengcheng Lu ,  Yuanlan Tian

IPC分类号： H01L27/32 ,  H10K59/88 ,  H10K59/131 ,  H10K71/70 ,  H10K59/80 ,  H01L21/66 ,  H10K50/88 ,  H10K77/10 ,  H01L23/00 ,  H10K71/00 ,  H10K102/00

CPC分类号： H10K59/88 ,  H01L22/30 ,  H01L22/32 ,  H10K50/88 ,  H10K59/131 ,  H10K59/873 ,  H10K71/70 ,  H10K77/111 ,  H01L24/05 ,  H01L24/08 ,  H01L2224/05556 ,  H01L2224/05564 ,  H01L2224/05573 ,  H01L2224/08225 ,  H10K59/8731 ,  H10K71/851 ,  H10K2102/351

摘要： A display panel includes a driving backplane, a plurality of detection pads, a light emitting function layer, and a flexible circuit board. The driving backplane has a pixel driving region and a peripheral region, and the peripheral region has bonding pads; an edge of the driving backplane is surrounded by a first section and a second section, and the bonding pads are located between the first section and the pixel driving region; a plurality of detection pads are disposed in and distributed along the second section; a light emitting function layer is disposed on the driving backplane and located in the pixel driving region; a flexible circuit board extends between the first section and the pixel driving region, and is bonded to the bonding pads; a first packaging layer is disposed on the light emitting function layer.

公开(公告)号：US20230352351A1

公开(公告)日：2023-11-02

申请号：US17731145

申请日：2022-04-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： PEI-LUM MA ,  KUN DA JHONG ,  HSUEH-HAN LU ,  KUN-EI CHEN ,  CHEN-CHIEH CHIANG ,  LING-SUNG WANG

IPC分类号： H01L21/66 ,  H01L23/00 ,  H01L49/02

CPC分类号： H01L22/32 ,  H01L24/02 ,  H01L22/12 ,  H01L22/14 ,  H01L24/05 ,  H01L24/03 ,  H01L24/06 ,  H01L28/10 ,  H01L2224/0235 ,  H01L2224/03614 ,  H01L2224/03622 ,  H01L2224/0363 ,  H01L2224/0392 ,  H01L2224/0391 ,  H01L2224/05013 ,  H01L2224/05015 ,  H01L2224/05012 ,  H01L2224/06515 ,  H01L2224/0603 ,  H01L2224/05073 ,  H01L2224/05564 ,  H01L2224/05573 ,  H01L2224/05686

摘要： A semiconductor structure is provided. The semiconductor structure includes an interconnection structure, a first conductive pad, a second conductive pad, a conductive material and a conductive coil. The first and second conductive pads are disposed over and electrically connected to the interconnection structure individually. The conductive material is electrically isolated from the interconnection structure, wherein bottom surfaces of the conductive material, the first conductive pad and the second conductive pad are substantially aligned. The conductive coil is disposed in the interconnection structure and overlapped by the conductive material. A manufacturing method of a semiconductor structure is also provided.

公开(公告)号：US20180366634A1

公开(公告)日：2018-12-20

申请号：US16062064

申请日：2015-12-30

申请人： Joshua Yousouf MUTUS ,  Anthony Erik LUCERO ,  GOOGLE LLC

发明人： Joshua Yousouf Mutus ,  Erik Anthony LUCERO

IPC分类号： H01L39/04 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

CPC分类号： H01L39/045 ,  H01L23/49816 ,  H01L23/49888 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L27/18 ,  H01L2224/0345 ,  H01L2224/0362 ,  H01L2224/0381 ,  H01L2224/03826 ,  H01L2224/0384 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05179 ,  H01L2224/05186 ,  H01L2224/05564 ,  H01L2224/05568 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/1145 ,  H01L2224/1181 ,  H01L2224/13023 ,  H01L2224/13109 ,  H01L2224/13116 ,  H01L2224/13164 ,  H01L2224/13179 ,  H01L2224/13183 ,  H01L2224/16145 ,  H01L2224/81013 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81409 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/20102 ,  H01L2924/00014 ,  H01L2924/04941

摘要： A device (100) includes a first chip (104) having a first circuit element (112), a first interconnect pad (116) in electrical contact (118) with the first circuit element, and a barrier layer (120) on the first interconnect pad, a superconducting bump bond (106) on the barrier layer, and a second chip (102) joined to the first chip by the superconducting bump bond, the second chip having a quantum circuit element (108), in which the superconducting bump bond provides an electrical connection between the first circuit element and the quantum circuit element.

公开(公告)号：US10056342B2

公开(公告)日：2018-08-21

申请号：US13664761

申请日：2012-10-31

申请人： FUJITSU LIMITED

发明人： Seiki Sakuyama ,  Toshiya Akamatsu ,  Nobuhiro Imaizumi ,  Keisuke Uenishi ,  Kenichi Yasaka ,  Toru Sakai

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/00 ,  H01L23/498 ,  H05K3/34

CPC分类号： H01L24/16 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/49866 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05147 ,  H01L2224/05564 ,  H01L2224/05568 ,  H01L2224/05639 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/16505 ,  H01L2924/00014 ,  H05K3/3436 ,  H01L2924/01047 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2224/05552

摘要： A surface of at least one of a connection terminal of an electronic component and a connection terminal of a circuit board is covered with a protection layer made of a AgSn alloy. The connection terminal of the electronic component is soldered to the connection terminal of the circuit board.

公开(公告)号：US09831156B2

公开(公告)日：2017-11-28

申请号：US15076141

申请日：2016-03-21

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Jing-Cheng Lin

IPC分类号： H01L21/76 ,  H01L23/48 ,  H01L21/768 ,  H01L27/06 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/762

CPC分类号： H01L23/481 ,  H01L21/76224 ,  H01L21/76898 ,  H01L24/80 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0688 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05563 ,  H01L2224/05564 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/08147 ,  H01L2224/13 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/80013 ,  H01L2224/80075 ,  H01L2224/80091 ,  H01L2224/80095 ,  H01L2224/80896 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2224/94 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10333 ,  H01L2924/10335 ,  H01L2924/10338 ,  H01L2924/10342 ,  H01L2224/80 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/80001 ,  H01L2224/82

摘要： Methods for forming a semiconductor device structure are provided. The method includes providing a first semiconductor wafer and a second semiconductor wafer. A first transistor is formed in a front-side of the first semiconductor wafer, and no devices are formed in the second semiconductor wafer. The method further includes bonding the front-side of the first semiconductor wafer to a backside of the second semiconductor wafer and thinning a front-side of the second semiconductor wafer. After thinning the second semiconductor wafer, a second transistor is formed in the front-side of the second semiconductor wafer. At least one first through substrate via (TSV) is formed in the second semiconductor wafer, and the first TSV directly contacts a conductive feature of the first semiconductor wafer.

公开(公告)号：US20170110428A1

公开(公告)日：2017-04-20

申请号：US15395859

申请日：2016-12-30

申请人： Roden R. Topacio ,  Suming Hu ,  Yip Seng Low

发明人： Roden R. Topacio ,  Suming Hu ,  Yip Seng Low

IPC分类号： H01L23/00

CPC分类号： H01L24/16 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03464 ,  H01L2224/0348 ,  H01L2224/03831 ,  H01L2224/03903 ,  H01L2224/0401 ,  H01L2224/05012 ,  H01L2224/05017 ,  H01L2224/05019 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05564 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05672 ,  H01L2224/05681 ,  H01L2224/085 ,  H01L2224/10126 ,  H01L2224/1146 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/14131 ,  H01L2224/16057 ,  H01L2224/16104 ,  H01L2224/16221 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/17104 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2924/12042 ,  H05K3/3436 ,  H05K3/4629 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00012

摘要： Various semiconductor chip solder bump and underbump metallization (UBM) structures and methods of making the same are disclosed. In one aspect, a method is provided that includes forming a first underbump metallization layer on a semiconductor chip is provided. The first underbump metallization layer has a hub, a first portion extending laterally from the hub, and a spoke connecting the hub to the first portion. A polymer layer is applied to the first underbump metallization layer. The polymer layer includes a first opening in alignment with the hub and a second opening in alignment with the spoke. A portion of the spoke is removed via the second opening to sever the connection between the hub and the first portion.

公开(公告)号：US09607957B2

公开(公告)日：2017-03-28

申请号：US15236016

申请日：2016-08-12

申请人： ROHM CO., LTD.

发明人： Katsumi Sameshima

IPC分类号： H01L23/48 ,  H01L23/00

CPC分类号： H01L24/08 ,  H01L23/3171 ,  H01L23/525 ,  H01L23/528 ,  H01L24/03 ,  H01L24/05 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/32 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05018 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/0556 ,  H01L2224/05564 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/1147 ,  H01L2224/11912 ,  H01L2224/13006 ,  H01L2224/1301 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/32501 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/05552

摘要： A semiconductor chip includes a substrate, an electrode pad formed on the substrate, an insulating layer covering the substrate and the electrode pad, and having an opening exposing a portion of a surface of the electrode pad, a first conductive layer formed on the exposed portion of the surface of the electrode pad and extending to a surface of the insulating layer, and a second conductive layer formed on the first conductive layer, covering the first conductive layer in a plan view, and having an outer edge portion which is located further out than an outer edge of the first conductive layer in a plan view. The outer edge portion of the second conductive layer has at least one curved portion. At least one portion of the curved portion is located between the outer edge of the first conductive layer and an outer edge of the second conductive layer in a plan view.