公开(公告)号：US20240055385A1

公开(公告)日：2024-02-15

申请号：US18315537

申请日：2023-05-11

申请人： WISTRON NEWEB CORPORATION

发明人： KUO-HUA HSIEH ,  CHAO-CHIEH CHAN ,  MING-JHE WU ,  CHIH-YANG WENG

IPC分类号： H01L23/00 ,  H01L23/373

CPC分类号： H01L24/17 ,  H01L23/3737 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/10 ,  H01L24/26 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/73 ,  H01L2224/11318 ,  H01L2224/10175 ,  H01L2224/1319 ,  H01L2924/0665 ,  H01L2224/13021 ,  H01L2224/14132 ,  H01L2224/16237 ,  H01L2224/17519 ,  H01L2224/81007 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/81862 ,  H01L2224/17517 ,  H01L2224/17051 ,  H01L2224/14152 ,  H01L2224/26175 ,  H01L2224/2731 ,  H01L2224/29021 ,  H01L2224/29013 ,  H01L2224/29012 ,  H01L2224/2919 ,  H01L2224/30155 ,  H01L2224/3015 ,  H01L2224/30051 ,  H01L2224/32237 ,  H01L2224/83007 ,  H01L2224/83192 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/73203

摘要： A package structure and a method for fabricating the same are provided. The package structure includes a substrate, a semiconductor package and an adhesive body. The substrate has a first board surface and a second board surface. The semiconductor package has an upper surface and a lower surface, is disposed on the first board surface and electrically connected to the substrate through pins, and has a first vertical projection on the first board surface. An adhesive groove is disposed on the first board surface and is located in at least one portion of the first vertical projection and a periphery of the first vertical projection. The adhesive body is disposed in the adhesive groove, and protrudes to contact the lower surface, so as to fix the semiconductor package. The adhesive groove does not overlap with the pins, and the adhesive body does not contact the pins.

公开(公告)号：US20160329308A1

公开(公告)日：2016-11-10

申请号：US15217084

申请日：2016-07-22

申请人： Invensas Corporation

发明人： Reynaldo Co ,  Wael Zohni ,  Rizza Lee Saga Cizek ,  Rajesh Katkar

IPC分类号： H01L25/065 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L21/56 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/34 ,  H01L23/367 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5226 ,  H01L24/17 ,  H01L24/81 ,  H01L25/50 ,  H01L2221/68318 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2224/0401 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/014 ,  H01L2924/15151 ,  H01L2924/15312 ,  H01L2924/15321 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2924/00

摘要： A microelectronic package may include a substrate having first and second regions, a first surface and a second surface remote from the first surface; at least one microelectronic element overlying the first surface within the first region; electrically conductive elements at the first surface within the second region; a support structure having a third surface and a fourth surface remote from the third surface and overlying the first surface within the second region in which the third surface faces the first surface, second and third electrically conductive elements exposed respectively at the third and fourth surfaces and electrically connected to the conductive elements at the first surface in the first region; and wire bonds defining edge surfaces and having bases electrically connected through ones of the third conductive elements to respective ones of the second conductive elements and ends remote from the support structure and the bases.

公开(公告)号：US20160126217A1

公开(公告)日：2016-05-05

申请号：US14527534

申请日：2014-10-29

申请人： Elwha LLC

发明人： William David Duncan ,  Roderick A. Hyde ,  Jordin T. Kare ,  Thomas M. McWilliams ,  Thomas Allan Weaver ,  Lowell L. Wood, JR.

IPC分类号： H01L23/00

CPC分类号： H01L23/48 ,  H01F2038/146 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05026 ,  H01L2224/05082 ,  H01L2224/051 ,  H01L2224/05571 ,  H01L2224/05686 ,  H01L2224/10145 ,  H01L2224/11013 ,  H01L2224/11318 ,  H01L2224/11424 ,  H01L2224/11444 ,  H01L2224/13019 ,  H01L2224/13023 ,  H01L2224/13186 ,  H01L2224/1319 ,  H01L2224/13194 ,  H01L2224/13286 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/14164 ,  H01L2224/81007 ,  H01L2224/81101 ,  H01L2224/81141 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/8181 ,  H01L2224/819 ,  H01L2225/06531 ,  H01L2924/00012 ,  H01L2924/00014

摘要： Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets.

摘要翻译： 使用液滴的基板间耦合和对准可以包括电和等离子体模式。 例如，一组液滴可以放置在底部基板上。 顶部衬底可以放置在液滴上，液滴使用液滴来对准衬底。 使用电容或等离子体耦合模式中的液滴，可以使用液滴在基板之间传递信息或功率。

公开(公告)号：US09209140B2

公开(公告)日：2015-12-08

申请号：US14015808

申请日：2013-08-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Feng Chen ,  Kai-Chiang Wu ,  Chun-Lin Lu ,  Hung-Jui Kuo

IPC分类号： H01L23/58 ,  H01L23/498 ,  H01L23/00 ,  H01L23/16 ,  H01L23/544 ,  H01L23/10 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/48 ,  H01L23/14 ,  H01L21/48 ,  H01L21/768

CPC分类号： H01L21/3205 ,  H01L21/283 ,  H01L21/3213 ,  H01L21/34 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/10 ,  H01L23/147 ,  H01L23/16 ,  H01L23/28 ,  H01L23/31 ,  H01L23/3157 ,  H01L23/4334 ,  H01L23/481 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/544 ,  H01L23/562 ,  H01L23/564 ,  H01L23/585 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2021/6024 ,  H01L2223/5446 ,  H01L2224/02235 ,  H01L2224/02255 ,  H01L2224/0226 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03622 ,  H01L2224/0401 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/11318 ,  H01L2224/13026 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81139 ,  H01L2224/92124 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/06 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/2064 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00

摘要： Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a semiconductor device includes a substrate, and a plurality of contact pads disposed over the substrate. The contact pads are arranged in a ball grid array (BGA), and the BGA includes a plurality of corners. A metal dam is disposed around each of the plurality of corners of the BGA.

摘要翻译： 公开了半导体器件及其制造方法。 在一些实施例中，半导体器件包括衬底以及设置在衬底上的多个接触焊盘。 接触垫布置成球栅阵列（BGA），并且BGA包括多个拐角。 在BGA的多个拐角的每一个周围设置一个金属坝。

公开(公告)号：US20150325543A1

公开(公告)日：2015-11-12

申请号：US14275514

申请日：2014-05-12

申请人： Invensas Corporation

发明人： Rajesh KATKAR ,  Cyprian Emeka UZOH

IPC分类号： H01L23/00 ,  B23K26/32 ,  H05K1/14 ,  H05K3/34 ,  H05K1/11

CPC分类号： H01L24/14 ,  B23K1/0016 ,  B23K3/0623 ,  B23K35/0244 ,  B23K35/0266 ,  B23K2101/40 ,  H01L21/02225 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/83 ,  H01L24/98 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/03318 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0391 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/0508 ,  H01L2224/051 ,  H01L2224/05567 ,  H01L2224/056 ,  H01L2224/06102 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11009 ,  H01L2224/111 ,  H01L2224/11318 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1405 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/75253 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/8122 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/81825 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K1/115 ,  H05K1/144 ,  H05K3/341 ,  H05K2201/09572 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2224/81 ,  H01L2224/83

摘要： In some embodiments, to increase the height-to-pitch ratio of a solder connection that connects different structures with one or more solder balls, only a portion of a solder ball's surface is melted when the connection is formed on one structure and/or when the connection is being attached to another structure. In some embodiments, non-solder balls are joined by an intermediate solder ball (140i). A solder connection may be surrounded by a solder locking layer (1210) and may be recessed in a hole (1230) in that layer. Other features are also provided.

摘要翻译： 在一些实施例中，为了增加将不同结构与一个或多个焊球连接的焊料连接的高度与间距比，当连接形成在一个结构上时和/或当 连接正在附加到另一个结构。 在一些实施例中，非焊球通过中间焊球（140i）连接。 焊料连接可以被焊料锁定层（1210）包围，并且可以凹陷在该层中的孔（1230）中。 还提供其他功能。

公开(公告)号：US20140374005A1

公开(公告)日：2014-12-25

申请号：US14306944

申请日：2014-06-17

申请人： SHIN-ETSU CHEMICAL CO., LTD.

发明人： Yoshitaka Hamada

IPC分类号： H05K3/12

CPC分类号： H05K1/095 ,  H01L24/11 ,  H01L24/13 ,  H01L24/75 ,  H01L24/81 ,  H01L24/98 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/11848 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13291 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13387 ,  H01L2224/1339 ,  H01L2224/13393 ,  H01L2224/13439 ,  H01L2224/13444 ,  H01L2224/13447 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/75251 ,  H01L2224/75272 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81862 ,  H01L2224/9212 ,  H01L2225/06513 ,  H01L2924/12042 ,  H01L2924/351 ,  H05K1/0306 ,  H05K3/225 ,  H05K3/368 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/0542 ,  H01L2924/0103 ,  H01L2924/0544 ,  H01L2924/0105 ,  H01L2924/053 ,  H01L2924/01051 ,  H01L2924/0549 ,  H01L2924/04642 ,  H01L2924/00012 ,  H01L2924/014

摘要： A conductive circuit is formed using a substantially solvent-free, liquid, addition curable, conductive circuit-forming ink composition comprising (A) an organopolysiloxane having at least two silicon-bonded alkenyl groups, (B) an organohydrogenpolysiloxane having at least two SiH groups, (C) conductive particles, (D) a thixotropic agent, and (E) a hydrosilylation catalyst. The ink composition is printed on a metal electrode to form a green circuit pattern layer, which is fired and cured for thereby forming a conductive circuit and bonding the conductive circuit to the metal electrode.

摘要翻译： 使用基本上无溶剂的液体可加成固化的导电电路形成油墨组合物形成导电电路，其包含（A）具有至少两个与硅键合的烯基的有机聚硅氧烷，（B）具有至少两个SiH基团的有机氢聚硅氧烷 ，（C）导电颗粒，（D）触变剂和（E）氢化硅烷化催化剂。 将油墨组合物印刷在金属电极上以形成绿色电路图案层，其被烧制和固化，从而形成导电电路并将导电电路接合到金属电极。

公开(公告)号：US20140124910A1

公开(公告)日：2014-05-08

申请号：US14060910

申请日：2013-10-23

申请人： Byung-Woo LEE

发明人： Byung-Woo LEE

IPC分类号： H01L23/00 ,  H01L23/495

CPC分类号： H01L24/16 ,  H01L21/486 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/3178 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/5384 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05647 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/13016 ,  H01L2224/1302 ,  H01L2224/13147 ,  H01L2224/16012 ,  H01L2224/16111 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/1624 ,  H01L2224/27334 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/9202 ,  H01L2224/92143 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012

摘要： Semiconductor packages and methods of forming the same may be provided. According to the semiconductor package of the present inventive concepts, a bump attached to and protruded from a bonding pad on a surface of a semiconductor chip is inserted into a through-hole defined in a package substrate. As a result, a thickness of the semiconductor package may be reduced by at least a height of the bump. Because an empty space does not exist between a semiconductor chip and the package substrate, the semiconductor package does not need a conventional underfill resin layer. Accordingly, processes of forming the semiconductor package may be simplified.

摘要翻译： 可以提供半导体封装及其形成方法。 根据本发明构思的半导体封装，附着到半导体芯片的表面上的焊盘上并从其上突出的突起被插入到封装衬底中限定的通孔中。 结果，半导体封装的厚度可以至少降低凸块的高度。 由于在半导体芯片和封装基板之间不存在空的空间，所以半导体封装不需要常规的底部填充树脂层。 因此，可以简化形成半导体封装的工艺。

公开(公告)号：US20140004697A1

公开(公告)日：2014-01-02

申请号：US13534289

申请日：2012-06-27

申请人： GENG SHIN SHEN

发明人： GENG SHIN SHEN

IPC分类号： H01L21/283

CPC分类号： H01L21/4853 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/11332 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13082 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2224/05552

摘要： The present disclosure is related to a method of providing a die structure for semiconductor packaging. The method includes providing a substrate with a bonding pad; forming a patterned mask layer on the substrate; forming an opening on the mask layer; depositing a conductive layer in the opening; forming a cap layer on the conductive layer, and removing the mask layer. The cap layer forming step allows the contacting area between the cap layer and the conductive layer to be substantially equal to the top surface area of the conductive layer by reflowing solder material prior to the removal of the mask layer.

摘要翻译： 本公开涉及提供用于半导体封装的管芯结构的方法。 该方法包括：提供具有接合焊盘的基板; 在衬底上形成图案化掩模层; 在掩模层上形成开口; 在开口中沉积导电层; 在导电层上形成覆盖层，除去掩模层。 盖层形成步骤允许在去除掩模层之前通过回流焊料材料，覆盖层和导电层之间的接触面积基本上等于导电层的顶表面积。

公开(公告)号：US20130256880A1

公开(公告)日：2013-10-03

申请号：US13851468

申请日：2013-03-27

申请人： OLYMPUS CORPORATION

发明人： Chihiro Migita ,  Hiroshi Kikuchi ,  Yoshiaki Takemoto

IPC分类号： H01L23/498

CPC分类号： H01L23/49811 ,  H01L21/563 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/13005 ,  H01L2224/13018 ,  H01L2224/13023 ,  H01L2224/13078 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81012 ,  H01L2224/81013 ,  H01L2224/81022 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/83104 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/113

摘要： An electrode body is provided as an electrode body capable of appropriately reducing a load when silicon wafer direct bonding is performed. The electrode body includes a base member that has a predetermined thickness; and an electrode portion that is formed on one surface of the base member in a thickness direction thereof. The electrode portion includes a basic bump formed in a substantially columnar shape to protrude on the base member and a fragile bump formed independently from the basic bump to form a metallic bond with the basic bump.

摘要翻译： 电极体设置为能够在进行硅晶片直接接合时适当减小负载的电极体。 电极体包括具有预定厚度的基底构件; 以及电极部，其形成在所述基材的一个表面上的厚度方向上。 电极部分包括形成为基本上柱状的基本凸起，以突出在基底构件上，并且独立于基本凸块形成的易碎凸块与基底凸块形成金属结合。

公开(公告)号：US20100159644A1

公开(公告)日：2010-06-24

申请号：US12642445

申请日：2009-12-18

申请人： Rajiv Carl Dunne ,  Marvin Wayne Cowens ,  Mario Antonio Bolanos

发明人： Rajiv Carl Dunne ,  Marvin Wayne Cowens ,  Mario Antonio Bolanos

IPC分类号： H01L21/78 ,  H01L21/60

CPC分类号： H01L24/29 ,  H01L21/563 ,  H01L23/295 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/32 ,  H01L24/73 ,  H01L24/91 ,  H01L24/94 ,  H01L2224/0554 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/1148 ,  H01L2224/11515 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1329 ,  H01L2224/13339 ,  H01L2224/13347 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/274 ,  H01L2224/27416 ,  H01L2224/27436 ,  H01L2224/27438 ,  H01L2224/27515 ,  H01L2224/27602 ,  H01L2224/27618 ,  H01L2224/29011 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/29388 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2224/8185 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/921 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： Various exemplary embodiments provide materials and methods for flip-chip packaging technology. The disclosed flip-chip packaging technology can use a single B-stage wafer-applied photo-sensitive adhesive along with printed interconnects, which does not include conventional underfill materials and processes. In one embodiment, a photo-sensitive adhesive can be applied on a semiconductor die or a base substrate with conductive bumps printed in through-openings of the photo-sensitive adhesive. One or more semiconductor dies can be laterally packaged or vertically stacked on the base substrate using the printed conductive bumps as interconnects there-between.

摘要翻译： 各种示例性实施例提供了用于倒装芯片封装技术的材料和方法。 所公开的倒装芯片封装技术可以使用单个B阶晶片施加的光敏粘合剂以及不包括常规底层填充材料和工艺的印刷互连。 在一个实施例中，可以将光敏粘合剂施加在半导体管芯或基底衬底上，其中导电凸块印刷在光敏粘合剂的通孔中。 可以使用印刷的导电凸块作为其间的互连，将一个或多个半导体管芯横向封装或垂直堆叠在基底基板上。