公开(公告)号：US12027465B2

公开(公告)日：2024-07-02

申请号：US17952838

申请日：2022-09-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Christopher Wyland

IPC分类号： H01L23/538 ,  H01L23/00 ,  H01L23/522 ,  H01L23/66 ,  H01P1/04 ,  H05K1/02

CPC分类号： H01L23/5383 ,  H01L23/5226 ,  H01L23/5387 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/50 ,  H01L24/86 ,  H01L24/91 ,  H01P1/047 ,  H05K1/0243 ,  H01L24/45 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4805 ,  H01L2224/48091 ,  H01L2224/48135 ,  H01L2224/48472 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49052 ,  H01L2224/49111 ,  H01L2224/49174 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1903 ,  H01L2924/19032 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/3025 ,  H05K2203/049 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2224/45144 ,  H01L2924/00014 ,  H01L2224/45147 ,  H01L2924/00014 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20755 ,  H01L2224/45015 ,  H01L2924/20754 ,  H01L2224/45015 ,  H01L2924/20753 ,  H01L2224/45015 ,  H01L2924/20752 ,  H01L2224/45015 ,  H01L2924/20751 ,  H01L2224/49111 ,  H01L2224/48472 ,  H01L2924/00 ,  H01L2224/48472 ,  H01L2224/48091 ,  H01L2924/00 ,  H01L2924/01015 ,  H01L2924/00 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2224/85207 ,  H01L2924/00 ,  H01L2224/49175 ,  H01L2224/48472 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/45014 ,  H01L2924/206

摘要： A method of improving electrical interconnections between two electrical elements is made available by providing a meta-material overlay in conjunction with the electrical interconnection. The meta-material overlay is designed to make the electrical signal propagating via the electrical interconnection to act as though the permittivity and permeability of the dielectric medium within which the electrical interconnection is formed are different than the real component permittivity and permeability of the dielectric medium surrounding the electrical interconnection. In some instances the permittivity and permeability resulting from the meta-material cause the signal to propagate as if the permittivity and permeability have negative values. Accordingly the method provides for electrical interconnections possessing enhanced control and stability of impedance, reduced noise, and reduced loss. Alternative embodiments of the meta-material overlay provide, the enhancements for conventional discrete wire bonds whilst also facilitating single integrated designs compatible with tape implementation.

公开(公告)号：US11901322B2

公开(公告)日：2024-02-13

申请号：US17747124

申请日：2022-05-18

申请人： MagnaChip Semiconductor, Ltd.

发明人： Jin Won Jeong ,  Jae Sik Choi ,  Byeung Soo Song

IPC分类号： H10K77/10 ,  H01L23/31 ,  H01L23/00 ,  H01L21/3065 ,  H01L21/268 ,  H01L21/304 ,  H01L25/16 ,  H01L21/78 ,  H10K71/00

CPC分类号： H01L24/11 ,  H01L21/268 ,  H01L21/3043 ,  H01L21/3065 ,  H01L21/78 ,  H01L24/03 ,  H01L24/04 ,  H01L24/13 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L25/167 ,  H10K71/00 ,  H10K77/111 ,  H01L2224/0401

摘要： A semiconductor chip packaging method includes forming a bump on a wafer, forming a coating film covering the bump, laser grooving the wafer, plasma etching the wafer on which the laser grooving is performed, exposing the bump by removing the coating film covering the bump, fabricating a semiconductor die by performing mechanical sawing of the wafer, and packaging the semiconductor die.

公开(公告)号：US11728326B2

公开(公告)日：2023-08-15

申请号：US17115143

申请日：2020-12-08

申请人： Yangtze Memory Technologies Co., Ltd.

发明人： Ziqi Chen ,  Chao Li ,  Guanping Wu

IPC分类号： H01L27/11575 ,  H01L25/00 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  H10B43/50 ,  H01L23/00 ,  H01L25/065

CPC分类号： H01L25/50 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L25/0657 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  H10B43/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/81895 ,  H01L2224/83896 ,  H01L2924/01014 ,  H01L2924/14511

摘要： Methods and structures of a three-dimensional memory device are disclosed. In an example, the method for forming a memory device includes the following operations. First, a plurality of first semiconductor channels can be formed over a first wafer with a peripheral device and a plurality of first via structures neighboring the plurality of first semiconductor channels. The plurality of first semiconductor channels can extend along a direction perpendicular to a surface of the first wafer. Further, a plurality of second semiconductor channels can be formed over a second wafer with a plurality of second via structures neighboring the plurality of second semiconductor channels. The plurality of second semiconductor channels can extend along a direction perpendicular to a surface of the second wafer and a peripheral via structure.

公开(公告)号：US20180174998A1

公开(公告)日：2018-06-21

申请号：US15802941

申请日：2017-11-03

申请人： TOYOTA JIDOSHA KABUSHIKI KAISHA

发明人： Kaisei SATO ,  Keita HATASA ,  Tomomi OKUMURA

IPC分类号： H01L23/00

CPC分类号： H01L24/85 ,  H01L23/49513 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49568 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/91 ,  H01L24/92 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/271 ,  H01L2224/2741 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/45147 ,  H01L2224/48245 ,  H01L2224/48847 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83385 ,  H01L2224/83447 ,  H01L2224/83815 ,  H01L2224/85048 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85447 ,  H01L2224/92165 ,  H01L2224/9221 ,  H01L2224/92247 ,  H01L2924/00015 ,  H01L2924/01029 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/365 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Method for manufacturing a semiconductor device includes: preparing a first subassembly in which an upper surface of the conductive spacer is soldered on the second conductive member and preliminary solder is provided on a lower surface of the conductive spacer; preparing a second subassembly in which the lower surface of the semiconductor element is soldered on the first conductive member and the bonding wire is joined on upper surface of the semiconductor element; and soldering the upper surface of the semiconductor element in the second subassembly on the lower surface of the conducive spacer in the first subassembly by melting the preliminary solder in the first subassembly

公开(公告)号：US20170233615A1

公开(公告)日：2017-08-17

申请号：US15518680

申请日：2016-01-20

申请人： SEKISUI CHEMICAL CO., LTD.

发明人： Mitsuru Tanikawa ,  Takashi Watanabe ,  Yusuke Fujita ,  Yoshito Fujita ,  Tasuku Yamada

IPC分类号： C09J9/02 ,  C09D11/101 ,  C09D11/107 ,  C09D133/14 ,  C09J5/04 ,  C09D11/52 ,  C09J133/14 ,  C09J133/10 ,  H01L23/00 ,  C09J5/06 ,  C09D11/30 ,  C09D133/10

CPC分类号： C09D133/14 ,  C08G59/4215 ,  C08G59/5033 ,  C08G59/686 ,  C08L33/08 ,  C09D11/101 ,  C09D11/107 ,  C09D11/30 ,  C09D11/52 ,  C09D133/10 ,  C09J4/06 ,  C09J5/04 ,  C09J5/06 ,  C09J9/02 ,  C09J133/10 ,  C09J133/14 ,  C09J163/00 ,  C09J171/12 ,  C09J201/02 ,  C09J2203/326 ,  C09J2205/114 ,  C09J2205/31 ,  C09J2433/00 ,  C09J2461/00 ,  C09J2463/00 ,  H01L21/52 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/2741 ,  H01L2224/2783 ,  H01L2224/27848 ,  H01L2224/29083 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/83026 ,  H01L2224/8322 ,  H01L2224/83359 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/83947 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/85399 ,  C08L33/04

摘要： Provided is an inkjet adhesive which is applied using an inkjet device, wherein the adhesive can suppress generation of voids in the adhesive layer and, after bonding, can enhance adhesiveness, moisture-resistant adhesion reliability, and cooling/heating cycle reliability. An inkjet adhesive according to the present invention comprises a photocurable compound, a photo-radical initiator, a thermosetting compound having one or more cyclic ether groups or cyclic thioether groups, and a compound capable of reacting with the thermosetting compound, and the compound capable of reacting with the thermosetting compound contains aromatic amine.

公开(公告)号：US09604168B2

公开(公告)日：2017-03-28

申请号：US14000981

申请日：2013-02-14

申请人： Nanopareil, LLC

发明人： Todd Menkhaus ,  Hao Fong

IPC分类号： B01D37/00 ,  B01D39/16 ,  B01D39/18 ,  B01D71/06 ,  B01D71/12 ,  B01D71/14 ,  B01D71/16 ,  B01D71/18 ,  B01D71/20 ,  B32B27/02 ,  D01D5/00 ,  D04H1/42 ,  H01L23/48 ,  H01L25/065 ,  H01L25/00 ,  D01F2/24 ,  D01F6/44 ,  D01F6/88 ,  B01J20/24 ,  B01J20/28 ,  B01J20/32 ,  H01L23/00 ,  B01D15/38 ,  B01D15/32 ,  B01D15/36

CPC分类号： B01D39/1615 ,  B01D15/327 ,  B01D15/361 ,  B01D15/3804 ,  B01D15/3809 ,  B01D39/1623 ,  B01D39/1676 ,  B01D2239/025 ,  B01D2239/0414 ,  B01J20/24 ,  B01J20/28007 ,  B01J20/28038 ,  B01J20/3212 ,  B01J20/3217 ,  B01J20/3248 ,  B01J20/3293 ,  C07K1/22 ,  D01D5/0007 ,  D01D5/003 ,  D01F2/24 ,  D01F6/44 ,  D01F6/88 ,  H01L23/48 ,  H01L24/16 ,  H01L24/72 ,  H01L24/73 ,  H01L24/90 ,  H01L24/91 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/73201 ,  H01L2224/81138 ,  H01L2224/81815 ,  H01L2224/9211 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06531 ,  H01L2225/06562 ,  H01L2225/06593 ,  H01L2924/0002 ,  H01L2924/15153 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/3511 ,  H01L2924/37001 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/16 ,  H01L2224/72 ,  H01L2224/81 ,  H01L2224/90 ,  H01L2924/00014 ,  H01L2924/00012

摘要： The present invention relates generally to compositions for use in biological and chemical separations, as well as other applications. More specifically, the present invention relates to hybrid felts fabricated from electrospun nanofibers with high permeance and high capacity. Such hybrid felts utilize derivatized cellulose, and at least one non-cellulose-based polymer that may be removed from the felt by subjecting it to moderately elevated temperatures and/or solvents capable of dissolving the non-cellulose-based polymer to leave behind a porous nanofiber felt having more uniform pore sizes and other enhanced properties when compared to single component nanofiber felts.

公开(公告)号：US09543197B2

公开(公告)日：2017-01-10

申请号：US13719836

申请日：2012-12-19

申请人： INTEL CORPORATION

发明人： Chuan Hu ,  Dingying Xu ,  Yoshihiro Tomita

IPC分类号： H01L21/00 ,  H01L21/768 ,  H01L23/00 ,  H01L21/56 ,  H01L23/538 ,  H01L23/31 ,  H01L25/16

CPC分类号： H01L25/50 ,  H01L21/561 ,  H01L21/568 ,  H01L21/76838 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/27002 ,  H01L2224/27003 ,  H01L2224/27334 ,  H01L2224/2784 ,  H01L2224/29078 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/00014 ,  H01L2224/27 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/00

摘要： Embodiments of the present disclosure are directed to techniques and configurations for an integrated circuit (IC) package having one or more dies connected to an integrated circuit substrate by an interface layer. In one embodiment, the interface layer may include an anisotropic portion configured to conduct electrical signals in the out-of-plane direction between one or more components, such as a die and an integrated circuit substrate. In another embodiment, the interface layer may be a dielectric or electrically insulating layer. In yet another embodiment, the interface layer may include an anisotropic portion that serves as an interconnect between two components, a dielectric or insulating portion, and one or more interconnect structures that are surrounded by the dielectric or insulating portion and serve as interconnects between the same or other components. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例涉及具有通过界面层连接到集成电路基板的一个或多个管芯的集成电路（IC）封装的技术和配置。 在一个实施例中，界面层可以包括各向异性部分，其被配置为在诸如管芯和集成电路基板的一个或多个部件之间的面外方向上传导电信号。 在另一个实施例中，界面层可以是介电层或电绝缘层。 在另一个实施例中，界面层可以包括用作两个部件之间的互连的各向异性部分，电介质或绝缘部分，以及由电介质或绝缘部分包围并用作相互之间的互连的一个或多个互连结构 或其他组件。 可以描述和/或要求保护其他实施例。

公开(公告)号：US09443827B2

公开(公告)日：2016-09-13

申请号：US14521181

申请日：2014-10-22

申请人： SPANSION LLC

发明人： Kouichi Meguro

IPC分类号： H01L21/8238 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/48 ,  H01L21/50 ,  H01L25/065 ,  H01L21/56 ,  H01L21/683 ,  H01L21/768 ,  H01L23/48 ,  H01L25/10 ,  H01L25/00 ,  H01L21/304 ,  H01L21/78 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L21/304 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/481 ,  H01L24/11 ,  H01L24/16 ,  H01L24/17 ,  H01L24/18 ,  H01L24/19 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/82 ,  H01L24/85 ,  H01L24/91 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/13147 ,  H01L2224/16054 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1713 ,  H01L2224/18 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48096 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/49112 ,  H01L2224/49173 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/18165 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A semiconductor device includes a first semiconductor chip having a pad electrode formed on an upper surface thereof; a resin section sealing the first semiconductor chip with the upper surface and a side surface of the first semiconductor chip being covered and a lower surface of the first semiconductor chip being exposed; a columnar electrode communicating between the upper surface and the lower surface of the resin section with the upper surface and the lower surface of the columnar electrode being exposed on the resin section and at least a part of the side surface of the columnar electrode being covered; and a bonding wire connecting the pad electrode and the columnar electrode with a part of the bonding wire being embedded in the columnar electrode as one end of the bonding wire being exposed on the lower surface of the columnar electrode and the remaining part of the bonding wire being covered with the resin section, and a method for manufacturing the same.

摘要翻译： 半导体器件包括：第一半导体芯片，其具有形成在其上表面上的焊盘电极; 将所述第一半导体芯片与所述第一半导体芯片的上表面和所述第一半导体芯片的侧面进行封装而使所述第一半导体芯片的下表面露出的树脂部， 柱状电极在树脂部分的上表面和下表面之间连通，柱状电极的上表面和下表面暴露在树脂部分上，并且柱状电极的侧表面的至少一部分被覆盖; 以及连接焊盘电极和柱状电极的接合线，一部分接合线被埋入柱状电极中，一方的接合线的一端露出在柱状电极的下表面上，接合线的其余部分 被树脂部覆盖的方法及其制造方法。

公开(公告)号：US20160233184A1

公开(公告)日：2016-08-11

申请号：US15024552

申请日：2014-09-19

申请人： NITTO DENKO CORPORATION

发明人： Hiroyuki Hanazono ,  Naohide Takamoto ,  Akihiro Fukui

IPC分类号： H01L23/00

CPC分类号： H01L24/11 ,  H01L21/48 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6836 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/11019 ,  H01L2224/11502 ,  H01L2224/11515 ,  H01L2224/1155 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/16227 ,  H01L2224/27003 ,  H01L2224/27334 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29311 ,  H01L2224/29318 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29371 ,  H01L2224/29387 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/83365 ,  H01L2224/83385 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/27 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/81 ,  H01L2224/83

摘要： A method for manufacturing a semiconductor includes: a Step A of preparing a chip with sheet-shaped resin composition in which a sheet-shaped resin composition is pasted onto a semiconductor chip, a Step B of preparing an adherend, a Step C of pasting the chip with sheet-shaped resin composition onto the adherend so that the sheet-shaped resin composition serves as a pasting surface, a Step D of heating the sheet-shaped resin composition to semi-cure the sheet-shaped resin composition after the Step C, and a Step E of heating the sheet-shaped resin composition at a higher temperature than in the Step D to cure the sheet-shaped resin composition after the Step D.

摘要翻译： 半导体的制造方法包括：将片状树脂组合物贴合在半导体芯片上的片状树脂组合物的制备工序A，制造被粘物的工序B，粘贴 将片状树脂组合物与片状树脂组合物贴合在被粘物上，使得片状树脂组合物作为糊状表面，在步骤C之后加热片状树脂组合物以使片状树脂组合物半固化的步骤D， 以及步骤E，其在比步骤D更高的温度下加热片状树脂组合物，以在步骤D之后固化片状树脂组合物。

公开(公告)号：US09379081B2

公开(公告)日：2016-06-28

申请号：US14223157

申请日：2014-03-24

申请人： King Dragon International Inc.

发明人： Wen Kun Yang ,  Yu-Hsiang Yang

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L23/538 ,  H01L23/544 ,  H01L21/268 ,  H01L21/304 ,  H01L21/768

CPC分类号： H01L24/32 ,  H01L21/268 ,  H01L21/304 ,  H01L21/76802 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5384 ,  H01L23/544 ,  H01L24/09 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L25/105 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/0231 ,  H01L2224/02372 ,  H01L2224/03015 ,  H01L2224/0401 ,  H01L2224/0918 ,  H01L2224/13101 ,  H01L2224/13144 ,  H01L2224/16113 ,  H01L2224/16221 ,  H01L2224/16225 ,  H01L2224/32221 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/8113 ,  H01L2224/81201 ,  H01L2224/81815 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2924/01014 ,  H01L2924/12 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/1461 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014

摘要： The invention proposes a semiconductor device package structure, comprising a substrate, an adhesive layer and a die. The substrate has electrical through-holes to inter-connect a first and second wiring circuit on a top surface and a bottom surface of the substrate respectively, wherein a contact conductive bump is formed on the first wiring circuit. The under-fill adhesive layer is formed on the top surface and the first wiring circuit of the substrate except the area of the die. The die has a bump structure on the bonding pads of the die, wherein the bump structure of the die is electrically connected to the contact conductive bump of the first wiring circuit of the substrate.

摘要翻译： 本发明提出了一种半导体器件封装结构，包括衬底，粘合剂层和管芯。 所述基板具有电气通孔，以分别在所述基板的顶表面和底表面上分别连接第一和第二布线电路，其中在所述第一布线电路上形成接触导电凸块。 底部填充粘合剂层形成在除了模具的区域之外的基板的顶表面和第一布线电路上。 所述管芯在所述管芯的接合焊盘上具有凸起结构，其中所述管芯的所述突起结构电连接到所述衬底的第一布线电路的接触导电凸块。