公开(公告)号：US20240128225A1

公开(公告)日：2024-04-18

申请号：US18380222

申请日：2023-10-16

申请人： Samsung Electronics Co., Ltd.

发明人： Hajung Lee

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L25/065 ,  H10B80/00

CPC分类号： H01L24/29 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0657 ,  H10B80/00 ,  H01L2224/16148 ,  H01L2224/29078 ,  H01L2224/29387 ,  H01L2224/29999 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/1434

摘要： A semiconductor package is provided. The semiconductor package includes a first semiconductor chip, a plurality of second semiconductor chips sequentially stacked on the first semiconductor chip, a front connection pad disposed on a lower surface of the plurality of second semiconductor chips, a rear connection pad attached on an upper surface of the first semiconductor chip and the second semiconductor chips, a chip connection terminal disposed between the front connection pad and the rear connection pad, and an insulating adhesive layer disposed between the first semiconductor chip and a lowermost second semiconductor chip and between two adjacent second semiconductor chips, the insulating adhesive layer including a first material layer covering a sidewall of the chip connection terminal and having first viscosity and a second material layer disposed to surround the first material layer in a plan view and have second viscosity which is greater than the first viscosity.

公开(公告)号：US11735547B2

公开(公告)日：2023-08-22

申请号：US17569918

申请日：2022-01-06

申请人： VueReal Inc.

发明人： Gholamreza Chaji ,  Ehsanollah Fathi

IPC分类号： H01L21/687 ,  H01L23/00 ,  H01L25/00 ,  G01R31/26 ,  H01L21/683 ,  H01L21/66 ,  H05K13/04

CPC分类号： H01L24/08 ,  H01L21/68714 ,  H01L24/29 ,  H01L24/83 ,  H01L24/95 ,  H01L24/97 ,  G01R31/2635 ,  H01L21/6831 ,  H01L21/6835 ,  H01L22/14 ,  H01L22/20 ,  H01L24/27 ,  H01L24/32 ,  H01L24/75 ,  H01L25/50 ,  H01L2221/68322 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/08238 ,  H01L2224/27002 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/29006 ,  H01L2224/29011 ,  H01L2224/29019 ,  H01L2224/2919 ,  H01L2224/29026 ,  H01L2224/29078 ,  H01L2224/32237 ,  H01L2224/7598 ,  H01L2224/75252 ,  H01L2224/75253 ,  H01L2224/83005 ,  H01L2224/8314 ,  H01L2224/8316 ,  H01L2224/8318 ,  H01L2224/83121 ,  H01L2224/83141 ,  H01L2224/83143 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83234 ,  H01L2224/83238 ,  H01L2224/83862 ,  H01L2224/83902 ,  H01L2224/95 ,  H01L2224/95001 ,  H01L2224/97 ,  H05K13/0411

摘要： A method of selectively transferring micro devices from a donor substrate to contact pads on a receiver substrate. Micro devices being attached to a donor substrate with a donor force. The donor substrate and receiver substrate are aligned and brought together so that selected micro devices meet corresponding contact pads. A receiver force is generated to hold selected micro devices to the contact pads on the receiver substrate. The donor force is weakened and the substrates are moved apart leaving selected micro devices on the receiver substrate. Several methods of generating the receiver force are disclosed, including adhesive, mechanical and electrostatic techniques.

公开(公告)号：US11728302B2

公开(公告)日：2023-08-15

申请号：US16931132

申请日：2020-07-16

申请人： VueReal Inc.

发明人： Gholamreza Chaji ,  Ehsanollah Fathi

IPC分类号： H01L21/687 ,  H01L23/00 ,  H01L25/00 ,  G01R31/26 ,  H01L21/683 ,  H01L21/66 ,  H05K13/04

CPC分类号： H01L24/08 ,  H01L21/68714 ,  H01L24/29 ,  H01L24/83 ,  H01L24/95 ,  H01L24/97 ,  G01R31/2635 ,  H01L21/6831 ,  H01L21/6835 ,  H01L22/14 ,  H01L22/20 ,  H01L24/27 ,  H01L24/32 ,  H01L24/75 ,  H01L25/50 ,  H01L2221/68322 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/08238 ,  H01L2224/27002 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/29006 ,  H01L2224/29011 ,  H01L2224/29019 ,  H01L2224/2919 ,  H01L2224/29026 ,  H01L2224/29078 ,  H01L2224/32237 ,  H01L2224/7598 ,  H01L2224/75252 ,  H01L2224/75253 ,  H01L2224/83005 ,  H01L2224/8314 ,  H01L2224/8316 ,  H01L2224/8318 ,  H01L2224/83121 ,  H01L2224/83141 ,  H01L2224/83143 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83234 ,  H01L2224/83238 ,  H01L2224/83862 ,  H01L2224/83902 ,  H01L2224/95 ,  H01L2224/95001 ,  H01L2224/97 ,  H05K13/0411

摘要： A method of selectively transferring micro devices from a donor substrate to contact pads on a receiver substrate. Micro devices being attached to a donor substrate with a donor force. The donor substrate and receiver substrate are aligned and brought together so that selected micro devices meet corresponding contact pads. A receiver force is generated to hold selected micro devices to the contact pads on the receiver substrate. The donor force is weakened and the substrates are moved apart leaving selected micro devices on the receiver substrate. Several methods of generating the receiver force are disclosed, including adhesive, mechanical and electrostatic techniques.

公开(公告)号：US09871012B2

公开(公告)日：2018-01-16

申请号：US13802759

申请日：2013-03-14

申请人： QUALCOMM Incorporated

发明人： Vaishnav Srinivas ,  Bernie Jord Yang ,  Michael Brunolli ,  David Ian West ,  Charles David Paynter

IPC分类号： H01L23/00 ,  H01L21/66 ,  H01L21/56

CPC分类号： H01L24/17 ,  H01L21/563 ,  H01L22/32 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/0556 ,  H01L2224/05569 ,  H01L2224/11462 ,  H01L2224/13028 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/14165 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/27462 ,  H01L2224/29028 ,  H01L2224/29078 ,  H01L2224/29147 ,  H01L2224/3012 ,  H01L2224/3213 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/07802 ,  H01L2924/381 ,  H01L2924/0105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552

摘要： Various aspects of an approach for routing die signals in an interior portion of a die using external interconnects are described herein. The approach provides for contacts coupled to circuits in the interior portion of the die, where the contacts are exposed to an exterior portion of the die. The external interconnects are configured to couple these contacts so that signals from the circuits in the interior portion of the die may be routed externally to the die. In various aspects of the disclosed approach, the external interconnects are protected by a packaging for the die.

公开(公告)号：US20170317051A1

公开(公告)日：2017-11-02

申请号：US15581010

申请日：2017-04-28

申请人： DANFOSS SILICON POWER GMBH

发明人： Martin Becker ,  Ronald Eisele ,  Frank Osterwald ,  Jacek Rudzki ,  Holger Ulrich

IPC分类号： H01L23/00 ,  B23K20/02 ,  B23K101/40

CPC分类号： H01L24/83 ,  B23K20/023 ,  B23K2101/40 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/29019 ,  H01L2224/29078 ,  H01L2224/29082 ,  H01L2224/3201 ,  H01L2224/32505 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/8384 ,  H01L2924/00012

摘要： A method for cohesively connecting a first component of a power semiconductor module to a second component of a power semiconductor module by sintering, the method comprising the steps of: applying a layer of unsintered sinter material to a predetermined bonding surface of the first component, arranging the second component on the surface layer of unsintered sinter material, attaching the second component to the first component by applying pressure and/or temperature on a locally delimited partial area within the predetermined bonding surface, processing the first and/or second component and/or other components of the power semiconductor module, and complete-area sintering of the sinter material.

公开(公告)号：US20170117262A1

公开(公告)日：2017-04-27

申请号：US15127055

申请日：2015-02-10

申请人： SONY CORPORATION

发明人： JUN SUZUKI

IPC分类号： H01L25/16 ,  G09G3/20 ,  H01L21/48 ,  H01L25/18 ,  H01L23/00

CPC分类号： H01L25/167 ,  G09G3/2003 ,  G09G2320/064 ,  G09G2320/0666 ,  H01L21/4846 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/95 ,  H01L25/0753 ,  H01L25/18 ,  H01L2224/29078 ,  H01L2224/2919 ,  H01L2224/32059 ,  H01L2224/8322 ,  H01L2224/83951

摘要： Void formation in a semiconductor device is to be prevented. The semiconductor device includes a semiconductor element, signal lines, and a protective layer. In the semiconductor device, the semiconductor element is mounted on a substrate. The signal lines in the semiconductor device are connected to the semiconductor element on the substrate. Further, the protective layer in the semiconductor device is provided in an inter-line region interposed between both edges of two adjacent signal lines among the signal lines on the substrate.

公开(公告)号：US09589874B2

公开(公告)日：2017-03-07

申请号：US14857041

申请日：2015-09-17

申请人： STMicroelectronics (Crolles 2) SAS ,  SOCPRA Sciences et Génie S.E.C.

发明人： Louis-Michel Collin ,  Luc Guy Frechette ,  Sandrine Lhostis

IPC分类号： H01L23/48 ,  H01L23/495 ,  H01L21/311 ,  H01L21/48 ,  H01L21/52 ,  H01L21/54 ,  H01L21/56 ,  H01L23/31 ,  H01L23/42 ,  H01L23/492 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/473

CPC分类号： H01L23/42 ,  H01L21/31116 ,  H01L21/481 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/4875 ,  H01L21/4878 ,  H01L21/52 ,  H01L21/54 ,  H01L21/56 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/315 ,  H01L23/3157 ,  H01L23/3672 ,  H01L23/473 ,  H01L23/492 ,  H01L23/4952 ,  H01L23/49568 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13015 ,  H01L2224/13024 ,  H01L2224/13078 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/136 ,  H01L2224/14051 ,  H01L2224/14151 ,  H01L2224/14152 ,  H01L2224/14154 ,  H01L2224/14177 ,  H01L2224/14517 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/27462 ,  H01L2224/29012 ,  H01L2224/29013 ,  H01L2224/29015 ,  H01L2224/29078 ,  H01L2224/29147 ,  H01L2224/30151 ,  H01L2224/30152 ,  H01L2224/32058 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2924/37002 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/1415

摘要： An assembly is made of an integrated circuit chip and a plate. At least one channel is arranged between the chip and the plate. The channel is delimited by metal sidewalls at least partially extending from one surface of the chip to an opposite surface of the plate. The assembly is encapsulated in a body that includes an opening extending to reach the channel. The plate may be one of an interposer, an integrated circuit chip, a support of surface-mount type, or a metal plate.

摘要翻译： 组件由集成电路芯片和板制成。 在芯片和板之间布置至少一个通道。 通道由金属侧壁限定，金属侧壁至少部分地从芯片的一个表面延伸到板的相对表面。 组件被封装在包括延伸到达通道的开口的主体中。 该板可以是插入件，集成电路芯片，表面安装型支架或金属板之一。

公开(公告)号：US09543197B2

公开(公告)日：2017-01-10

申请号：US13719836

申请日：2012-12-19

申请人： INTEL CORPORATION

发明人： Chuan Hu ,  Dingying Xu ,  Yoshihiro Tomita

IPC分类号： H01L21/00 ,  H01L21/768 ,  H01L23/00 ,  H01L21/56 ,  H01L23/538 ,  H01L23/31 ,  H01L25/16

CPC分类号： H01L25/50 ,  H01L21/561 ,  H01L21/568 ,  H01L21/76838 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/27002 ,  H01L2224/27003 ,  H01L2224/27334 ,  H01L2224/2784 ,  H01L2224/29078 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/00014 ,  H01L2224/27 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/00

摘要： Embodiments of the present disclosure are directed to techniques and configurations for an integrated circuit (IC) package having one or more dies connected to an integrated circuit substrate by an interface layer. In one embodiment, the interface layer may include an anisotropic portion configured to conduct electrical signals in the out-of-plane direction between one or more components, such as a die and an integrated circuit substrate. In another embodiment, the interface layer may be a dielectric or electrically insulating layer. In yet another embodiment, the interface layer may include an anisotropic portion that serves as an interconnect between two components, a dielectric or insulating portion, and one or more interconnect structures that are surrounded by the dielectric or insulating portion and serve as interconnects between the same or other components. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例涉及具有通过界面层连接到集成电路基板的一个或多个管芯的集成电路（IC）封装的技术和配置。 在一个实施例中，界面层可以包括各向异性部分，其被配置为在诸如管芯和集成电路基板的一个或多个部件之间的面外方向上传导电信号。 在另一个实施例中，界面层可以是介电层或电绝缘层。 在另一个实施例中，界面层可以包括用作两个部件之间的互连的各向异性部分，电介质或绝缘部分，以及由电介质或绝缘部分包围并用作相互之间的互连的一个或多个互连结构 或其他组件。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20160250710A1

公开(公告)日：2016-09-01

申请号：US15006658

申请日：2016-01-26

申请人： Northrop Grumman Systems Corporation ,  The Board of Trustees of the Leland Stanford Junior University

发明人： John A. Starkovich ,  Edward M. Silverman ,  Jesse B. Tice ,  Hsiao-Hu Peng ,  Michael T. Barako ,  Kenneth E. Goodson

IPC分类号： B23K20/02 ,  C25D7/06 ,  B23K1/00 ,  C25D3/48 ,  C25D5/48 ,  C25D5/02 ,  C25D9/02 ,  C25D3/30

CPC分类号： F28F3/022 ,  B23K1/0012 ,  B23K20/023 ,  B23K2101/14 ,  B23P15/26 ,  B82Y30/00 ,  C25D3/30 ,  C25D3/48 ,  C25D5/02 ,  C25D5/48 ,  C25D7/0607 ,  C25D9/02 ,  F28F2255/20 ,  H01L23/373 ,  H01L23/3736 ,  H01L23/3737 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/27462 ,  H01L2224/27466 ,  H01L2224/29078 ,  H01L2224/29211 ,  H01L2224/29244 ,  H01L2224/83203 ,  H01L2224/83232 ,  H01L2224/83238

摘要： A thermally-conductive and mechanically-robust bonding method for attaching a metal nanowire (MNW) array to an adjacent surface includes the steps of: removing a template membrane from the MNW; infiltrating the MNW with a bonding material; placing the bonding material on the adjacent surface; bringing an adjacent surface into contact with a top surface of the MNW while the bonding material is bondable; and allowing the bonding material to cool and form a solid bond between the MNW and the adjacent surface. A thermally-conductive and mechanically-robust bonding method for attaching a metal nanowire (MNW) array to an adjacent surface includes the steps of: choosing a bonding material based on a desired bonding process; and without removing the MNW from a template membrane that fills an interstitial volume of the MNW, depositing the bonding material onto a tip of the MNW.

摘要翻译： 用于将金属纳米线（MNW）阵列附着到相邻表面的导热和机械坚固的接合方法包括以下步骤：从MNW去除模板膜; 用粘接材料渗透MNW; 将接合材料放置在相邻表面上; 使相邻表面与MNW的顶表面接触，同时粘合材料是可结合的; 并且允许接合材料冷却并在MNW和相邻表面之间形成固体结合。 用于将金属纳米线（MNW）阵列附着到相邻表面的导热和机械稳定的接合方法包括以下步骤：基于期望的接合工艺选择接合材料; 并且不从填充MNW的间隙体积的模板膜移除MNW，将粘合材料沉积到MNW的尖端上。

公开(公告)号：US20160225701A1

公开(公告)日：2016-08-04

申请号：US15010988

申请日：2016-01-29

申请人： J-DEVICES CORPORATION

发明人： Yoshihiro TANAKA

IPC分类号： H01L23/495

CPC分类号： H01L23/49513 ,  H01L23/49582 ,  H01L23/49861 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L25/50 ,  H01L2224/26175 ,  H01L2224/29011 ,  H01L2224/29014 ,  H01L2224/29015 ,  H01L2224/29078 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83048 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/83439 ,  H01L2224/83815 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2924/00

摘要： A semiconductor device according to one embodiment of the present invention includes a semiconductor element, an island having a surface on which the semiconductor element is fixed using a first metal, and a first pattern formed by a second metal, the first pattern being arranged on one part of the surface, wherein the second metal has a greater wetting characteristic than the surface when the first metal is melted.

摘要翻译： 根据本发明的一个实施例的半导体器件包括半导体元件，具有使用第一金属固定半导体元件的表面的岛和由第二金属形成的第一图案，第一图案被布置在一个上 表面的一部分，其中当第一金属熔化时，第二金属具有比表面更大的润湿特性。