公开(公告)号：US20240332274A1

公开(公告)日：2024-10-03

申请号：US18740417

申请日：2024-06-11

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Tsung-Yueh TSAI ,  Meng-Jen WANG ,  Yu-Fang TSAI ,  Meng-Jung CHUANG

IPC分类号： H01L25/16 ,  H01L21/48 ,  H01L21/52 ,  H01L23/31 ,  H01L23/538

CPC分类号： H01L25/167 ,  H01L21/4817 ,  H01L21/52 ,  H01L23/3128 ,  H01L23/5386 ,  H01L23/5389 ,  H01L25/165

摘要： An optical device package comprises a carrier having a first surface and a second surface recessed with respect to the first surface and a lid disposed on the second surface of the carrier.

公开(公告)号：US12107024B2

公开(公告)日：2024-10-01

申请号：US17682603

申请日：2022-02-28

申请人： Mitsubishi Electric Corporation

发明人： Takayuki Onaka ,  Yuki Yano

IPC分类号： H01L23/10 ,  H01L21/52 ,  H01L23/053

CPC分类号： H01L23/10 ,  H01L21/52 ,  H01L23/053

摘要： An object is to provide a technique that can suppress wet-spreading of an adhesive used to bond a case and a metal base to each other and secure the height position of the adhesive required to fill a gap created between the case and the metal base. A semiconductor device includes a metal base, an insulating substrate arranged on the metal base, a semiconductor element mounted on the insulating substrate, and a case bonded on the metal base so as to surround side surfaces of the insulating substrate and the semiconductor element, in which a pair of metal oxide films having a protruding shape is provided on a peripheral edge portion of the metal base, and the case is bonded to the metal base by an adhesive arranged in a region between the metal oxide films in the pair.

公开(公告)号：US20240321700A1

公开(公告)日：2024-09-26

申请号：US18612492

申请日：2024-03-21

申请人： Samsung Electronics Co., Ltd.

发明人： Daeyeun Choi ,  Taeho Ko ,  Unbyoung Kang ,  Seokbong Park

IPC分类号： H01L23/498 ,  H01L21/52 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10 ,  H10B80/00

CPC分类号： H01L23/49811 ,  H01L21/52 ,  H01L21/56 ,  H01L23/3107 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/81 ,  H01L25/105 ,  H10B80/00 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/2101 ,  H01L2224/22 ,  H01L2224/81

摘要： A semiconductor package includes an upper redistribution structure, a first substrate, a first semiconductor chip, a second semiconductor chip, a bridge chip, and a first insulating layer. The upper redistribution structure includes an upper redistribution insulating layer and upper redistribution patterns. The first substrate includes an upper surface, a lower surface, a first cavity extending in a vertical direction, and a second cavity provided apart from the first cavity in a horizontal direction and extending in the vertical direction. The first substrate is on an upper surface of the upper redistribution structure. The first semiconductor chip is accommodated in the first cavity and electrically connected to a subset of the upper redistribution patterns. The second semiconductor chip is accommodated in the second cavity and electrically connected to a subset of the upper redistribution patterns. The bridge chip is below the upper redistribution structure. The first insulating layer surrounds the bridge chip.

公开(公告)号：US20240312897A1

公开(公告)日：2024-09-19

申请号：US18576841

申请日：2022-07-07

申请人： ACT IDENTITY TECHNOLOGY LIMITED

发明人： Gang Chen

IPC分类号： H01L23/498 ,  H01L21/52

CPC分类号： H01L23/49855 ,  H01L21/52 ,  H01L23/49822 ,  H01L23/4985 ,  H01L23/49894

摘要： A chip module (40a, 40b, 62) is disclosed as including an integrated-circuit (IC) chip (34, 64), a first flexible substrate layer (18) with a number of holes (28), a second adhesive substrate layer (16) with a number of holes (26), and a third substrate layer (14) made of an electrically conductive material, the second substrate layer being sandwiched between and fixedly engaged with the first and third substrate layers, the holes of the first substrate layer and the holes of the second substrate layer being aligned with each other to form a number of cavities (12, 66) each receiving at least a part of the IC chip.

公开(公告)号：US20240304567A1

公开(公告)日：2024-09-12

申请号：US18538889

申请日：2023-12-13

申请人： Mitsubishi Electric Corporation

发明人： Aya MUTO ,  Fumihito KAWAHARA

IPC分类号： H01L23/00 ,  H01L21/52 ,  H01L21/56 ,  H01L23/053 ,  H01L23/16 ,  H01L23/31

CPC分类号： H01L23/562 ,  H01L21/52 ,  H01L21/56 ,  H01L23/053 ,  H01L23/16 ,  H01L23/3121 ,  H01L24/48 ,  H01L24/83 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48137 ,  H01L2224/48225 ,  H01L2224/73265 ,  H01L2224/83801

摘要： A semiconductor device includes a semiconductor element, a case, a beam, and a sealing insulating material. The semiconductor element is mounted on a base plate. The case has a frame shape in plan view. The case is attached to the base plate. The case houses the semiconductor element inside the frame shape. The beam has a flat plate shape. The beam is held by the case. The beam is held over an internal space that is a space inside the frame shape of the case. The sealing insulating material fills the internal space of the case and covers at least a part of the beam. The beam is provided above the semiconductor element and covers the semiconductor element in plan view.

公开(公告)号：US20240253978A1

公开(公告)日：2024-08-01

申请号：US18565918

申请日：2022-06-22

申请人： KYOCERA Corporation

发明人： Koutarou NAKAMOTO

IPC分类号： B81C1/00 ,  B81B7/00 ,  H01L21/52 ,  H01L21/56

CPC分类号： B81C1/00269 ,  H01L21/52 ,  H01L21/561 ,  B81B7/0061 ,  B81B2201/0257 ,  B81C2203/0109

摘要： The present disclosure provides a wiring board assembly, a lid assembly, and a package set including the wiring board assembly and the lid assembly, which do not require singulation by cutting an electronic component after sealing. The wiring board assembly includes a frame body, a sheet closing the frame body, and a plurality of wiring boards adhered to one surface of the sheet.

公开(公告)号：US12046548B2

公开(公告)日：2024-07-23

申请号：US18307091

申请日：2023-04-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shin-Puu Jeng ,  Po-Hao Tsai ,  Po-Yao Chuang ,  Feng-Cheng Hsu ,  Shuo-Mao Chen ,  Techi Wong

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L21/52 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/053 ,  H01L25/00 ,  H01L25/10 ,  H01L23/31

CPC分类号： H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/52 ,  H01L21/563 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/053 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/27 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/96 ,  H01L25/105 ,  H01L25/50 ,  H01L21/561 ,  H01L23/3128 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68368 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/15311 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2224/97 ,  H01L2224/83

摘要： A chip package is provided. The chip package includes a substrate structure. The substrate structure includes a redistribution structure having a conductive pad. The substrate structure includes a first insulating layer under the redistribution structure. The substrate structure includes a conductive via structure passing through the first insulating layer. The conductive via structure is under and electrically connected with the conductive pad. The substrate structure includes a second insulating layer disposed between the redistribution structure and the first insulating layer. The chip package includes a first chip over the redistribution structure and electrically connected to the conductive via structure through the redistribution structure. The chip package includes a second chip under the substrate structure.

公开(公告)号：US20240203809A1

公开(公告)日：2024-06-20

申请号：US18085173

申请日：2022-12-20

申请人： EAGLE TECHNOLOGY. LLC

发明人： Louis R. PARADISO ,  Douglas R. HEILMAN

IPC分类号： H01L23/31 ,  H01L21/52 ,  H01L21/56 ,  H01L23/00 ,  H01L23/053 ,  H01L23/20

CPC分类号： H01L23/3121 ,  H01L21/52 ,  H01L21/56 ,  H01L23/053 ,  H01L23/20 ,  H01L24/48 ,  H01L23/10

摘要： An electronic device may include a dielectric substrate and bond wire pads on an upper surface thereof. The electronic device may also include a radio frequency (RF) integrated circuit (IC) mounted to the upper surface of the dielectric substrate and bond wires coupling the RF IC to respective bond wire pads. The electronic device may also include a rigid dielectric lid mounted to the upper surface of the dielectric substrate to define an air cavity above the RF IC and the bond wires, and a thermosetting polymer layer over the rigid dielectric lid.

公开(公告)号：US12009276B2

公开(公告)日：2024-06-11

申请号：US17407224

申请日：2021-08-20

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Yu-Sheng Lin ,  Shu-Shen Yeh ,  Chin-Hua Wang ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC分类号： H01L23/053 ,  H01L21/52 ,  H01L23/367 ,  H01L23/373 ,  H01L23/427 ,  H01L23/498 ,  H01L25/065 ,  H01L25/18

CPC分类号： H01L23/3672 ,  H01L21/52 ,  H01L23/053 ,  H01L23/3736 ,  H01L23/427 ,  H01L23/49833 ,  H01L25/18

摘要： A semiconductor package including a lid having one or more heat pipes located on and/or within the lid to provide improved thermal management. A lid for a semiconductor package having one or more heat pipes thermally integrated with the lid may provide more uniform heat loss from the semiconductor package, reduce the risk of damage to the package due to excessive heat accumulation, and may enable the lid to be fabricated using less expensive materials, thereby reducing the costs of a semiconductor package.

公开(公告)号：US20240186195A1

公开(公告)日：2024-06-06

申请号：US18529064

申请日：2023-12-05

申请人： STMicroelectronics International N.V.

发明人： Laurent HERARD ,  Olivier ZANELLATO ,  Patrick LAURENT

IPC分类号： H01L23/10 ,  H01L21/48 ,  H01L21/52 ,  H01L23/00 ,  H01L23/053 ,  H01L23/498

CPC分类号： H01L23/10 ,  H01L21/4846 ,  H01L21/52 ,  H01L23/053 ,  H01L23/49816 ,  H01L24/97 ,  H01L2224/97

摘要： An integrated circuit package includes a support substrate having a mounting face and a lateral wall having an inner face and an outer face. The inner face delimits with the mounting face a cavity. The outer face includes a step extending outwardly of the package. An electronic chip disposed in the cavity and electrically connected to electrically-conductive contact pads. A sealing structure is bonded by a glue to an upper face of the lateral wall to seal the cavity. The glue does not spill out over the outer face of the lateral wall. Electrically-conductive connection elements are located over a lower face of the support substrate and electrically cooperate with the contact pads through an interconnection network located in the support substrate.