公开(公告)号：US20240186195A1

公开(公告)日：2024-06-06

申请号：US18529064

申请日：2023-12-05

申请人： STMicroelectronics International N.V.

发明人： Laurent HERARD ,  Olivier ZANELLATO ,  Patrick LAURENT

IPC分类号： H01L23/10 ,  H01L21/48 ,  H01L21/52 ,  H01L23/00 ,  H01L23/053 ,  H01L23/498

CPC分类号： H01L23/10 ,  H01L21/4846 ,  H01L21/52 ,  H01L23/053 ,  H01L23/49816 ,  H01L24/97 ,  H01L2224/97

摘要： An integrated circuit package includes a support substrate having a mounting face and a lateral wall having an inner face and an outer face. The inner face delimits with the mounting face a cavity. The outer face includes a step extending outwardly of the package. An electronic chip disposed in the cavity and electrically connected to electrically-conductive contact pads. A sealing structure is bonded by a glue to an upper face of the lateral wall to seal the cavity. The glue does not spill out over the outer face of the lateral wall. Electrically-conductive connection elements are located over a lower face of the support substrate and electrically cooperate with the contact pads through an interconnection network located in the support substrate.