公开(公告)号：US12218023B2

公开(公告)日：2025-02-04

申请号：US18515264

申请日：2023-11-21

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Sheng Lin ,  Chin-Hua Wang ,  Shu-Shen Yeh ,  Chien-Hung Chen ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00 ,  H01L25/18

Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface. The second semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the second semiconductor device has a second bottom surface, a second top surface and a second side surface connecting with the second bottom surface and the second top surface, the second side surface faces toward to the first side surface, the second side surface comprises a third sub-surface and a fourth sub-surface connected with each other, the third sub-surface is connected with the second bottom surface, and a second obtuse angle is between the third sub-surface and the fourth sub-surface. The underfill layer is between the first semiconductor device and the second semiconductor device, between the first semiconductor device and the redistribution structure, and between the second semiconductor device and the redistribution structure. The encapsulant encapsulates the first semiconductor device, the second semiconductor device and the underfill layer.

公开(公告)号：US12191294B2

公开(公告)日：2025-01-07

申请号：US18334390

申请日：2023-06-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Po-Yao Lin ,  Shu-Shen Yeh ,  Chin-Hua Wang ,  Yu-Sheng Lin ,  Shin-Puu Jeng

IPC: H01L25/18 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L25/00

Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first tier, a second tier, and a third tier. The first tier includes an interposer. The second tier is disposed on the first tier and includes a bottom die. The third tier is disposed on the second tier and includes a plurality of first dies and at least one second die. The at least one second die is disposed between the plurality of first dies. The plurality of first dies are electrically connected to the bottom die by a plurality of first connectors to form a signal path, the plurality of first dies are electrically connected to the interposer by a plurality of second connectors to form a power path, and the plurality of first connectors are closer to the at least one second die than the plurality of second connectors.

公开(公告)号：US12176258B2

公开(公告)日：2024-12-24

申请号：US18347588

申请日：2023-07-06

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Feng-Cheng Hsu ,  Shin-Puu Jeng

IPC: H01L23/31 ,  H01L21/56 ,  H01L21/683 ,  H01L23/48 ,  H01L25/00 ,  H01L25/065 ,  H01L25/10 ,  H01L21/768 ,  H01L23/29

Abstract: A semiconductor package including an insulating encapsulation, an integrated circuit component, and conductive elements is provided. The integrated circuit component is encapsulated in the insulating encapsulation, wherein the integrated circuit component has at least one through silicon via protruding from the integrated circuit component. The conductive elements are located on the insulating encapsulation, wherein one of the conductive elements is connected to the at least one through silicon via, and the integrated circuit component is electrically connected to the one of the conductive elements through the at least one through silicon via.

公开(公告)号：US20240387335A1

公开(公告)日：2024-11-21

申请号：US18788134

申请日：2024-07-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Li-Ling Liao ,  Ming-Chih Yew ,  Che-Chia Yang ,  Po-Chen Lai ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package includes a redistribution structure, a first conductive pillar and a second conductive pillar, and a semiconductor device. The redistribution structure has a first surface and a second surface opposite to the first surface. The first conductive pillar and the second conductive pillar are disposed on the first surface of the redistribution structure and electrically connected with the redistribution structure, wherein a maximum lateral dimension of the first conductive pillar is greater than a maximum lateral dimension of the second conductive pillar, and a topography variation of a top surface of the first conductive pillar is greater than a topography variation of a top surface of the second conductive pillar. The semiconductor device is disposed over the first surface of the redistribution structure, wherein the semiconductor device comprises a third conductive pillar and a fourth conductive pillar, the third conductive pillar is bonded to first conductive pillar through a first joint structure, and the fourth conductive pillar is bonded to second conductive pillar through a second joint structure.

公开(公告)号：US20240363517A1

公开(公告)日：2024-10-31

申请号：US18766556

申请日：2024-07-08

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Sheng Lin ,  Han-Hsiang Huang ,  Chien-Sheng Chen ,  Shu-Shen Yeh ,  Shin-Puu Jeng

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/562 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2221/68372 ,  H01L2224/16227 ,  H01L2924/18161 ,  H01L2924/3511

Abstract: A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures. The semiconductor package is disposed on the circuit substrate, wherein the semiconductor package includes a center region and side regions surrounding the center region. The first bump structures are disposed on the center region of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate. The second bump structures are disposed on the side regions of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate, wherein the first bump structures and the second bump structures have different heights and different shapes.

公开(公告)号：US20240312887A1

公开(公告)日：2024-09-19

申请号：US18674891

申请日：2024-05-26

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Kuei Hsu ,  Ming-Chih Yew ,  Shu-Shen Yeh ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49822 ,  H01L21/4857 ,  H01L21/563 ,  H01L23/3157 ,  H01L24/16 ,  H01L2224/16227

Abstract: A manufacturing method of a semiconductor package includes the following steps. A redistribution structure is formed. An encapsulated semiconductor device is provided on a first side of the redistribution structure, wherein the encapsulated semiconductor device comprising a semiconductor device encapsulated by an encapsulating material. A substrate is bonded to a second side of the redistribution structure opposite to the first side. The redistribution structure includes a plurality of vias connected to one another through a plurality of conductive lines and a redistribution line connected to the plurality of vias, and, from a top view, an angle greater than zero is included between adjacent two of the plurality of conductive lines.

公开(公告)号：US12087705B2

公开(公告)日：2024-09-10

申请号：US18305018

申请日：2023-04-21

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Sheng Lin ,  Chien-Hung Chen ,  Po-Chen Lai ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/00 ,  H01L25/00 ,  H01L25/18

CPC classification number: H01L23/562 ,  H01L25/18 ,  H01L25/50

Abstract: A package structure is provided. The package structure includes a substrate and a chip-containing structure bonded to the substrate. The package structure also includes a warpage-control element attached to the substrate. The warpage-control element has a protruding portion extending into the substrate.

公开(公告)号：US11984381B2

公开(公告)日：2024-05-14

申请号：US17527831

申请日：2021-11-16

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Po-Chen Lai ,  Ming-Chih Yew ,  Po-Yao Lin ,  Chin-Hua Wang ,  Shin-Puu Jeng

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/498 ,  H01L25/065 ,  H01L23/00 ,  H01L23/42 ,  H01L23/433

CPC classification number: H01L23/3675 ,  H01L21/4817 ,  H01L23/49833 ,  H01L25/0655 ,  H01L23/42 ,  H01L23/433 ,  H01L23/49816 ,  H01L24/73 ,  H01L2924/1611 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/3511 ,  H01L2924/35121

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a carrier substrate, an interposer substrate, a semiconductor device, a lid, and a thermal interface material. The interposer substrate is disposed on the carrier substrate. The semiconductor device is disposed on the interposer substrate. The lid is disposed on the carrier substrate to cover the semiconductor device. The thermal interface material is disposed between the lid and the semiconductor device. A first recess is formed on a lower surface of the lid facing the semiconductor device, and the first recess overlaps the semiconductor device in a top view.

公开(公告)号：US20240088063A1

公开(公告)日：2024-03-14

申请号：US18518466

申请日：2023-11-23

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chin-Hua Wang ,  Shu-Shen Yeh ,  Yu-Sheng Lin ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/00 ,  H01L23/367 ,  H01L23/498

CPC classification number: H01L23/562 ,  H01L23/3677 ,  H01L23/49816

Abstract: A semiconductor package provided herein includes a wiring substrate, a semiconductor component, conductor terminals, a bottom stiffener and a top stiffener. The wiring substrate has a first surface and a second surface opposite to the first surface. The semiconductor component is disposed on the first surface of the wiring substrate. The conductor terminals are disposed on the second surface of the wiring substrate and electrically connected to the semiconductor component through the wiring substrate. The bottom stiffener is disposed on the second surface of the wiring substrate and positioned between the conductor terminals. The top stiffener is disposed on the first surface of the wiring substrate. The top stiffener is laterally spaced further away from the semiconductor component than the bottom stiffener.

公开(公告)号：US11894320B2

公开(公告)日：2024-02-06

申请号：US17460668

申请日：2021-08-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Shu-Shen Yeh ,  Chin-Hua Wang ,  Po-Chen Lai ,  Po-Yao Lin ,  Shin-Puu Jeng

IPC: H01L23/00 ,  H01L21/52 ,  H01L23/16 ,  H01L23/053

CPC classification number: H01L23/562 ,  H01L21/52 ,  H01L23/053 ,  H01L23/16

Abstract: A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a substrate, a semiconductor device, a ring structure, a lid structure, and an adhesive member. The semiconductor device is disposed over the substrate. The ring structure is disposed over the substrate and surrounds the semiconductor device. The lid structure is disposed over the ring structure and extends across the semiconductor device. The adhesive member is disposed in a gap between the ring structure and the semiconductor device and attached to the lid structure and the substrate.