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公开(公告)号：US20240258193A1
公开(公告)日：2024-08-01
申请号：US18631181
申请日：2024-04-10
发明人： Po-Chen LAI , Ming-Chih YEW , Po-Yao LIN , Chin-Hua WANG , Shin-Puu JENG
IPC分类号： H01L23/367 , H01L21/48 , H01L23/00 , H01L23/42 , H01L23/433 , H01L23/498 , H01L25/065
CPC分类号： H01L23/3675 , H01L21/4817 , H01L23/49833 , H01L25/0655 , H01L23/42 , H01L23/433 , H01L23/49816 , H01L24/73 , H01L2924/1611 , H01L2924/16152 , H01L2924/16251 , H01L2924/3511 , H01L2924/35121
摘要： A method of forming a semiconductor package structure is provided. The method includes disposing a first semiconductor device on an interposer substrate, disposing the interposer substrate on a carrier substrate, applying a thermal interface material on the first semiconductor device, and attaching a lid on the carrier substrate to cover the first semiconductor device. The interposer substrate is disposed between the carrier substrate and the first semiconductor device. The lid includes a lower surface having a first recess facing the first semiconductor device, and a portion of the thermal interface material is accommodated in the first recess.
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公开(公告)号：US20240170366A1
公开(公告)日：2024-05-23
申请号：US18512640
申请日：2023-11-17
发明人： Jonggyu Lee , Youngsuk Nam , Seokkan Ki , Jaechoon Kim , Taehwan Kim
IPC分类号： H01L23/427 , H01L23/00 , H01L23/538 , H01L25/065
CPC分类号： H01L23/4275 , H01L23/5383 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/0655 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2225/065 , H01L2924/1611 , H01L2924/186 , H01L2924/20102
摘要： Provided is a semiconductor package including a circuit board, a semiconductor chip on the circuit board, a heat dissipation member adjacent to the semiconductor chip, and a heat transmission member between the semiconductor chip and the heat dissipation member, the heat transmission member including a resin insulating body and phase change metal particles connected to each other in the resin insulating body, wherein the phase change metal particles connect the semiconductor chip and the heat dissipation member, the phase change metal particles being configured to transmit heat generated by the semiconductor chip to the heat dissipation member.
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公开(公告)号：US20240186213A1
公开(公告)日：2024-06-06
申请号：US18076245
申请日：2022-12-06
发明人： Jae Jin REE , Sang Hyeon LEE , Yi Seul HAN , Geon Du GIM , Hun Jung LIM
IPC分类号： H01L23/367 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/373 , H01L25/16
CPC分类号： H01L23/3675 , H01L21/4882 , H01L21/563 , H01L23/3135 , H01L23/3735 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/165 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2924/1611 , H01L2924/1616 , H01L2924/1619 , H01L2924/16235 , H01L2924/16251 , H01L2924/16315
摘要： In one example, an electronic device includes a substrate and a cover structure. The cover structure includes an upper cover wall comprising an upper wall outer surface and an upper wall inner surface opposite to the upper wall outer surface, cover sidewalls extending from the upper wall inner surface and coupled to the substrate. The upper cover wall and the cover sidewalls define a cavity. A channel structure is in the upper cover wall extending inward from the upper wall inner surface. A first electronic component is coupled to the substrate within the cavity and a thermal interface material (TIM) is coupled to the upper wall inner surface and the first electronic component. A portion of the TIM is within the channel structure. Other examples and related methods are also disclosed herein.
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公开(公告)号：US20240128148A1
公开(公告)日：2024-04-18
申请号：US18151222
申请日：2023-01-06
发明人： Chang-Jung Hsueh , Po-Yao Lin , Hui-Min Huang , Ming-Da Cheng , Kathy Yan
IPC分类号： H01L23/367 , H01L21/48 , H01L23/00 , H10B80/00
CPC分类号： H01L23/3675 , H01L21/4882 , H01L24/16 , H01L24/32 , H01L24/73 , H10B80/00 , H01L2224/16227 , H01L2224/16238 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2924/1011 , H01L2924/1431 , H01L2924/1434 , H01L2924/1611 , H01L2924/1616 , H01L2924/16235 , H01L2924/16251 , H01L2924/1631 , H01L2924/16315 , H01L2924/1632
摘要： A method includes attaching a package component to a package substrate, the package component includes: an interposer disposed over the package substrate; a first die disposed along the interposer; and a second die disposed along the interposer, the second die being laterally adjacent the first die; attaching a first thermal interface material to the first die, the first thermal interface material being composed of a first material; attaching a second thermal interface material to the second die, the second thermal interface material being composed of a second material different from the first material; and attaching a lid assembly to the package substrate, the lid assembly being further attached to the first thermal interface material and the second thermal interface material.
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公开(公告)号：US20230395461A1
公开(公告)日：2023-12-07
申请号：US17833208
申请日：2022-06-06
发明人： Wen-Yi Lin , Kuang-Chun Lee , Chien-Chen Li , Chien-Li Kuo , Kuo-Chio Liu
IPC分类号： H01L23/427 , H01L25/065 , H01L21/48 , H01L23/498
CPC分类号： H01L23/4275 , H01L25/0655 , H01L21/4882 , H01L23/49833 , H01L2924/35121 , H01L2924/3511 , H01L2924/1611 , H01L2924/1616 , H01L2924/16235 , H01L2924/16251 , H01L2924/1632 , H01L2924/1659 , H01L2924/165 , H01L24/73
摘要： Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes a package component with one or more integrated circuits adhered to a package substrate, a hybrid thermal interface material utilizing a combination of polymer based material with high elongation values and metal based material with high thermal conductivity values. The polymer based thermal interface material placed on the edge of the package component contains the metal based thermal interface material in liquid form.
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公开(公告)号：US20230378007A1
公开(公告)日：2023-11-23
申请号：US17750428
申请日：2022-05-23
发明人： Yu-Sheng Lin , Shu-Shen Yeh , Chien-Shen Chen , Po-Yao Lin , Shin-Puu Jeng , Ming-Chih Yew , Chin-Hua Wang , Po-Chen Lai , Chia-Kuei Hsu
IPC分类号： H01L23/055 , H01L25/065 , H01L23/10 , H01L21/48
CPC分类号： H01L23/055 , H01L25/0655 , H01L23/10 , H01L21/4871 , H01L2924/35121 , H01L2924/1611 , H01L2924/16153 , H01L2924/16251 , H01L2924/1632 , H01L2924/1631 , H01L2924/1811 , H01L2924/182 , H01L24/73
摘要： A package assembly includes a package substrate, an interposer module on the package substrate, and a package lid on the interposer module and attached to the package substrate. The package lid includes an outer lid including an outer lid material and including an outer lid plate portion. The package lid further includes an inner lid including an inner lid material different than the outer lid material and including an inner lid plate portion attached to a bottom surface of the outer lid plate portion.
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公开(公告)号：US20230154822A1
公开(公告)日：2023-05-18
申请号：US17922944
申请日：2020-05-20
发明人： Yusuke Araki , Hideaki Matsuzaki , Yuta Shiratori
IPC分类号： H01L23/367 , H01L23/31 , H01L25/065 , H01L23/00 , H01L21/56 , H01L21/48 , H01L23/538
CPC分类号： H01L23/3675 , H01L23/3107 , H01L25/0655 , H01L24/73 , H01L24/16 , H01L24/24 , H01L21/565 , H01L21/568 , H01L21/4882 , H01L23/5386 , H01L2224/16225 , H01L2224/73209 , H01L2224/24226 , H01L2924/182 , H01L2924/186 , H01L2924/1611 , H01L2924/16195 , H01L2924/16235 , H01L2924/16251 , H01L2924/1011
摘要： A semiconductor device includes a first heat sink formed in contact with a back surface of a first semiconductor chip, and a second heat sink formed in contact with a back surface of a second semiconductor chip. The first heat sink is made of a material with larger thermal conductivity than that of the first semiconductor chip and has a heat dissipation surface exposed from the mold resin layer to the outside. The second heat sink is made of a material with larger thermal conductivity than that of the second semiconductor chip and has a heat dissipation surface exposed from the mold resin layer to the outside.
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公开(公告)号：US20230395450A1
公开(公告)日：2023-12-07
申请号：US17829534
申请日：2022-06-01
发明人： Jing-Ye Juang , Hsien-Wei Chen , Chia-Ling Lu , Shin-Puu Jeng
IPC分类号： H01L23/31 , H01L21/56 , H01L21/48 , H01L23/498 , H01L25/065 , H01L23/00
CPC分类号： H01L23/3135 , H01L21/565 , H01L21/4817 , H01L23/49833 , H01L25/0655 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2924/1437 , H01L2924/1431 , H01L2924/3511 , H01L2924/35121 , H01L2924/1611 , H01L2924/16195 , H01L2924/1616 , H01L2924/16235 , H01L2924/16251 , H01L2924/16747 , H01L2924/16724 , H01L2924/16787 , H01L23/49811 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L2924/182 , H01L25/0657 , H01L2225/06513 , H01L2225/06524 , H01L2224/16227 , H01L2224/16238 , H01L2224/32225 , H01L2224/73204
摘要： A disclosed semiconductor structure may include an interposer, a first semiconductor die electrically coupled to the interposer, a packaging substrate electrically coupled to the interposer, and a capping layer covering one or more of a first surface of the first semiconductor die and a second surface of the packaging substrate. The capping layer may be formed over respective surfaces of each of the first semiconductor die and the packaging substrate. In certain embodiments, the capping layer may be formed only on the first surface of the first semiconductor die and not formed over the package substrate. In further embodiments, the semiconductor structure may include a second semiconductor die, such that the capping layer covers a surface of only one of the first semiconductor die and the second semiconductor die. The semiconductor structure may include a molding compound die frame that is partially or completely covered by the capping layer.
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公开(公告)号：US20230378024A1
公开(公告)日：2023-11-23
申请号：US17663793
申请日：2022-05-17
发明人： Yu-Sheng LIN , Chien Hung CHEN , Po-Chen LAI , Chin-Hua WANG , Shin-Puu JENG
IPC分类号： H01L23/467 , H01L25/065 , H01L21/48
CPC分类号： H01L23/467 , H01L25/0655 , H01L21/4882 , H01L2924/37001 , H01L2924/3511 , H01L2924/3512 , H01L2924/1611 , H01L2924/16251 , H01L2924/1632 , H01L2924/1676 , H01L2924/16747 , H01L2924/1659 , H01L23/49833
摘要： A ring structure on a package substrate is divided into at least four different components, including a plurality of first pieces and a plurality of second pieces. By dividing the ring structure into at least four different components, the ring structure reduces flexibility of the package substrate, which thus reduces stress on a molding compound (e.g., in a range from approximately 1% to approximately 10%). As a result, molding cracking is reduced, which reduces defect rates and increases yield. Accordingly, raw materials, power, and processing resources are conserved that would otherwise be consumed with manufacturing additional packages when defect rates are higher.
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公开(公告)号：US20230299028A1
公开(公告)日：2023-09-21
申请号：US17695815
申请日：2022-03-15
发明人： WEN-CHUAN TAI , FAN HU , HSIANG-FU CHEN , LI-CHUN PENG
IPC分类号： H01L23/00
CPC分类号： H01L24/08 , H01L24/80 , H01L24/09 , H01L2224/80805 , H01L2224/80895 , H01L2224/8083 , H01L2224/80203 , H01L2224/0801 , H01L2224/08059 , H01L2224/08221 , H01L2224/0903 , H01L2224/09055 , H01L2924/1611 , H01L2924/1631 , H01L2924/16315 , H01L2924/1632 , H01L2924/1616 , H01L2924/16235 , H01L2224/08053
摘要： A bonding method and a bonding structure are provided. A device substrate is provided including a plurality of semiconductor devices, wherein each of the semiconductor devices includes a first bonding layer. A cap substrate is provided including a plurality of cap structures, wherein each of the cap structures includes a second bonding layer, the second bonding layer having a planar surface and a first protrusion protruding from the planar surface. The device substrate is bonded to the cap substrate by engaging the first protrusion of the second bonding layer of each of the cap structures with the corresponding first bonding layer of each of the semiconductor devices in the device substrate.
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