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公开(公告)号:US20240363474A1
公开(公告)日:2024-10-31
申请号:US18765021
申请日:2024-07-05
发明人: Yu-Sheng LIN , Po-Yao LIN , Shu-Shen YEH , Chin-Hua WANG , Shin-Puu JENG
IPC分类号: H01L23/367 , H01L21/48 , H01L23/31 , H01L23/373
CPC分类号: H01L23/3677 , H01L21/4882 , H01L23/31 , H01L23/373
摘要: A method for forming a semiconductor die package is provided. The method includes bonding a first semiconductor die and a second semiconductor die to a package substrate; disposing a lid structure over the package substrate and over the first and second semiconductor dies, wherein the lid structure has a first opening exposing the second semiconductor die; attaching the lid structure to the first semiconductor die using a first thermal interface material (TIM) layer; disposing a heat sink over the lid structure, wherein the heat sink has a first portion located over the lid structure, and a second portion extending into the first opening of the lid structure; and attaching the second portion of the heat sink to the second semiconductor die using a second TIM layer, wherein the first TIM layer has a thermal conductivity higher than a thermal conductivity of the second TIM layer.
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公开(公告)号:US20240332214A1
公开(公告)日:2024-10-03
申请号:US18738188
申请日:2024-06-10
发明人: Po-Chen LAI , Ming-Chih YEW , Po-Yao LIN , Yu-Sheng LIN , Shin-Puu JENG
IPC分类号: H01L23/00 , H01L21/56 , H01L23/31 , H01L25/065
CPC分类号: H01L23/562 , H01L21/563 , H01L23/3185 , H01L24/73 , H01L25/0655 , H01L2224/73204
摘要: A package structure and a formation method of a package structure are provided. The package structure includes a circuit substrate and a die package bonded to the circuit substrate through bonding structures. The package structure also includes a reinforcing structure over the circuit substrate. The reinforcing structure partially surrounds a corner of the die package. The package structure further includes an underfill structure surrounding the bonding structure. The underfill structure wraps around an end of the reinforcing structure. In a top view of the package structure, the reinforcing structure has an outer corner, and the underfill structure is spaced apart from the outer corner of the reinforcing structure.
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公开(公告)号:US20230395443A1
公开(公告)日:2023-12-07
申请号:US17805566
申请日:2022-06-06
发明人: Po-Chen LAI , Ming-Chih YEW , Li-Ling LIAO , Yu-Sheng LIN , Shin-Puu JENG
CPC分类号: H01L23/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/16 , H01L25/105 , H01L23/49816 , H01L23/49833 , H01L23/49838 , H01L21/4846 , H01L2924/3511 , H01L2924/37001 , H01L2924/1436 , H01L2924/1431 , H01L2225/1041 , H01L2225/107 , H01L2224/73204 , H01L2224/32225 , H01L2224/16227 , H01L2224/16238 , H01L2924/15153
摘要: A semiconductor package, which may correspond to a high-performance computing package, includes an interposer, a substrate, and an integrated circuit device between the interposer and the substrate. The integrated circuit device, which may correspond to an integrated passive device, is attached to the interposer within a cavity of the interposer. Attaching the integrated circuit device within the cavity of the interposer creates a clearance between the integrated circuit device and the substrate. In this way, a likelihood of the integrated circuit device contacting the substrate during a bending and/or a deformation of the semiconductor package is reduced. By reducing the likelihood of such contact, damage to the integrated circuit device and/or the substrate may be avoided to increase a reliability and/or yield of the semiconductor package.
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公开(公告)号:US20240312798A1
公开(公告)日:2024-09-19
申请号:US18675560
申请日:2024-05-28
发明人: Yu-Sheng LIN , Shu-Shen YEH , Chin-Hua WANG , Po-Yao LIN , Shin-Puu JENG
IPC分类号: H01L21/56 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/58 , H01L25/065
CPC分类号: H01L21/563 , H01L21/565 , H01L23/3142 , H01L23/49838 , H01L23/585 , H01L24/05 , H01L24/97 , H01L25/0657 , H01L2224/04105
摘要: A semiconductor die package is provided, including a package substrate, and two semiconductor dies disposed over the package substrate and arranged in a first direction. A ring structure is disposed over the package substrate and surrounds the semiconductor dies. The ring structure includes a first part having a first height and a second part recessed from the bottom surface and having a second height lower than the first height. The first part includes multiple higher parts arranged side by side in at least some of side areas of the ring structure, and the second part includes multiple lower parts between the higher parts. The lower parts include multiple first lower parts arranged in multiple corner areas of the ring structure and multiple second lower parts arranged in opposite side areas of the ring structure extending in the first direction.
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公开(公告)号:US20230378024A1
公开(公告)日:2023-11-23
申请号:US17663793
申请日:2022-05-17
发明人: Yu-Sheng LIN , Chien Hung CHEN , Po-Chen LAI , Chin-Hua WANG , Shin-Puu JENG
IPC分类号: H01L23/467 , H01L25/065 , H01L21/48
CPC分类号: H01L23/467 , H01L25/0655 , H01L21/4882 , H01L2924/37001 , H01L2924/3511 , H01L2924/3512 , H01L2924/1611 , H01L2924/16251 , H01L2924/1632 , H01L2924/1676 , H01L2924/16747 , H01L2924/1659 , H01L23/49833
摘要: A ring structure on a package substrate is divided into at least four different components, including a plurality of first pieces and a plurality of second pieces. By dividing the ring structure into at least four different components, the ring structure reduces flexibility of the package substrate, which thus reduces stress on a molding compound (e.g., in a range from approximately 1% to approximately 10%). As a result, molding cracking is reduced, which reduces defect rates and increases yield. Accordingly, raw materials, power, and processing resources are conserved that would otherwise be consumed with manufacturing additional packages when defect rates are higher.
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公开(公告)号:US20230066752A1
公开(公告)日:2023-03-02
申请号:US17462505
申请日:2021-08-31
发明人: Yu-Sheng LIN , Shu-Shen YEH , Chin-Hua WANG , Po-Yao LIN , Shin-Puu JENG
IPC分类号: H01L21/56 , H01L23/31 , H01L23/58 , H01L23/498 , H01L23/00 , H01L25/065
摘要: A semiconductor die package and a method of forming the same are provided. The semiconductor die package includes a package substrate, an interposer substrate over the package substrate, two semiconductor dies over the interposer substrate, and an underfill element formed over the interposer substrate and surrounding the semiconductor dies. A ring structure is disposed over the package substrate and surrounds the semiconductor dies. Recessed parts are recessed from the bottom surface of the ring structure. The recessed parts include multiple first recessed parts arranged in each corner area of the ring structure and two second recessed parts arranged in opposite side areas of the ring structure and aligned with a portion of the underfill element between the semiconductor dies. An adhesive layer is interposed between the bottom surface of the ring structure and the package substrate.
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公开(公告)号:US20220367311A1
公开(公告)日:2022-11-17
申请号:US17319707
申请日:2021-05-13
发明人: Shu-Shen YEH , Po-Yao LIN , Chin-Hua WANG , Yu-Sheng LIN , Shin-Puu JENG
IPC分类号: H01L23/367 , H01L25/065 , H01L23/00 , H01L23/498 , H01L23/31 , H01L21/48
摘要: A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.
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公开(公告)号:US20220270893A1
公开(公告)日:2022-08-25
申请号:US17184787
申请日:2021-02-25
发明人: Yu-Sheng LIN , Po-Yao LIN , Shu-Shen YEH , Chin-Hua WANG , Shin-Puu JENG
IPC分类号: H01L21/48 , H01L23/00 , H01L23/367
摘要: A method for forming a chip package structure is provided. The method includes disposing a chip package over a wiring substrate. The method includes forming a first heat conductive structure and a second heat conductive structure over the chip package. The first heat conductive structure and the second heat conductive structure are separated by a first gap. The method includes bonding a heat dissipation lid to the chip package through the first heat conductive structure and the second heat conductive structure. The first heat conductive structure and the second heat conductive structure extend toward each other until the first heat conductive structure contacts the second heat conductive structure during bonding the heat dissipation lid to the chip package.
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公开(公告)号:US20240347410A1
公开(公告)日:2024-10-17
申请号:US18751724
申请日:2024-06-24
发明人: Shu-Shen YEH , Che-Chia YANG , Yu-Sheng LIN , Chin-Hua WANG , Po-Yao LIN , Shin-Puu JENG
IPC分类号: H01L23/367 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/04 , H01L25/00 , H01L25/065 , H01L25/18
CPC分类号: H01L23/3675 , H01L21/4882 , H01L25/0655 , H01L25/18 , H01L25/50 , H01L21/56 , H01L23/04 , H01L24/32 , H01L24/33 , H01L24/73 , H01L2224/32245 , H01L2224/33181 , H01L2224/73204 , H01L2224/73253
摘要: A chip package structure is provided. The chip package structure includes a wiring substrate. The chip package structure includes a first chip structure over the wiring substrate. The chip package structure includes a heat-spreading lid over the wiring substrate and covering the first chip structure. The heat-spreading lid includes a ring structure and a top plate, the ring structure surrounds the first chip structure, the top plate covers the ring structure and the first chip structure, and the first chip structure has a first sidewall and a second sidewall opposite to the first sidewall.
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公开(公告)号:US20230100127A1
公开(公告)日:2023-03-30
申请号:US18061501
申请日:2022-12-05
发明人: Yu-Sheng LIN , Po-Yao LIN , Shu-Shen YEH , Chin-Hua WANG , Shin-Puu JENG
IPC分类号: H01L23/367 , H01L23/373 , H01L23/31 , H01L21/48
摘要: A semiconductor die package is provided. The semiconductor die package includes a package substrate, and a first semiconductor die and a second semiconductor die disposed thereon. A ring structure is attached to the package substrate and surrounds the semiconductor dies. A lid structure is attached to the ring structure and disposed over the semiconductor dies, and has an opening exposing the second semiconductor die. A heat sink is disposed over the lid structure and has a portion extending into the opening of the lid structure. A first thermal interface material (TIM) layer is interposed between the lid structure and the first semiconductor die. A second TIM layer is interposed between the extending portion of the heat sink and the second semiconductor die. The first TIM layer has a thermal conductivity higher than the thermal conductivity of the second TIM layer.
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