-
公开(公告)号：US20240334608A1
公开(公告)日：2024-10-03
申请号：US18740889
申请日：2024-06-12
发明人： Chia-Kuei HSU , Ming-Chih YEW , Po-Chen LAI , Po-Yao LIN , Shin-Puu JENG
IPC分类号： H05K1/18 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/538 , H01L25/065 , H05K3/28 , H05K3/34
CPC分类号： H05K1/181 , H01L25/0655 , H05K3/284 , H01L23/3185 , H01L23/49811 , H01L23/5383 , H01L24/73 , H01L24/92 , H01L24/97 , H01L2224/73204 , H01L2224/92125 , H01L2224/95001 , H05K3/3436 , H05K2201/10378 , H05K2201/10727 , H05K2201/10734 , H05K2201/10977 , H05K2203/107
摘要： A method for forming a semiconductor package is provided. The method includes mounting a semiconductor device on a surface of a package substrate. The method also includes forming an underfill element between the semiconductor device and the surface of the package substrate. The underfill element includes a fillet portion that extends laterally beyond the periphery of the semiconductor device and is formed along the periphery of the semiconductor device. The method also includes forming one or more grooves in the fillet portion.
-
公开(公告)号：US20240096822A1
公开(公告)日：2024-03-21
申请号：US18520971
申请日：2023-11-28
发明人： Chia-Kuei HSU , Ming-Chih YEW , Shu-Shen YEH , Che-Chia YANG , Po-Yao LIN , Shin-Puu JENG
IPC分类号： H01L23/00 , H01L21/48 , H01L21/56 , H01L21/683 , H01L23/31 , H01L23/538 , H01L25/065
CPC分类号： H01L23/562 , H01L21/4853 , H01L21/4857 , H01L21/563 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/3135 , H01L23/5383 , H01L23/5386 , H01L24/16 , H01L25/0655 , H01L2221/68372 , H01L2224/16227 , H01L2924/18161 , H01L2924/3512
摘要： A package structure is provided. The package structure includes a first conductive pad in a first insulating layer, a conductive via in a second insulating layer directly under the first conductive pad, and a first under bump metallurgy structure directly under the first conductive via. In a first horizontal direction, the conductive via is narrower than the first under bump metallurgy structure, and the first under bump metallurgy structure is narrower than the first conductive pad.
-
公开(公告)号：US20230395520A1
公开(公告)日：2023-12-07
申请号：US17833820
申请日：2022-06-06
发明人： Li-Ling LIAO , Ming-Chih YEW , Chia-Kuei HSU , Shin-Puu JENG
IPC分类号： H01L23/538 , H01L23/31 , H01L23/00 , H01L21/683 , H01L21/48 , H01L21/56
CPC分类号： H01L23/5389 , H01L23/3128 , H01L23/5383 , H01L23/5386 , H01L24/20 , H01L24/19 , H01L2924/35121 , H01L21/4853 , H01L21/4857 , H01L21/565 , H01L2221/68359 , H01L2224/214 , H01L21/6835
摘要： A package structure includes an interposer, a die, a conductive terminal and an interconnection structure that is disposed on a first side of the interposer. The die is electrically bonded to the interposer and disposed over the interconnection structure. The conductive terminal is connected to the interposer and the die via a conductive bump. In order to effectively avoid cold joint issues, round or rectangular polyimide structures are first disposed under the bumps to structurally support the bump and sufficiently increase bump height for improved electrical connection and long term reliability of the package structure.
-
公开(公告)号：US20230326879A1
公开(公告)日：2023-10-12
申请号：US18328913
申请日：2023-06-05
发明人： Po-Chen LAI , Chin-Hua WANG , Ming-Chih YEW , Li-Ling LIAO , Tsung-Yen LEE , Po-Yao LIN , Shin-Puu JENG
IPC分类号： H01L23/00 , H01L23/31 , H01L23/538 , H01L21/683 , H01L21/48 , H01L21/56 , H01L23/16
CPC分类号： H01L23/562 , H01L23/3128 , H01L23/3135 , H01L23/5383 , H01L23/5386 , H01L24/08 , H01L21/6835 , H01L21/4853 , H01L21/4857 , H01L21/563 , H01L21/565 , H01L21/568 , H01L23/16 , H01L2221/68372 , H01L2224/16227 , H01L2924/18161 , H01L2924/3512
摘要： A package structure is provided. The package structure includes a semiconductor die bonding on a first surface of a redistribution structure through first bonding elements, and a wall structure bonding on the first surface of the redistribution structure through second bonding elements. The wall structure includes a plurality of partitions laterally arranged in a discontinuous ring, and the semiconductor die is located within the discontinuous ring. The package structure also includes a substrate on a second surface of the redistribution structure through third bonding elements and in electrical connection with the semiconductor die
-
公开(公告)号：US20220406729A1
公开(公告)日：2022-12-22
申请号：US17350293
申请日：2021-06-17
发明人： Po-Chen LAI , Chin-Hua WANG , Ming-Chih YEW , Li-Ling LIAO , Tsung-Yen LEE , Po-Yao LIN , Shin-Puu JENG
IPC分类号： H01L23/00 , H01L23/16 , H01L23/31 , H01L23/538 , H01L21/683 , H01L21/48 , H01L21/56
摘要： A package structure is provided. The package structure includes a redistribution structure and a first semiconductor die over the redistribution structure. The package structure also includes a wall structure laterally surrounding the first semiconductor die and the wall structure includes a plurality of partitions separated from one another. The package structure also includes an underfill material between the wall structure and the first semiconductor die. The package structure also includes a molding compound encapsulating the wall structure and the underfill material.
-
公开(公告)号：US20240088095A1
公开(公告)日：2024-03-14
申请号：US18518794
申请日：2023-11-24
发明人： Chin-Hua WANG , Shin-Puu JENG , Po-Yao LIN , Po-Chen LAI , Shu-Shen YEH , Ming-Chih YEW , Yu-Sheng LIN
IPC分类号： H01L25/065 , H01L21/304 , H01L23/31 , H01L25/00 , H01L25/18
CPC分类号： H01L25/0655 , H01L21/3043 , H01L23/3185 , H01L23/3192 , H01L25/18 , H01L25/50 , H01L24/16 , H01L2224/13082 , H01L2224/73204
摘要： A method for forming a chip package structure. The method includes bonding first connectors over a front surface of a semiconductor wafer. The method also includes dicing the semiconductor wafer from a rear surface of the semiconductor wafer to form semiconductor dies and mounting first and second semiconductor dies in the semiconductor dies over a top surface of the interposer substrate. The method further forming an encapsulating layer over the top surface of the interposer substrate to cover the first semiconductor die and the second semiconductor die. A first sidewall of the first semiconductor die faces a second sidewall of the second semiconductor die, and upper portions of the first sidewall and the second sidewall have a tapered contour, to define a top die-to-die distance and a bottom die-to-die distance that is less than the top die-to-die distance.
-
公开(公告)号：US20230064277A1
公开(公告)日：2023-03-02
申请号：US17461391
申请日：2021-08-30
发明人： Po-Chen LAI , Ming-Chih YEW , Po-Yao LIN , Yu-Sheng LIN , Shin-Puu JENG
IPC分类号： H01L23/00 , H01L23/31 , H01L25/065 , H01L21/56
摘要： A package structure and a formation method of a package structure are provided. The package structure includes a circuit substrate and a die package bonded to the circuit substrate through bonding structures. The package structure also includes a reinforcing structure over the circuit substrate. The reinforcing structure partially surrounds a corner of the die package. The package structure further includes an underfill structure surrounding the bonding structure. The underfill structure is in direct contact with the reinforcing structure.
-
公开(公告)号：US20230060756A1
公开(公告)日：2023-03-02
申请号：US17462458
申请日：2021-08-31
发明人： Po-Chen LAI , Ming-Chih YEW , Po-Yao LIN , Chin-Hua WANG , Shin-Puu JENG
IPC分类号： H01L23/31 , H01L25/065 , H01L23/00 , H01L23/498 , H01L21/56 , H01L23/29 , H01L23/14
摘要： Structures and formation methods of a chip package structure are provided. The chip package structure includes an interposer substrate including first and second die regions that are separated by a gap region. The chip package structure also includes first and second semiconductor dies respectively arranged over the first and second die regions. In addition, the chip package structure includes first and second gap-filling layers formed over the gap region and separated from one another, and a third gap-filling layer over the gap region and between the first and second gap-filling layers. The Young's modulus of the third gap-filling layer is less than the Young's modulus of the first gap-filling layer and the Young's modulus of the second gap-filling layer.
-
公开(公告)号：US20230017688A1
公开(公告)日：2023-01-19
申请号：US17377583
申请日：2021-07-16
发明人： Po-Chen LAI , Chin-Hua WANG , Ming-Chih YEW , Chia-Kuei HSU , Li-Ling LIAO , Po-Yao LIN , Shin-Puu JENG
IPC分类号： H01L23/00 , H01L23/538 , H01L21/48 , H01L25/065 , H01L25/00
摘要： A method for forming a chip package structure is provided. The method includes forming a dielectric layer over a redistribution structure. The redistribution structure includes a dielectric structure and a plurality of wiring layers in or over the dielectric structure. The method includes forming a first conductive bump structure and a shield bump structure over the dielectric layer. The first conductive bump structure is electrically connected to the wiring layers, and the shield bump structure is electrically insulated from the wiring layers. The method includes bonding a first chip structure to the redistribution structure through the first conductive bump structure. The first chip structure is electrically insulated from the shield bump structure, and the first chip structure extends across a first sidewall of the shield bump structure.
-
公开(公告)号：US20220406752A1
公开(公告)日：2022-12-22
申请号：US17350371
申请日：2021-06-17
发明人： Chin-Hua WANG , Shin-Puu JENG , Po-Yao LIN , Po-Chen LAI , Shu-Shen YEH , Ming-Chih YEW , Yu-Sheng LIN
IPC分类号： H01L25/065 , H01L25/18 , H01L23/31 , H01L21/304 , H01L25/00
摘要： Structures and formation methods of a chip package structure are provided. The chip package structure includes adjacent first and second semiconductor dies bonded over an interposer substrate. The chip package structure also includes an insulating layer formed over the interposer substrate. The insulating layer has a first portion surrounding the first and second semiconductor dies and a second portion extending between a first sidewall of the first semiconductor die and a second sidewall of the second semiconductor die, and between the interposer substrate and the first and second semiconductor dies. The lateral distance from the top end of the first sidewall to the top end of the second sidewall is greater than the lateral distance from the bottom end of the first sidewall to the bottom end of the second sidewall.
-
-
-
-
-
-
-
-
-
搜索结果
34 条记录 (耗时 0.02 秒)
