公开(公告)号：US11823887B2

公开(公告)日：2023-11-21

申请号：US17376186

申请日：2021-07-15

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Sheng Lin ,  Han-Hsiang Huang ,  Chien-Sheng Chen ,  Shu-Shen Yeh ,  Shin-Puu Jeng

IPC: H01L21/48 ,  H01L23/498 ,  H01L21/56 ,  H01L21/683 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/562 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2221/68372 ,  H01L2224/16227 ,  H01L2924/18161 ,  H01L2924/3511

Abstract: A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures. The semiconductor package is disposed on the circuit substrate, wherein the semiconductor package includes a center region and side regions surrounding the center region. The first bump structures are disposed on the center region of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate. The second bump structures are disposed on the side regions of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate, wherein the first bump structures and the second bump structures have different heights and different shapes.

公开(公告)号：US20220302011A1

公开(公告)日：2022-09-22

申请号：US17376186

申请日：2021-07-15

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Sheng Lin ,  Han-Hsiang Huang ,  Chien-Sheng Chen ,  Shu-Shen Yeh ,  Shin-Puu Jeng

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L21/683

Abstract: A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures. The semiconductor package is disposed on the circuit substrate, wherein the semiconductor package includes a center region and side regions surrounding the center region. The first bump structures are disposed on the center region of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate. The second bump structures are disposed on the side regions of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate, wherein the first bump structures and the second bump structures have different heights and different shapes.

公开(公告)号：US20240363517A1

公开(公告)日：2024-10-31

申请号：US18766556

申请日：2024-07-08

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Sheng Lin ,  Han-Hsiang Huang ,  Chien-Sheng Chen ,  Shu-Shen Yeh ,  Shin-Puu Jeng

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/562 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2221/68372 ,  H01L2224/16227 ,  H01L2924/18161 ,  H01L2924/3511

Abstract: A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures. The semiconductor package is disposed on the circuit substrate, wherein the semiconductor package includes a center region and side regions surrounding the center region. The first bump structures are disposed on the center region of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate. The second bump structures are disposed on the side regions of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate, wherein the first bump structures and the second bump structures have different heights and different shapes.

公开(公告)号：US12074101B2

公开(公告)日：2024-08-27

申请号：US18472271

申请日：2023-09-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Sheng Lin ,  Han-Hsiang Huang ,  Chien-Sheng Chen ,  Shu-Shen Yeh ,  Shin-Puu Jeng

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/562 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2221/68372 ,  H01L2224/16227 ,  H01L2924/18161 ,  H01L2924/3511

Abstract: A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures. The semiconductor package is disposed on the circuit substrate, wherein the semiconductor package includes a center region and side regions surrounding the center region. The first bump structures are disposed on the center region of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate. The second bump structures are disposed on the side regions of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate, wherein the first bump structures and the second bump structures have different heights and different shapes.

公开(公告)号：US20240014120A1

公开(公告)日：2024-01-11

申请号：US18472271

申请日：2023-09-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Sheng Lin ,  Han-Hsiang Huang ,  Chien-Sheng Chen ,  Shu-Shen Yeh ,  Shin-Puu Jeng

IPC: H01L23/498 ,  H01L25/065 ,  H01L23/538

CPC classification number: H01L23/49816 ,  H01L25/0655 ,  H01L23/5386 ,  H01L2224/16225 ,  H01L24/16

Abstract: A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures. The semiconductor package is disposed on the circuit substrate, wherein the semiconductor package includes a center region and side regions surrounding the center region. The first bump structures are disposed on the center region of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate. The second bump structures are disposed on the side regions of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate, wherein the first bump structures and the second bump structures have different heights and different shapes.