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公开(公告)号：US20240363517A1
公开(公告)日：2024-10-31
申请号：US18766556
申请日：2024-07-08
IPC分类号： H01L23/498 , H01L21/48 , H01L21/56 , H01L21/683 , H01L23/00 , H01L23/31 , H01L25/00 , H01L25/065
CPC分类号： H01L23/49838 , H01L21/4853 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3128 , H01L23/3135 , H01L23/49811 , H01L23/562 , H01L24/16 , H01L25/0655 , H01L25/50 , H01L2221/68331 , H01L2221/68372 , H01L2224/16227 , H01L2924/18161 , H01L2924/3511
摘要： A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures. The semiconductor package is disposed on the circuit substrate, wherein the semiconductor package includes a center region and side regions surrounding the center region. The first bump structures are disposed on the center region of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate. The second bump structures are disposed on the side regions of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate, wherein the first bump structures and the second bump structures have different heights and different shapes.
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公开(公告)号：US20240312887A1
公开(公告)日：2024-09-19
申请号：US18674891
申请日：2024-05-26
发明人： Chia-Kuei Hsu , Ming-Chih Yew , Shu-Shen Yeh , Po-Yao Lin , Shin-Puu Jeng
IPC分类号： H01L23/498 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31
CPC分类号： H01L23/49822 , H01L21/4857 , H01L21/563 , H01L23/3157 , H01L24/16 , H01L2224/16227
摘要： A manufacturing method of a semiconductor package includes the following steps. A redistribution structure is formed. An encapsulated semiconductor device is provided on a first side of the redistribution structure, wherein the encapsulated semiconductor device comprising a semiconductor device encapsulated by an encapsulating material. A substrate is bonded to a second side of the redistribution structure opposite to the first side. The redistribution structure includes a plurality of vias connected to one another through a plurality of conductive lines and a redistribution line connected to the plurality of vias, and, from a top view, an angle greater than zero is included between adjacent two of the plurality of conductive lines.
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公开(公告)号：US12087705B2
公开(公告)日：2024-09-10
申请号：US18305018
申请日：2023-04-21
发明人： Yu-Sheng Lin , Chien-Hung Chen , Po-Chen Lai , Po-Yao Lin , Shin-Puu Jeng
CPC分类号： H01L23/562 , H01L25/18 , H01L25/50
摘要： A package structure is provided. The package structure includes a substrate and a chip-containing structure bonded to the substrate. The package structure also includes a warpage-control element attached to the substrate. The warpage-control element has a protruding portion extending into the substrate.
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公开(公告)号：US11984381B2
公开(公告)日：2024-05-14
申请号：US17527831
申请日：2021-11-16
发明人： Po-Chen Lai , Ming-Chih Yew , Po-Yao Lin , Chin-Hua Wang , Shin-Puu Jeng
IPC分类号： H01L23/367 , H01L21/48 , H01L23/498 , H01L25/065 , H01L23/00 , H01L23/42 , H01L23/433
CPC分类号： H01L23/3675 , H01L21/4817 , H01L23/49833 , H01L25/0655 , H01L23/42 , H01L23/433 , H01L23/49816 , H01L24/73 , H01L2924/1611 , H01L2924/16152 , H01L2924/16251 , H01L2924/3511 , H01L2924/35121
摘要： A semiconductor package structure is provided. The semiconductor package structure includes a carrier substrate, an interposer substrate, a semiconductor device, a lid, and a thermal interface material. The interposer substrate is disposed on the carrier substrate. The semiconductor device is disposed on the interposer substrate. The lid is disposed on the carrier substrate to cover the semiconductor device. The thermal interface material is disposed between the lid and the semiconductor device. A first recess is formed on a lower surface of the lid facing the semiconductor device, and the first recess overlaps the semiconductor device in a top view.
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公开(公告)号：US20240088063A1
公开(公告)日：2024-03-14
申请号：US18518466
申请日：2023-11-23
发明人： Chin-Hua Wang , Shu-Shen Yeh , Yu-Sheng Lin , Po-Yao Lin , Shin-Puu Jeng
IPC分类号： H01L23/00 , H01L23/367 , H01L23/498
CPC分类号： H01L23/562 , H01L23/3677 , H01L23/49816
摘要： A semiconductor package provided herein includes a wiring substrate, a semiconductor component, conductor terminals, a bottom stiffener and a top stiffener. The wiring substrate has a first surface and a second surface opposite to the first surface. The semiconductor component is disposed on the first surface of the wiring substrate. The conductor terminals are disposed on the second surface of the wiring substrate and electrically connected to the semiconductor component through the wiring substrate. The bottom stiffener is disposed on the second surface of the wiring substrate and positioned between the conductor terminals. The top stiffener is disposed on the first surface of the wiring substrate. The top stiffener is laterally spaced further away from the semiconductor component than the bottom stiffener.
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公开(公告)号：US11894320B2
公开(公告)日：2024-02-06
申请号：US17460668
申请日：2021-08-30
发明人： Shu-Shen Yeh , Chin-Hua Wang , Po-Chen Lai , Po-Yao Lin , Shin-Puu Jeng
IPC分类号： H01L23/00 , H01L21/52 , H01L23/16 , H01L23/053
CPC分类号： H01L23/562 , H01L21/52 , H01L23/053 , H01L23/16
摘要： A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a substrate, a semiconductor device, a ring structure, a lid structure, and an adhesive member. The semiconductor device is disposed over the substrate. The ring structure is disposed over the substrate and surrounds the semiconductor device. The lid structure is disposed over the ring structure and extends across the semiconductor device. The adhesive member is disposed in a gap between the ring structure and the semiconductor device and attached to the lid structure and the substrate.
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公开(公告)号：US20240014180A1
公开(公告)日：2024-01-11
申请号：US18471326
申请日：2023-09-21
发明人： Chia-Kuei Hsu , Feng-Cheng Hsu , Ming-Chih Yew , Po-Yao Lin , Shuo-Mao Chen , Shin-Puu Jeng
IPC分类号： H01L25/065 , H01L21/50 , H01L21/768 , H01L23/31 , H01L23/538 , H01L23/00
CPC分类号： H01L25/0657 , H01L21/50 , H01L21/768 , H01L23/31 , H01L23/5386 , H01L24/14 , H01L2224/0401
摘要： A semiconductor package includes a semiconductor die, a redistribution circuit structure, a supporting structure and a protective layer. The redistribution circuit structure is located on and electrically coupled to the semiconductor die. The supporting structure is located on an outer surface of the redistribution circuit structure, wherein the supporting structure is overlapped with at least a part of the semiconductor die or has a sidewall substantially aligned with a sidewall of the semiconductor die in a vertical projection on the redistribution circuit structure along a stacking direction of the redistribution circuit structure and the supporting structure. The protective layer is located on the supporting structure, wherein the supporting structure is sandwiched between the protective layer and the redistribution circuit structure.
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公开(公告)号：US20230352446A1
公开(公告)日：2023-11-02
申请号：US18347588
申请日：2023-07-06
发明人： Feng-Cheng Hsu , Shin-Puu Jeng
IPC分类号： H01L25/065 , H01L23/31 , H01L25/00 , H01L21/56 , H01L23/48 , H01L21/683 , H01L25/10
CPC分类号： H01L25/0652 , H01L23/3107 , H01L25/50 , H01L21/568 , H01L23/481 , H01L21/6835 , H01L21/56 , H01L23/3128 , H01L21/561 , H01L23/3135 , H01L25/105 , H01L23/293
摘要： A semiconductor package including an insulating encapsulation, an integrated circuit component, and conductive elements is provided. The integrated circuit component is encapsulated in the insulating encapsulation, wherein the integrated circuit component has at least one through silicon via protruding from the integrated circuit component. The conductive elements are located on the insulating encapsulation, wherein one of the conductive elements is connected to the at least one through silicon via, and the integrated circuit component is electrically connected to the one of the conductive elements through the at least one through silicon via.
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公开(公告)号：US20230326917A1
公开(公告)日：2023-10-12
申请号：US18334390
申请日：2023-06-14
发明人： Po-Yao Lin , Shu-Shen Yeh , Chin-Hua Wang , Yu-Sheng Lin , Shin-Puu Jeng
IPC分类号： H01L25/18 , H01L23/498 , H01L25/00 , H01L23/31 , H01L23/48
CPC分类号： H01L25/18 , H01L23/49822 , H01L25/50 , H01L23/3128 , H01L23/481
摘要： Provided are a package structure and a method of forming the same. The package structure includes a first tier, a second tier, and a third tier. The first tier includes an interposer. The second tier is disposed on the first tier and includes a bottom die. The third tier is disposed on the second tier and includes a plurality of first dies and at least one second die. The at least one second die is disposed between the plurality of first dies. The plurality of first dies are electrically connected to the bottom die by a plurality of first connectors to form a signal path, the plurality of first dies are electrically connected to the interposer by a plurality of second connectors to form a power path, and the plurality of first connectors are closer to the at least one second die than the plurality of second connectors.
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公开(公告)号：US11784130B2
公开(公告)日：2023-10-10
申请号：US17459215
申请日：2021-08-27
发明人： Yu-Sheng Lin , Shin-Puu Jeng , Po-Yao Lin , Chin-Hua Wang , Shu-Shen Yeh , Che-Chia Yang
IPC分类号： H01L23/538 , H01L21/48 , H01L21/683 , H01L23/13
CPC分类号： H01L23/5385 , H01L21/4853 , H01L21/4857 , H01L21/6835 , H01L23/13 , H01L23/5383 , H01L23/5386 , H01L2221/68372
摘要： A package structure and a formation method of a package structure are provided. The method includes forming a recess in a circuit substrate, and the recess has a first sidewall and a second sidewall. The second sidewall is between the first sidewall and a bottommost surface of the circuit substrate, and the second sidewall is steeper than the first sidewall. The method also includes forming a die package, and the die package has a semiconductor die. The method further includes bonding the die package to the circuit substrate through bonding structures such that a portion of the semiconductor die enters the recess of the circuit substrate. In addition, the method includes forming an underfill material to surround the bonding structures and to fill the recess.
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