公开(公告)号：US20240297106A1

公开(公告)日：2024-09-05

申请号：US18177953

申请日：2023-03-03

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. SEDDON ,  Francis J. CARNEY

IPC分类号： H01L23/498 ,  H01L21/02 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/48 ,  H01L21/56 ,  H01L21/66 ,  H01L21/67 ,  H01L21/683 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/482 ,  H01L23/495 ,  H01L23/544 ,  H01L25/00 ,  H01L25/065 ,  H01L27/02 ,  H01L27/088 ,  H01L27/14 ,  H01L27/146 ,  H01L29/08 ,  H02M3/158

CPC分类号： H01L23/49827 ,  H01L21/02035 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3083 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/67069 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L22/12 ,  H01L22/26 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/4822 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/544 ,  H01L23/562 ,  H01L24/00 ,  H01L24/05 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/14 ,  H01L27/14683 ,  H01L29/0847 ,  H02M3/158 ,  H01L23/147 ,  H01L23/15 ,  H01L23/3677 ,  H01L23/49816 ,  H01L27/14625 ,  H01L27/14685 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05184 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/3511

摘要： A through-substrate via structure includes a conductive via structure including trench portions at a first major surface of a substrate and extending to a first distance. A first insulating structure is over sidewalls of the trench portions, and a conductive material is over the first insulating structure. A recessed region extends from a second major surface of the substrate to a second distance greater than the first distance and laterally overlaps and interfaces both trench portions. A second insulating structure includes a first portion within the recessed region and a second portion adjacent to the second major surface outside of the recessed region, which includes an outer surface overlapping the second major surface outside of the recessed region. A first conductive region includes a proximate end coupled to the conductive material through openings in the first portion, and an opposite distal that is outward from the second portion.

公开(公告)号：US11973016B2

公开(公告)日：2024-04-30

申请号：US17620472

申请日：2020-04-29

申请人： Infineon Technologies Austria AG

发明人： Elvir Kahrimanovic ,  Gerhard Noebauer ,  Oliver Blank ,  Alessandro Ferrara

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L23/495 ,  H01L29/417 ,  H01L29/43

CPC分类号： H01L23/49844 ,  H01L23/49513 ,  H01L23/49562 ,  H01L24/02 ,  H01L24/05 ,  H01L24/06 ,  H01L29/41741 ,  H01L29/435 ,  H01L23/4952 ,  H01L23/49524 ,  H01L24/29 ,  H01L24/32 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/0239 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05172 ,  H01L2224/05186 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05686 ,  H01L2224/0603 ,  H01L2224/06182 ,  H01L2224/29116 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/40245 ,  H01L2224/48245 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2924/05042 ,  H01L2924/0544 ,  H01L2924/13091

摘要： A semiconductor device includes a semiconductor die having a vertical transistor device with a source electrode, a drain electrode and a gate electrode, the semiconductor die having a first surface and a second surface opposing the first surface. A first metallization structure is located on the first surface and includes at least one source pad coupled to the source electrode, at least one drain pad coupled to the drain electrode and at least one gate pad coupled to the gate electrode, A second metallization structure is electrically insulated from the semiconductor die by the electrically insulating layer.

公开(公告)号：US20230178511A1

公开(公告)日：2023-06-08

申请号：US17975054

申请日：2022-10-27

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Young Chul SHIN ,  MinWoo RHEE ,  Su Min KIM ,  Il Young HAN ,  Nung Pyo HONG ,  Seung Don LEE ,  Kyeong Bin LIM

IPC分类号： H01L23/00 ,  H01L25/065

CPC分类号： H01L24/80 ,  H01L25/0657 ,  H01L25/0652 ,  H01L24/05 ,  H01L24/08 ,  H01L24/74 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/1436 ,  H01L2924/1431 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/73204 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/08145 ,  H01L2224/05166 ,  H01L2224/0518 ,  H01L2224/05172 ,  H01L2224/05005 ,  H01L2224/05018 ,  H01L2224/05073 ,  H01L2224/05541 ,  H01L2224/05558 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/80224 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80098 ,  H01L2225/06527 ,  H01L2225/06541

摘要： A method for manufacturing a semiconductor device is provided. The method for manufacturing a semiconductor device which uses an apparatus for manufacturing the semiconductor device including: a chamber, a support structure provided inside the chamber, and configured to support a bonding structure that comprises a first substrate structure, a second substrate structure, and a bonding metal layer provided between the first substrate structure and the second substrate structure, and a laser device which is provided above the chamber, the semiconductor device manufacturing method comprising: irradiating a laser beam to the bonding structure using the laser device.

公开(公告)号：US10014245B2

公开(公告)日：2018-07-03

申请号：US15244979

申请日：2016-08-23

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. Seddon ,  Francis J. Carney

IPC分类号： H01L21/302 ,  H01L21/461 ,  H01B13/00 ,  B23P15/00 ,  C03C25/00 ,  C23F1/00 ,  H01L23/498 ,  H01L21/48 ,  H01L21/3065 ,  H01L21/78 ,  H01L23/495 ,  H01L21/67 ,  H01L21/66 ,  H01L21/56 ,  H01L23/31 ,  H02M3/158 ,  H01L23/482 ,  H01L25/065 ,  H01L25/00 ,  H01L23/544 ,  H01L23/00 ,  H01L21/02 ,  H01L21/304 ,  H01L21/308 ,  H01L27/146

CPC分类号： H01L23/49827 ,  H01L21/02035 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3083 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/67069 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L22/12 ,  H01L22/26 ,  H01L23/147 ,  H01L23/15 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/4822 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/544 ,  H01L23/562 ,  H01L24/00 ,  H01L24/05 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/14 ,  H01L27/14625 ,  H01L27/14683 ,  H01L27/14685 ,  H01L29/0847 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05184 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M3/158

摘要： A method for removing material from a substrate includes providing the substrate with first and second opposing major surfaces. A masking layer is disposed along one of the first major surface and the second major surface, and is provided with a plurality of openings. The substrate is placed within an etching apparatus and material is removed from the substrate through openings using the etching apparatus. The thickness of the substrate is measured within the etching apparatus using a thickness transducer. The measured thickness is compared to a predetermined thickness and the material removal step is terminated responsive to the measured thickness corresponding to the predetermined thickness. In one embodiment, the method is used to more accurately form recessed regions in semiconductor die, which can be used in, for example, stacked device configurations.

公开(公告)号：US20170271252A1

公开(公告)日：2017-09-21

申请号：US15614840

申请日：2017-06-06

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. SEDDON ,  Francis J. CARNEY

IPC分类号： H01L23/498

CPC分类号： H01L23/49827 ,  H01L21/02035 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3083 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/67069 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L22/12 ,  H01L22/26 ,  H01L23/15 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/4822 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/544 ,  H01L23/562 ,  H01L24/05 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/14 ,  H01L27/14625 ,  H01L27/14683 ,  H01L27/14685 ,  H01L29/0847 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05184 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/48091 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M3/158

摘要： A stacked semiconductor device structure includes a first semiconductor device having a first major surface and a second major surface opposite to the first major surface. The second major surface includes a recessed region bounded by sidewall portions, and the sidewall portions have outer surfaces defining peripheral edge segments of the first semiconductor device. A first conductive layer is disposed adjoining at least portions of the recessed region. A second semiconductor device having a third major surface and a fourth major surface opposite to the third major surface includes a first portion that is electrically connected to the first conductive layer within the recessed region, and at least a portion of the second semiconductor device is disposed within the recessed region.

公开(公告)号：US09728477B2

公开(公告)日：2017-08-08

申请号：US15140234

申请日：2016-04-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Nien-Fang Wu ,  Chao-Wen Shih ,  Yung-Ping Chiang ,  Hao-Yi Tsai

IPC分类号： H01L21/00 ,  H01L23/31 ,  H01L23/10 ,  H01L23/04 ,  H01L23/13 ,  H01L23/06 ,  H01L21/56 ,  H01L23/00 ,  H01L23/58 ,  H01L21/78 ,  H01L23/29

CPC分类号： H01L23/3114 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/04 ,  H01L23/06 ,  H01L23/10 ,  H01L23/13 ,  H01L23/293 ,  H01L23/31 ,  H01L23/3142 ,  H01L23/562 ,  H01L23/585 ,  H01L24/03 ,  H01L24/11 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05672 ,  H01L2224/0568 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/1132 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/0665 ,  H01L2924/181 ,  H01L2924/186 ,  H01L2924/3512 ,  H01L2224/11 ,  H01L2224/03

摘要： The method of manufacturing a semiconductor device includes receiving a substrate. The substrate comprises at least one chip region and at least one scribe line next to the chip region, and each chip region comprises an active region. The method further includes disposing a buffer layer at least covering the scribe line, disposing a dielectric layer including an opening over each chip region, and disposing a bump material to the opening of the dielectric layer and electrically connecting to the active region. The method further includes forming a mold over the substrate, covering the buffer layer and cutting the substrate along the scribe line. Furthermore, the buffer layer includes an elastic modulus less than that of the mold, or the buffer layer includes a coefficient of thermal expansion less than that of the mold.

公开(公告)号：US20170125315A1

公开(公告)日：2017-05-04

申请号：US15403673

申请日：2017-01-11

申请人： Infineon Technologies Austria AG

发明人： Andrew Christopher Graeme Wood ,  Gernot Fasching ,  Marius Aurel Bodea ,  Thomas Krotscheck Ostermann ,  Erwin Bacher

IPC分类号： H01L21/66 ,  G06F17/50 ,  H01L23/58 ,  H01L21/78 ,  H01L23/482 ,  H01L23/485

CPC分类号： H01L22/34 ,  G06F17/5072 ,  H01L21/78 ,  H01L22/14 ,  H01L22/32 ,  H01L23/4827 ,  H01L23/485 ,  H01L23/528 ,  H01L23/53271 ,  H01L23/58 ,  H01L23/585 ,  H01L24/05 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05172 ,  H01L2224/0518 ,  H01L2224/05184 ,  H01L2924/1203 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/146

摘要： A semiconductor die includes a semiconductor circuit disposed within or over a substrate. A conductive contact pad is disposed over the substrate outside the semiconductor circuit. A floating electrical path ends at a singulated edge of the die. The electrical path is electrically coupled to the conductive contact pad.

公开(公告)号：US20170084661A1

公开(公告)日：2017-03-23

申请号：US15218777

申请日：2016-07-25

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. SEDDON ,  Francis J. CARNEY ,  Eric WOOLSEY

IPC分类号： H01L27/146 ,  H01L21/308 ,  H01L21/304 ,  H01L21/3065

CPC分类号： H01L23/49827 ,  H01L21/02035 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3083 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/67069 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L22/12 ,  H01L22/26 ,  H01L23/15 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/4822 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/544 ,  H01L23/562 ,  H01L24/05 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/14 ,  H01L27/14625 ,  H01L27/14683 ,  H01L27/14685 ,  H01L29/0847 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05184 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/48091 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M3/158

摘要： A semiconductor device has a semiconductor die containing a base material having a first surface and a second surface with an image sensor area. A masking layer with varying width openings is disposed over the first surface of the base material. The openings in the masking layer are larger in a center region of the semiconductor die and smaller toward edges of the semiconductor die. A portion of the first surface of the base material is removed by plasma etching to form a first curved surface. A metal layer is formed over the first curved surface of the base material. The semiconductor die is positioned over a substrate with the first curved surface oriented toward the substrate. Pressure and temperature is applied to assert movement of the base material to change orientation of the second surface with the image sensor area into a second curved surface.

公开(公告)号：US20170084520A1

公开(公告)日：2017-03-23

申请号：US15231025

申请日：2016-08-08

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Francis J. CARNEY ,  Michael J. SEDDON

IPC分类号： H01L23/495 ,  H01L21/3065 ,  H01L21/78

CPC分类号： H01L23/49827 ,  H01L21/02035 ,  H01L21/288 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3083 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/67069 ,  H01L21/6835 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L22/12 ,  H01L22/26 ,  H01L23/15 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/4822 ,  H01L23/49503 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/544 ,  H01L23/562 ,  H01L24/05 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/14 ,  H01L27/14625 ,  H01L27/14683 ,  H01L27/14685 ,  H01L29/0847 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05184 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/48091 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2225/06596 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M3/158

摘要： A semiconductor device has a first semiconductor die with a base material. A covering layer is formed over a surface of the base material. The covering layer can be made of an insulating material or metal. A trench is formed in the surface of the base material. The covering layer extends into the trench to provide the cantilevered protrusion of the covering layer. A portion of the base material is removed by plasma etching to form a cantilevered protrusion extending beyond an edge of the base material. The cantilevered protrusion can be formed by removing the base material to the covering layer, or the cantilevered protrusion can be formed within the base material under the covering layer. A second semiconductor die is disposed partially under the cantilevered protrusion. An interconnect structure is formed between the cantilevered protrusion and second semiconductor die.

公开(公告)号：US09484316B2

公开(公告)日：2016-11-01

申请号：US14070334

申请日：2013-11-01

申请人： Infineon Technologies AG

发明人： Evelyn Napetschnig ,  Ulrike Fastner ,  Alexander Heinrich ,  Thomas Fischer

IPC分类号： H01L23/00 ,  H01L21/78 ,  H01L21/308 ,  H01L21/683

CPC分类号： H01L24/05 ,  H01L21/268 ,  H01L21/304 ,  H01L21/3086 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3107 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/27 ,  H01L24/29 ,  H01L24/94 ,  H01L24/96 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02205 ,  H01L2224/03009 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05005 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/10126 ,  H01L2224/11009 ,  H01L2224/11011 ,  H01L2224/11019 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11845 ,  H01L2224/13007 ,  H01L2224/13013 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/26125 ,  H01L2224/27009 ,  H01L2224/27019 ,  H01L2224/2746 ,  H01L2224/2747 ,  H01L2224/27845 ,  H01L2224/29007 ,  H01L2224/29013 ,  H01L2224/291 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/94 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/206 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/27

摘要： In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a contact layer over a first major surface of a substrate. The substrate includes device regions separated by kerf regions. The contact layer is disposed in the kerf region and the device regions. A structured solder layer is formed over the device regions. The contact layer is exposed at the kerf region after forming the structured solder layer. The contact layer and the substrate in the kerf regions are diced.

摘要翻译： 根据本发明的实施例，形成半导体器件的方法包括在衬底的第一主表面上形成接触层。 衬底包括由切口区域分隔开的器件区域。 接触层设置在切口区域和器件区域中。 在器件区域上形成结构化的焊料层。 在形成结构化的焊料层之后，在切割区域处露出接触层。 切割区域中的接触层和基底。