公开(公告)号：US09490193B2

公开(公告)日：2016-11-08

申请号：US13309163

申请日：2011-12-01

Applicant: Alexander Heinrich ,  Michael Juerss ,  Konrad Roesl ,  Oliver Eichinger ,  Kok Chai Goh ,  Tobias Schmidt

Inventor： Alexander Heinrich ,  Michael Juerss ,  Konrad Roesl ,  Oliver Eichinger ,  Kok Chai Goh ,  Tobias Schmidt

IPC: H01L29/43 ,  H01L29/45 ,  H01L23/482 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L24/32 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L29/43 ,  H01L29/45 ,  H01L2224/03438 ,  H01L2224/0345 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/08503 ,  H01L2224/2745 ,  H01L2224/29082 ,  H01L2224/29084 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/29171 ,  H01L2224/29184 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/83191 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/83469 ,  H01L2224/83815 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01048 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/17738 ,  H01L2924/17747 ,  H01L2924/1776 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01023 ,  H01L2924/01015 ,  H01L2924/00

Abstract: The electronic device includes a carrier, a semiconductor substrate attached to the carrier, and a layer system disposed between the semiconductor substrate and the carrier. The layer system includes an electrical contact layer disposed on the semiconductor substrate. A functional layer is disposed on the electrical contact layer. An adhesion layer is disposed on the functional layer. A solder layer is disposed between the adhesion layer and the carrier.

Abstract translation: 电子设备包括载体，附着到载体的半导体衬底以及设置在半导体衬底和载体之间的层系统。 层系统包括设置在半导体衬底上的电接触层。 功能层设置在电接触层上。 粘附层设置在功能层上。 在粘合层和载体之间设置焊料层。

公开(公告)号：US20150325539A1

公开(公告)日：2015-11-12

申请号：US14806728

申请日：2015-07-23

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Yi-Wen WU ,  Zheng-Yi LIM ,  Ming-Che HO ,  Chung-Shi LIU

IPC: H01L23/00 ,  H01L23/31

CPC classification number: H01L23/291 ,  H01L23/293 ,  H01L23/3171 ,  H01L23/525 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/03424 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05548 ,  H01L2224/05562 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05583 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/08503 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16503 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A method includes coating a passivation layer overlying a semiconductor substrate and forming an interconnect layer overlying the passivation layer. The interconnect layer includes a line region and a landing pad region. The method further includes forming a metallic layer including tin on a surface of the interconnect layer using an immersion process, forming a protective layer on the metallic layer, and exposing a portion of the metallic layer on the landing pad region of the interconnect layer through the protective layer.

Abstract translation: 一种方法包括涂覆覆盖半导体衬底的钝化层并形成覆盖钝化层的互连层。 互连层包括线区域和着陆焊盘区域。 所述方法还包括使用浸渍工艺在所述互连层的表面上形成包含锡的金属层，在所述金属层上形成保护层，以及通过所述互连层的所述接合焊盘区域上的所述金属层的一部分暴露 保护层。

公开(公告)号：US20130000967A1

公开(公告)日：2013-01-03

申请号：US13536465

申请日：2012-06-28

Applicant: Dong Jun LEE ,  Jung Suk Kim

Inventor： Dong Jun LEE ,  Jung Suk Kim

IPC: H01R4/02 ,  B23K1/20 ,  H05K1/11

CPC classification number: H01L24/11 ,  C23C18/1651 ,  C23C18/1692 ,  C23C18/32 ,  C23C18/42 ,  C23C18/44 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03464 ,  H01L2224/03849 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05644 ,  H01L2224/08503 ,  H01L2224/11849 ,  H01L2924/01029 ,  H01L2924/01327 ,  H05K3/244 ,  H05K3/3478 ,  H05K3/4007 ,  H01L2924/00012 ,  H01L2924/2064

Abstract: Disclosed herein are an electric joint structure including a joint, an intermetallic compound (IMC), and a solder layer, wherein the intermetallic compound (IMC) is generated from an electroless surface treatment plating layer including nickel plating coating of 1 μm or less, a method for preparing the same, and a printed circuit board including the same. The electric joint structure having the intermetallic compound structure according to the exemplary embodiment of the present invention can have a joint structure capable of improving impact resistance by suppressing the generation of a Ni—Sn based intermetallic compound and a P-enriched layer at a solder joint interface during a reflow process and improving workability including the Ni layer before the reflow process.

Abstract translation: 本发明公开了一种电接头结构，包括接头，金属间化合物（IMC）和焊料层，其中金属间化合物（IMC）由包括1μm或更小的镀镍涂层的化学镀处理镀层产生， 制备其的方法和包括该印刷电路板的印刷电路板。 具有根据本发明的示例性实施方式的金属间化合物结构的电接头结构可以具有能够通过抑制在焊接接头处产生Ni-Sn系金属间化合物和P富集层而能够改善耐冲击性的接合结构 在回流工艺期间接口，并且改善包括回流工艺之前的Ni层的可加工性。

公开(公告)号：US11984417B2

公开(公告)日：2024-05-14

申请号：US17648309

申请日：2022-01-19

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor： Ling-Yi Chuang

IPC: H01L23/48 ,  H01L23/00

CPC classification number: H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L24/03 ,  H01L2224/0331 ,  H01L2224/03462 ,  H01L2224/05013 ,  H01L2224/05017 ,  H01L2224/05025 ,  H01L2224/05073 ,  H01L2224/05147 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05564 ,  H01L2224/05578 ,  H01L2224/05601 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05638 ,  H01L2224/08145 ,  H01L2224/08503 ,  H01L2224/8081

Abstract: The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a first chip and a second chip. A first conductive connection wire of the first chip is connected to a first conductive contact pad, and a second conductive connection wire of the second chip is connected to a second conductive contact pad. In addition, the first conductive contact pad includes a first conductor group and a second conductor group, and the second conductive contact pad includes a third conductor group and a fourth conductor group.

公开(公告)号：US20240088087A1

公开(公告)日：2024-03-14

申请号：US18509357

申请日：2023-11-15

Applicant: Infineon Technologies AG

Inventor： Alexander HEINRICH ,  Michael JUERSS ,  Konrad ROESL ,  Oliver EICHINGER ,  Kok Chai GOH ,  Tobias SCHMIDT

IPC: H01L23/00 ,  H01L23/482 ,  H01L23/495 ,  H01L29/43 ,  H01L29/45

CPC classification number: H01L24/32 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L29/43 ,  H01L29/45 ,  H01L2224/03438 ,  H01L2224/0345 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/08503 ,  H01L2224/2745 ,  H01L2224/29082 ,  H01L2224/29084 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/29171 ,  H01L2224/29184 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/83191 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/83469 ,  H01L2224/83815 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01048 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/17738 ,  H01L2924/17747 ,  H01L2924/1776

Abstract: An electronic device with a multi-layer contact and a system is disclosed. In an embodiment, a semiconductor device includes a semiconductor substrate having a first electrode terminal located on a first surface and a second surface electrode terminal located on a second surface, the first surface being opposite to the second surface, an electrical contact layer disposed directly on the first electrode terminal, a functional layer directly disposed on the electrical contact layer, an adhesion layer directly disposed on the functional layer, a solder layer directly disposed on the adhesion layer; and a protection layer directly disposed on the solder layer, wherein the semiconductor device is a power semiconductor device configured to provide a vertical current flow.

公开(公告)号：US11842975B2

公开(公告)日：2023-12-12

申请号：US16679883

申请日：2019-11-11

Applicant: Infineon Technologies AG

Inventor： Alexander Heinrich ,  Michael Juerss ,  Konrad Roesl ,  Oliver Eichinger ,  Kok Chai Goh ,  Tobias Schmidt

IPC: H01L29/43 ,  H01L23/00 ,  H01L29/45 ,  H01L23/495 ,  H01L23/482

CPC classification number: H01L24/32 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L29/43 ,  H01L29/45 ,  H01L2224/0345 ,  H01L2224/03438 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/08503 ,  H01L2224/2745 ,  H01L2224/291 ,  H01L2224/29082 ,  H01L2224/29084 ,  H01L2224/29101 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/29171 ,  H01L2224/29184 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/8346 ,  H01L2224/83191 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83464 ,  H01L2224/83469 ,  H01L2224/83815 ,  H01L2924/014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0132 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01048 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/1776 ,  H01L2924/17738 ,  H01L2924/17747 ,  H01L2224/291 ,  H01L2924/014 ,  H01L2224/05124 ,  H01L2924/00014 ,  H01L2224/05139 ,  H01L2924/00014 ,  H01L2224/05171 ,  H01L2924/00014 ,  H01L2224/05166 ,  H01L2924/01074 ,  H01L2224/05184 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/05669 ,  H01L2924/00014 ,  H01L2224/29111 ,  H01L2924/00014 ,  H01L2224/29118 ,  H01L2924/00014 ,  H01L2224/29109 ,  H01L2924/00014 ,  H01L2224/29105 ,  H01L2924/00014 ,  H01L2224/29113 ,  H01L2924/00014 ,  H01L2224/291 ,  H01L2924/01048 ,  H01L2224/83447 ,  H01L2924/00014 ,  H01L2224/8346 ,  H01L2924/00014 ,  H01L2224/83444 ,  H01L2924/00014 ,  H01L2224/83439 ,  H01L2924/00014 ,  H01L2224/83464 ,  H01L2924/00014 ,  H01L2224/83469 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/01023 ,  H01L2224/05655 ,  H01L2924/01015 ,  H01L2224/83455 ,  H01L2924/01023 ,  H01L2224/83455 ,  H01L2924/01015 ,  H01L2224/29139 ,  H01L2924/00014 ,  H01L2224/29144 ,  H01L2924/00014 ,  H01L2924/01327 ,  H01L2924/00 ,  H01L2924/13055 ,  H01L2924/00 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2924/1305 ,  H01L2924/00

Abstract: An electronic device with a multi-layer contact and a system is disclosed. In an embodiment, a semiconductor device includes a semiconductor substrate having a first electrode terminal located on a first surface and a second surface electrode terminal located on a second surface, the first surface being opposite to the second surface, an electrical contact layer disposed directly on the first electrode terminal, a functional layer directly disposed on the electrical contact layer, an adhesion layer directly disposed on the functional layer, a solder layer directly disposed on the adhesion layer; and a protection layer directly disposed on the solder layer, wherein the semiconductor device is a power semiconductor device configured to provide a vertical current flow.

公开(公告)号：US09953891B2

公开(公告)日：2018-04-24

申请号：US14806728

申请日：2015-07-23

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Yi-Wen Wu ,  Zheng-Yi Lim ,  Ming-Che Ho ,  Chung-Shi Liu

IPC: H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/525

CPC classification number: H01L23/291 ,  H01L23/293 ,  H01L23/3171 ,  H01L23/525 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/03424 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05548 ,  H01L2224/05562 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05583 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/08503 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16503 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A method includes coating a passivation layer overlying a semiconductor substrate and forming an interconnect layer overlying the passivation layer. The interconnect layer includes a line region and a landing pad region. The method further includes forming a metallic layer including tin on a surface of the interconnect layer using an immersion process, forming a protective layer on the metallic layer, and exposing a portion of the metallic layer on the landing pad region of the interconnect layer through the protective layer.

公开(公告)号：US20170194278A1

公开(公告)日：2017-07-06

申请号：US15433421

申请日：2017-02-15

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Tung-Liang Shao ,  Chih-Hang Tung ,  Wen-Lin Shih ,  Hsiao-Yun Chen ,  Chen-Hua Yu

IPC: H01L23/00 ,  H01L25/00 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L24/16 ,  B23K1/0016 ,  B23K1/06 ,  B23K20/023 ,  B23K20/2333 ,  B23K2101/42 ,  B23K2103/10 ,  B23K2103/12 ,  B23K2103/166 ,  B23K2103/18 ,  H01L21/563 ,  H01L23/3185 ,  H01L24/05 ,  H01L24/08 ,  H01L24/13 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/08059 ,  H01L2224/08503 ,  H01L2224/13147 ,  H01L2224/1607 ,  H01L2224/16145 ,  H01L2224/16503 ,  H01L2224/81012 ,  H01L2224/81022 ,  H01L2224/81365 ,  H01L2224/81379 ,  H01L2224/8181 ,  H01L2224/81948 ,  H01L2225/06513 ,  H01L2924/01013 ,  H01L2924/01029

Abstract: A method includes performing a first strike process to strike a metal bump of a first package component against a metal pad of a second package component. A first one of the metal bump and the metal pad includes copper. A second one of the metal bump and the metal pad includes aluminum. The method further includes performing a second strike process to strike the metal bump against the metal pad. An annealing is performed to bond the metal bump on the metal pad.

公开(公告)号：US09576929B1

公开(公告)日：2017-02-21

申请号：US14997727

申请日：2016-01-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Tung-Liang Shao ,  Chih-Hang Tung ,  Wen-Lin Shih ,  Hsiao-Yun Chen ,  Chen-Hua Yu

IPC: H01L23/52 ,  H01L21/44 ,  H01L23/00 ,  B23K1/00 ,  B23K1/06

CPC classification number: H01L24/16 ,  B23K1/0016 ,  B23K1/06 ,  B23K20/023 ,  B23K20/2333 ,  B23K2101/42 ,  B23K2103/10 ,  B23K2103/12 ,  B23K2103/166 ,  B23K2103/18 ,  H01L21/563 ,  H01L23/3185 ,  H01L24/05 ,  H01L24/08 ,  H01L24/13 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/08059 ,  H01L2224/08503 ,  H01L2224/13147 ,  H01L2224/1607 ,  H01L2224/16145 ,  H01L2224/16503 ,  H01L2224/81012 ,  H01L2224/81022 ,  H01L2224/81365 ,  H01L2224/81379 ,  H01L2224/8181 ,  H01L2224/81948 ,  H01L2225/06513 ,  H01L2924/01013 ,  H01L2924/01029

Abstract: A method includes performing a first strike process to strike a metal bump of a first package component against a metal pad of a second package component. A first one of the metal bump and the metal pad includes copper. A second one of the metal bump and the metal pad includes aluminum. The method further includes performing a second strike process to strike the metal bump against the metal pad. An annealing is performed to bond the metal bump on the metal pad.

Abstract translation: 一种方法包括执行第一打击过程以将第一包装部件的金属凸块抵靠第二包装部件的金属垫。 金属凸块和金属垫中的第一个包括铜。 金属凸块和金属垫中的第二个包括铝。 该方法还包括执行第二击打过程以将金属凸块撞击金属垫。 执行退火以将金属凸块接合在金属垫上。

公开(公告)号：US08835300B2

公开(公告)日：2014-09-16

申请号：US13417031

申请日：2012-03-09

Applicant: Chih Chen ,  King-Ning Tu ,  Hsiang-Yao Hsiao

Inventor： Chih Chen ,  King-Ning Tu ,  Hsiang-Yao Hsiao

IPC: H01L23/498 ,  H01L21/60 ,  C23C28/02 ,  H01L23/00

CPC classification number: C23C28/021 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03849 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05611 ,  H01L2224/08503 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/10253 ,  H01L2924/3651 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014

Abstract: The present invention relates to a method for inhibiting growth of intermetallic compounds, comprising the steps of: (i) preparing a substrate element including a substrate on which at least one layer of metal pad is deposited, wherein at least one thin layer of solder is deposited onto the layer of metal pad, and then carry out reflowing process; and (ii) further depositing a bump of solder with an appropriate thickness on the substrate element, characterized in that a thin intermetallic compound is formed by the reaction of the thin solder layer and the metal in the metal pad after appropriate heat treatment of the thin solder layer. In the present invention, the formation of a thin intermetallic compound is able to slow the growth of the intermetallic compound and to prevent the transformation of the intermetallic compounds.

Abstract translation: 本发明涉及一种抑制金属间化合物生长的方法，其特征在于包括以下步骤：（i）制备包含基材的基材，其上至少沉积有一层金属垫，其中至少一层焊料薄层为 沉积在金属垫层上，然后进行回流处理; 以及（ii）在衬底元件上进一步沉积具有适当厚度的焊料凸点，其特征在于，通过所述薄焊料层与所述金属焊盘中的所述金属的反应形成薄的金属间化合物， 焊锡层。 在本发明中，形成薄的金属间化合物能够减缓金属间化合物的生长并防止金属间化合物的转变。