公开(公告)号：US20150325539A1

公开(公告)日：2015-11-12

申请号：US14806728

申请日：2015-07-23

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Yi-Wen WU ,  Zheng-Yi LIM ,  Ming-Che HO ,  Chung-Shi LIU

IPC: H01L23/00 ,  H01L23/31

CPC classification number: H01L23/291 ,  H01L23/293 ,  H01L23/3171 ,  H01L23/525 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/03424 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05548 ,  H01L2224/05562 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05583 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/08503 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/16503 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A method includes coating a passivation layer overlying a semiconductor substrate and forming an interconnect layer overlying the passivation layer. The interconnect layer includes a line region and a landing pad region. The method further includes forming a metallic layer including tin on a surface of the interconnect layer using an immersion process, forming a protective layer on the metallic layer, and exposing a portion of the metallic layer on the landing pad region of the interconnect layer through the protective layer.

Abstract translation: 一种方法包括涂覆覆盖半导体衬底的钝化层并形成覆盖钝化层的互连层。 互连层包括线区域和着陆焊盘区域。 所述方法还包括使用浸渍工艺在所述互连层的表面上形成包含锡的金属层，在所述金属层上形成保护层，以及通过所述互连层的所述接合焊盘区域上的所述金属层的一部分暴露 保护层。

公开(公告)号：US20140342546A1

公开(公告)日：2014-11-20

申请号：US14341021

申请日：2014-07-25

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chien Ling HWANG ,  Zheng-Yi LIM ,  Chung-Shi LIU

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03831 ,  H01L2224/0401 ,  H01L2224/05144 ,  H01L2224/05666 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11622 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/11849 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13164 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/81193 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/0539 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/20102 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/00

Abstract: A method of forming an integrated circuit device comprises forming a metal pillar over a semiconductor substrate. The method also comprises forming a solder layer over the metal pillar. The method further comprises forming a metallization layer comprising a cobalt (Co) element, the metallization layer covering the metal pillar and the solder layer. The method additionally comprises thermally reflowing the solder layer to form a solder bump, driving the Co element of the metallization layer into the solder bump. The method also comprises oxidizing the metallization layer to form a metal oxide layer on a sidewall surface of the metal pillar.

Abstract translation: 形成集成电路器件的方法包括在半导体衬底上形成金属柱。 该方法还包括在金属柱上形成焊料层。 该方法还包括形成包含钴（Co）元素的金属化层，金属化层覆盖金属柱和焊料层。 该方法另外包括热回流焊料层以形成焊料凸块，将金属化层的Co元件驱动到焊料凸块中。 该方法还包括氧化金属化层以在金属柱的侧壁表面上形成金属氧化物层。