公开(公告)号：US20170352716A1

公开(公告)日：2017-12-07

申请号：US15382077

申请日：2016-12-16

Applicant: Samsung Display Co., Ltd

Inventor： Chungseok LEE ,  Donghee PARK ,  Cheolgeun AN ,  Jihoon OH ,  Euiyun JANG ,  Jeongho HWANG

IPC: H01L27/32 ,  H01L51/00 ,  H01L23/00

CPC classification number: H01L27/3276 ,  H01L24/29 ,  H01L24/32 ,  H01L51/0096 ,  H01L2224/13144 ,  H01L2224/16238 ,  H01L2224/271 ,  H01L2224/29005 ,  H01L2224/29028 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/2929 ,  H01L2224/29293 ,  H01L2224/2939 ,  H01L2224/29391 ,  H01L2224/294 ,  H01L2224/29439 ,  H01L2224/29444 ,  H01L2224/29447 ,  H01L2224/29455 ,  H01L2224/29499 ,  H01L2224/32148 ,  H01L2224/32225 ,  H01L2224/32238 ,  H01L2224/743 ,  H01L2224/81191 ,  H01L2224/831 ,  H01L2224/83192 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83345 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2251/5369 ,  H01L2924/07811 ,  H01L2924/1426 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00012

Abstract: An anisotropic conductive film includes a conductive layer; a first resin insulating layer over a first surface of the conductive layer; and a second resin insulating layer over a second surface of the conductive layer, wherein the conductive layer comprises a plurality of conductive particles and a nano fiber connecting the plurality of conductive particles to each other, each of the plurality of conductive particles comprising a plurality of needle-shaped protrusions having a conical shape, and wherein the first resin insulating layer and the second resin insulating layer comprise a same material and have different thicknesses.

公开(公告)号：US09589860B2

公开(公告)日：2017-03-07

申请号：US14508645

申请日：2014-10-07

Applicant: Lakshminarayan Viswanathan ,  Jaynal A. Molla

Inventor： Lakshminarayan Viswanathan ,  Jaynal A. Molla

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/36 ,  H01L23/367 ,  H01L23/00 ,  H01L23/482 ,  H01L21/683 ,  H01L23/66 ,  H01L21/56

CPC classification number: H01L23/3114 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/741 ,  H01L24/743 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/03002 ,  H01L2224/03312 ,  H01L2224/0332 ,  H01L2224/03436 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03505 ,  H01L2224/04026 ,  H01L2224/05009 ,  H01L2224/05018 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05551 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/05864 ,  H01L2224/05887 ,  H01L2224/0589 ,  H01L2224/05893 ,  H01L2224/27002 ,  H01L2224/2731 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/27436 ,  H01L2224/27438 ,  H01L2224/27505 ,  H01L2224/29006 ,  H01L2224/29011 ,  H01L2224/29012 ,  H01L2224/29015 ,  H01L2224/29017 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29083 ,  H01L2224/29084 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29117 ,  H01L2224/29118 ,  H01L2224/2912 ,  H01L2224/29124 ,  H01L2224/29138 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2918 ,  H01L2224/29184 ,  H01L2224/2919 ,  H01L2224/29193 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29387 ,  H01L2224/2939 ,  H01L2224/29393 ,  H01L2224/29499 ,  H01L2224/296 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/741 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83815 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/1016 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1421 ,  H01L2924/15738 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/3512 ,  H01L2224/27 ,  H01L2224/11 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/01015 ,  H01L2924/01048 ,  H01L2924/01014 ,  H01L2924/01032 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01028 ,  H01L2924/01027 ,  H01L2924/01026 ,  H01L2224/03 ,  H01L2224/05099 ,  H01L2924/01006 ,  H01L2924/04642 ,  H01L2924/0503 ,  H01L2924/01005 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2221/68304 ,  H01L21/304 ,  H01L21/78 ,  H01L2224/83 ,  H01L2924/0781 ,  H01L2924/00 ,  H01L2224/034 ,  H01L2221/68368 ,  H01L2224/274

Abstract: An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a thermally conductive flow layer underlying the sintered metallic layer, and a thermally conductive substrate underlying the thermally conductive flow layer.

Abstract translation: 电子器件包括具有下表面的半导体管芯，位于半导体管芯的下表面下方的烧结金属层，在烧结金属层下面的导热流动层，以及位于导热流动层下面的导热基底。

公开(公告)号：US20150179599A1

公开(公告)日：2015-06-25

申请号：US14562129

申请日：2014-12-05

Applicant: NXP B.V.

Inventor： Johannes Wilhelmus van Rijckevorsel ,  Emiel de Bruin

IPC: H01L23/00

CPC classification number: H01L24/29 ,  H01L23/4827 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/32 ,  H01L24/83 ,  H01L2223/6644 ,  H01L2224/03825 ,  H01L2224/03826 ,  H01L2224/05026 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2224/2745 ,  H01L2224/2746 ,  H01L2224/27464 ,  H01L2224/29084 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/32245 ,  H01L2224/32502 ,  H01L2224/83203 ,  H01L2224/83207 ,  H01L2224/83444 ,  H01L2224/83805 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/1421 ,  H01L2924/15747 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/01014

Abstract: A die comprising a body of semiconductor material, said body configured to receive a solder layer of gold containing alloy for use in die bonding said die to a substrate, wherein the die includes an interface layer on a surface of the body for receiving the solder layer, the interface layer having a plurality of sub-layers of different metals.

Abstract translation: 一种包括半导体材料体的芯片，所述主体被配置为接收用于将所述裸片接合到基板的用于将所述裸片接合的含金合金的焊料层，其中所述管芯包括在所述主体的表面上用于接纳焊料层的界面层 ，界面层具有多个不同金属的子层。

公开(公告)号：US08916449B2

公开(公告)日：2014-12-23

申请号：US13836807

申请日：2013-03-15

Applicant: Asia Pacific Microsystems, Inc.

Inventor： Hung-Lin Yin ,  Jerwei Hsieh ,  Li-Yuan Lin

IPC: H01L21/30 ,  H01L21/46 ,  H01L23/498 ,  H01L21/762 ,  H01L23/10 ,  H01L21/50 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  B81C1/00

CPC classification number: H01L23/49866 ,  B81C1/00269 ,  B81C2203/019 ,  H01L21/50 ,  H01L21/76251 ,  H01L23/10 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/95 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11614 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/16507 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/2747 ,  H01L2224/27614 ,  H01L2224/29011 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29084 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/32146 ,  H01L2224/32148 ,  H01L2224/32235 ,  H01L2224/32238 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/48091 ,  H01L2224/48148 ,  H01L2224/48228 ,  H01L2224/48463 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73215 ,  H01L2224/81011 ,  H01L2224/81013 ,  H01L2224/81022 ,  H01L2224/81121 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81825 ,  H01L2224/81948 ,  H01L2224/83011 ,  H01L2224/83013 ,  H01L2224/83022 ,  H01L2224/83121 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83805 ,  H01L2224/83825 ,  H01L2224/83948 ,  H01L2224/9202 ,  H01L2224/92147 ,  H01L2224/95 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/16235 ,  H01L2924/351 ,  H01L2924/00015 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A substrate bonding method comprises the following steps. Firstly, a first substrate and a second substrate are provided, wherein a surface of the first substrate is covered by a first Ag layer and a surface of the second substrate is covered by a second Ag layer and a metallic layer from bottom to top, wherein the metallic layer comprises a first Sn layer. Secondly, a bonding process is performed by aligning the first and second substrates followed by bringing the metallic layer into contact with the first Ag layer followed by applying a load while heating to a predetermined temperature in order to form Ag3Sn intermetallic compounds. Finally, cool down and remove the load to complete the bonding process.

Abstract translation: 基板接合方法包括以下步骤。 首先，提供第一基板和第二基板，其中第一基板的表面被第一Ag层覆盖，并且第二基板的表面被从第二Ag层和从底部到顶部的金属层覆盖，其中 金属层包括第一Sn层。 其次，通过使第一和第二基板对准，然后使金属层与第一Ag层接触，然后在加热至预定温度的同时施加负载以形成Ag 3 Sn金属间化合物，进行接合工艺。 最后，冷却并清除负载以完成粘合过程。

公开(公告)号：US20120141786A1

公开(公告)日：2012-06-07

申请号：US13272550

申请日：2011-10-13

Applicant: Dong Seon UH ,  Gyu Seok SONG ,  Min Kyu HWANG ,  Ki Tae SONG ,  Dae Ho SEO

Inventor： Dong Seon UH ,  Gyu Seok SONG ,  Min Kyu HWANG ,  Ki Tae SONG ,  Dae Ho SEO

IPC: B32B27/38 ,  C08G69/00 ,  C08G18/00 ,  B32B7/12 ,  C08F210/00

CPC classification number: B32B7/06 ,  B32B27/08 ,  B32B2255/10 ,  B32B2255/26 ,  B32B2255/28 ,  B32B2307/30 ,  B32B2405/00 ,  C08G18/6254 ,  C08G59/08 ,  C08G2170/40 ,  C08L2312/08 ,  C09J7/22 ,  C09J7/385 ,  C09J163/00 ,  C09J175/04 ,  C09J2201/606 ,  C09J2203/326 ,  C09J2433/00 ,  C09J2463/00 ,  H01L21/6836 ,  H01L24/29 ,  H01L24/83 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/29084 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29388 ,  H01L2224/32145 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/061 ,  H01L2924/0615 ,  H01L2924/0635 ,  H01L2924/0665 ,  H01L2924/0675 ,  H01L2924/068 ,  H01L2924/07025 ,  H01L2924/0705 ,  Y10T428/28 ,  Y10T428/31515 ,  H01L2224/27 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/3512 ,  H01L2924/00

Abstract: An adhesive film for semiconductor devices, the adhesive film including a base film having a coefficient of linear expansion of about 50 to about 150 μm/m·° C. at 0 to 5° C.

Abstract translation: 一种用于半导体器件的粘合膜，该粘合膜包括在0至5℃下具有约50至约150μm/ m·℃的线性膨胀系数的基膜。

公开(公告)号：US20120135242A1

公开(公告)日：2012-05-31

申请号：US13365071

申请日：2012-02-02

Applicant: Yuki SUGO ,  Sadahito MISUMI ,  Takeshi MATSUMURA

Inventor： Yuki SUGO ,  Sadahito MISUMI ,  Takeshi MATSUMURA

IPC: B32B27/38 ,  C08L63/00

CPC classification number: H01L21/6836 ,  C08G59/621 ,  C08L33/06 ,  C08L2666/04 ,  C09J163/00 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L2221/68327 ,  H01L2224/274 ,  H01L2224/29 ,  H01L2224/29084 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83855 ,  H01L2224/85001 ,  H01L2224/85205 ,  H01L2224/92247 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/20103 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/3025 ,  Y10T428/31511 ,  H01L2924/0635 ,  H01L2924/066 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/05442 ,  H01L2924/0532 ,  H01L2924/05432 ,  H01L2924/05032 ,  H01L2924/0503 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

Abstract: The thermosetting die-bonding film of the present invention is used in manufacturing a semiconductor device, has at least an epoxy resin, a phenol resin, and an acrylic copolymer, and the ratio X/Y is 0.7 to 5 when X represents a total weight of the epoxy resin and the phenol resin and Y represents a weight of the acrylic copolymer.

Abstract translation: 本发明的热固性芯片接合薄膜用于制造半导体器件，至少具有环氧树脂，酚醛树脂和丙烯酸共聚物，当X表示总重量时，X / Y的比率为0.7〜5 的环氧树脂和酚醛树脂，Y表示丙烯酸共聚物的重量。

公开(公告)号：US12051669B2

公开(公告)日：2024-07-30

申请号：US17494909

申请日：2021-10-06

Applicant: Wolfspeed, Inc.

Inventor： Alexander Komposch ,  Kevin Schneider ,  Scott Sheppard

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/48

CPC classification number: H01L24/29 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/05 ,  H01L24/27 ,  H01L2224/02372 ,  H01L2224/02381 ,  H01L2224/05569 ,  H01L2224/2745 ,  H01L2224/29025 ,  H01L2224/29084 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/29184 ,  H01L2924/10272 ,  H01L2924/13064 ,  H01L2924/13091

Abstract: A semiconductor device package includes a package substrate having a die attach region, a silicon carbide (SiC) substrate having a first surface including a semiconductor device layer thereon and a second surface that is opposite the first surface, and a die attach metal stack. The die attach metal stack includes a sputtered die attach material layer that attaches the second surface of the SiC substrate to the die attach region of the package substrate, where the sputtered die attach material layer comprises a void percent of about 15% or less. The sputtered die attach material layer may be formed using a sputter gas including at least one of krypton (Kr), xenon (Xe), or radon (Rn). The die attach metal stack may further include a metal interlayer that prevent contacts with a first barrier metal layer during a phase transition of the die attach material layer.

公开(公告)号：US11848298B2

公开(公告)日：2023-12-19

申请号：US17401863

申请日：2021-08-13

Applicant: Mitsubishi Electric Corporation

Inventor： Yosuke Nakata ,  Yuji Sato ,  Yoshinori Yokoyama

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/495 ,  H01L23/31 ,  H01L25/00 ,  H01L21/56

CPC classification number: H01L24/48 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/29084 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/85205 ,  H01L2924/37001

Abstract: A semiconductor apparatus includes: a first conductor plate; a second conductor plate separated from the first conductor plate; a plurality of semiconductor devices having back surface electrodes connected to the first conductor plate; a relay substrate mounted on the second conductor plate and including a plurality of first relay pads and a second relay pad connected to the plurality of first relay pads; a plurality of metal wires respectively connecting control electrodes of the plurality of semiconductor devices to the plurality of first relay pads; a first conductor block connected to front surface electrodes of the plurality of semiconductor devices; a second conductor block connected to the second relay pad; and a sealing material sealing the first and second conductor plates, the plurality of semiconductor devices, the relay substrate, the metal wire, and the first and second conductor blocks, the sealing material includes a first principal surface and a second principal surface opposed to each other, the first conductor plate is exposed from the first principal surface, the second conductor plate is not exposed from the first principal surface, and the first and second conductor blocks are exposed from the second principal surface.

公开(公告)号：US20190006311A1

公开(公告)日：2019-01-03

申请号：US16126190

申请日：2018-09-10

Applicant: Infineon Technologies AG

Inventor： Alexander Heinrich ,  Michael Juerss ,  Konrad Roesl ,  Oliver Eichinger ,  Kok Chai Goh ,  Tobias Schmidt

IPC: H01L23/00 ,  H01L29/45 ,  H01L29/43 ,  H01L23/482 ,  H01L23/495

CPC classification number: H01L24/32 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L29/43 ,  H01L29/45 ,  H01L2224/03438 ,  H01L2224/0345 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/08503 ,  H01L2224/2745 ,  H01L2224/29082 ,  H01L2224/29084 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/29171 ,  H01L2224/29184 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/83191 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/83469 ,  H01L2224/83815 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01048 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/17738 ,  H01L2924/17747 ,  H01L2924/1776 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01015 ,  H01L2924/00

Abstract: A method for producing an electric device with a multi-layer contact is disclosed. In an embodiment, a method includes providing a carrier, the carrier having a metallic layer disposed on its surface, providing a semiconductor substrate, forming a layer stack on the semiconductor substrate and attaching the layer stack of the semiconductor substrate to the metallic layer of the carrier so that an intermetallic phase is formed between the metallic layer and the solder layer.

公开(公告)号：US20170025375A1

公开(公告)日：2017-01-26

申请号：US15282927

申请日：2016-09-30

Applicant: Infineon Technologies AG

Inventor： Alexander Heinrich ,  Michael Juerss ,  Konrad Roesl ,  Oliver Eichinger ,  Kok Chai Goh ,  Tobias Schmidt

IPC: H01L23/00 ,  H01L23/495

CPC classification number: H01L24/32 ,  H01L23/4827 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L29/43 ,  H01L29/45 ,  H01L2224/03438 ,  H01L2224/0345 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/08503 ,  H01L2224/2745 ,  H01L2224/29082 ,  H01L2224/29084 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/29169 ,  H01L2224/29171 ,  H01L2224/29184 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/83191 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/83469 ,  H01L2224/83815 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01048 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/17738 ,  H01L2924/17747 ,  H01L2924/1776 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/01015 ,  H01L2924/00

Abstract: An electric device with a multi-layer contact is disclosed. In an embodiment, the electronic device includes a carrier, a semiconductor substrate attached to the carrier, and a layer system disposed between the semiconductor substrate and the carrier. The layer system includes an electrical contact layer disposed on the semiconductor substrate. A functional layer is disposed on the electrical contact layer. An adhesion layer is disposed on the functional layer. A solder layer is disposed between the adhesion layer and the carrier.

Abstract translation: 公开了具有多层接触的电气设备。 在一个实施例中，电子设备包括载体，连接到载体的半导体衬底以及设置在半导体衬底和载体之间的层系统。 层系统包括设置在半导体衬底上的电接触层。 功能层设置在电接触层上。 粘附层设置在功能层上。 在粘合层和载体之间设置焊料层。