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公开(公告)号:US20240120341A1
公开(公告)日:2024-04-11
申请号:US18538192
申请日:2023-12-13
发明人: Shunpei YAMAZAKI
IPC分类号: H01L27/105 , G11C11/405 , G11C16/04 , H01L21/02 , H01L21/46 , H01L21/8258 , H01L27/12 , H01L29/06 , H01L29/786 , H10B41/10 , H10B41/20 , H10B41/30 , H10B41/35 , H10B41/70
CPC分类号: H01L27/105 , G11C11/405 , G11C16/0433 , H01L21/02664 , H01L21/46 , H01L21/8258 , H01L27/1225 , H01L29/06 , H01L29/7869 , H01L29/78693 , H10B41/10 , H10B41/20 , H10B41/30 , H10B41/35 , H10B41/70 , H01L27/0207
摘要: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
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公开(公告)号:US11309188B2
公开(公告)日:2022-04-19
申请号:US15974984
申请日:2018-05-09
IPC分类号: H01L21/46 , H01L21/304 , H01L29/16
摘要: A method of singulating a silicon carbide (SiC) semiconductor wafer can include defining a cut within the silicon carbide (SiC) semiconductor wafer by performing a partial dicing operation where the SiC semiconductor wafer is aligned along a plane and the cut has a depth less than a first thickness of the SiC semiconductor wafer. The cut is aligned along a vertical direction orthogonal to the plane such that a portion of the SiC semiconductor wafer has a second thickness that extends between a bottom of the cut and an outer surface of the SiC semiconductor wafer. The method can further include defining a cleave, by performing a cleaving operation, through the portion of the SiC semiconductor wafer having the second thickness. The cleave can be aligned with the cut and extending to the outer surface of the SiC semiconductor wafer.
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公开(公告)号:US11282926B2
公开(公告)日:2022-03-22
申请号:US16814174
申请日:2020-03-10
摘要: A semiconductor device includes a SiC body having a first semiconductor area of a first conductivity type and a second semiconductor area of a second conductivity type. The first semiconductor area is electrically contacted with a first surface of the SiC body and forms a pn junction with the second semiconductor area. The first and second semiconductor areas are arranged on one another in a vertical direction perpendicular to the first surface. The first semiconductor area has first and second dopant species. An average dopant concentration of the first dopant species in a first part of the first semiconductor area adjoining the first surface is greater than an average dopant concentration of the second dopant species. An average dopant concentration of the second dopant species in a second part of the first semiconductor area adjoining the second semiconductor area is greater than a dopant concentration of the first dopant species.
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公开(公告)号:US11195874B2
公开(公告)日:2021-12-07
申请号:US16468441
申请日:2018-01-04
IPC分类号: H01L21/30 , H01L21/46 , H01L27/146 , G01T1/20 , H01L27/30
摘要: An image sensor array formed on a flexible first substrate is supported by a flexible second substrate attached thereto. The second substrate has a top surface with an adhesive thereon for attaching the substrates together. The adhesive is on a portion of the second substrate directly beneath the image sensor array to allow selective formation of the second substrate.
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公开(公告)号:US11031431B2
公开(公告)日:2021-06-08
申请号:US16497106
申请日:2018-02-15
发明人: Nobutoshi Fujii , Yoshiya Hagimoto
IPC分类号: H01L21/46 , H01L23/52 , H01L27/146 , H01L21/768 , H01L23/48 , H01L23/00 , H01L21/311
摘要: A semiconductor device including a plurality of substrates that is stacked, each of the substrates including a semiconductor substrate and a multi-layered wiring layer stacked on the semiconductor substrate, the semiconductor substrate having a circuit with a predetermined function formed thereon. Bonding surfaces between two substrates among the plurality of substrates have an electrode junction structure in which electrodes formed on the respective bonding surfaces are joined in direct contact with each other, the electrode junction structure being a structure for electrical connection between the two substrates. One of the electrode constituting the electrode junction structure or a via for connection of the electrode to a wiring line in the multi-layered wiring layer is provided with a porous film, in a partial region between an electrically-conductive material and a sidewall of a through hole filled with the electrically-conductive material, the electrically-conductive material constituting the electrode and the via.
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公开(公告)号:US10510579B2
公开(公告)日:2019-12-17
申请号:US15764763
申请日:2017-09-22
申请人: LG CHEM, LTD.
发明人: Hee Jung Kim , Jung Hak Kim , Kwang Joo Lee
IPC分类号: H01L21/301 , H01L21/46 , H01L21/78 , H01L21/683 , C09J133/14 , C09J11/04 , C09J11/08
摘要: The present invention relates to an adhesive resin composition for a semiconductor, including: a (meth)acrylate-based resin including a (meth)acrylate-based repeating unit containing an epoxy-based functional group and a (meth)acrylate-based repeating unit containing an aromatic functional group, the (meth)acrylate-based resin having a hydroxyl equivalent weight of 0.15 eq/kg or less; a curing agent including a phenol resin having a softening point of 100° C. or higher; and an epoxy resin, wherein the content of a (meth)acrylate-based functional group containing an aromatic functional group in the (meth)acrylate-based resin is 2 to 40% by weight, an adhesive film for a semiconductor including the above adhesive resin composition for a semiconductor, a dicing die bonding film including an adhesive layer including the adhesive film for a semiconductor, and a method for dicing a semiconductor wafer using the dicing die bonding film.
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公开(公告)号:US10438832B2
公开(公告)日:2019-10-08
申请号:US15951570
申请日:2018-04-12
IPC分类号: H01L31/062 , H01L31/113 , H01L29/788 , H01L21/30 , H01L21/46 , H01L21/28 , H01L21/44 , H01L21/683 , H01L21/304 , H01L23/31 , H01L21/78
摘要: A semiconductor device manufacturing method is disclosed. The semiconductor device manufacturing method includes: a preparation step of preparing a semiconductor wafer; a removal step of removing a thickness part of the semiconductor wafer; and a cutting step of cutting the semiconductor wafer. In the removal step, a rib-shaped portion partially raised on a second main surface of the semiconductor wafer is used as an alignment mark, so that a cutter can align with the semiconductor wafer.
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公开(公告)号:US10170447B2
公开(公告)日:2019-01-01
申请号:US15815777
申请日:2017-11-17
发明人: Wei Lin , Spyridon Skordas
IPC分类号: H01L21/30 , H01L21/46 , H01L23/00 , H01L25/00 , H01L21/683 , H01L21/02 , H01L21/56 , H01L25/065 , H01L21/677 , H01L21/67 , H01L21/78
摘要: A method and structure for forming a 3D chip stack using a vacuum chuck. The method may include: forming a first bonding layer on a first wafer and first chips, where the first chips are on a first substrate; forming a second bonding layer on a second wafer and second chips, where the second chips are on a second substrate; separating the second chips from the second wafer, wherein a portion of the second bonding layer remains on the second chips; moving the separated second chips to a cleaning chamber using a vacuum chuck; cleaning the separated second chips in the cleaning chamber; and bonding the second bonding layer on the separated second chips to the first bonding layer on the first chips.
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公开(公告)号:US10163869B2
公开(公告)日:2018-12-25
申请号:US15562411
申请日:2015-10-20
申请人: GOERTEK, INC.
发明人: Quanbo Zou , Zhe Wang
IPC分类号: H01L21/00 , H01L21/30 , H01L21/46 , H01L21/78 , H01L21/301 , H01L25/075 , H01L33/00 , H01L21/673 , H01L21/677 , B81C3/00
摘要: The present invention discloses a transferring method, a manufacturing method, a device and an electronics apparatus of micro-LED. The method for transferring micro-LED at wafer level comprises: temporarily bonding micro-LEDs on a laser-transparent original substrate onto a carrier substrate via a first bonding layer; irradiating the original substrate with laser, to lift-off selected micro-LEDs; performing a partial release on the first bonding layer, to transfer the selected micro-LEDs to the carrier substrate; temporarily bonding the micro-LEDs on the carrier substrate onto a transfer head substrate via a second bonding layer; performing a full release on the first bonding layer, to transfer the micro-LEDs to the transfer head substrate; bonding the micro-LEDs on the transfer head substrate onto a receiving substrate; and removing the transfer head substrate by releasing the second bonding layer, to transfer the micro-LEDs to the receiving substrate.
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公开(公告)号:US10109764B2
公开(公告)日:2018-10-23
申请号:US15705785
申请日:2017-09-15
申请人: X-Celeprint Limited
IPC分类号: H01L33/00 , H01L21/00 , H01L21/30 , H01L21/46 , H01L21/683 , H01L33/44 , H01L33/36 , H01L33/62
摘要: The present invention provides structures and methods that enable the construction of micro-LED chiplets formed on a sapphire substrate that can be micro-transfer printed. Such printed structures enable low-cost, high-performance arrays of electrically connected micro-LEDs useful, for example, in display systems. Furthermore, in an embodiment, the electrical contacts for printed LEDs are electrically interconnected in a single set of process steps. In certain embodiments, formation of the printable micro devices begins while the semiconductor structure remains on a substrate. After partially forming the printable micro devices, a handle substrate is attached to the system opposite the substrate such that the system is secured to the handle substrate. The substrate may then be removed and formation of the semiconductor structures is completed. Upon completion, the printable micro devices may be micro transfer printed to a destination substrate.
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