公开(公告)号：US20240355839A1

公开(公告)日：2024-10-24

申请号：US18758969

申请日：2024-06-28

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Atsushi Umezaki

IPC分类号： H01L27/12 ,  G06F3/041 ,  G09G3/20 ,  G11C19/28 ,  G11C27/04 ,  H01L21/8226 ,  H01L27/02 ,  H01L29/786

CPC分类号： H01L27/1255 ,  H01L27/124 ,  H01L29/7869 ,  G06F3/041 ,  G09G3/2092 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28 ,  G11C27/04 ,  H01L21/8226 ,  H01L27/0207 ,  H01L27/1225

摘要： The circuit includes a first transistor; a second transistor whose first terminal is connected to a gate of the first transistor for setting the potential of the gate of the first transistor to a level at which the first transistor is turned on; a third transistor for setting the potential of a gate of the second transistor to a level at which the second transistor is turned on and bringing the gate of the second transistor into a floating state; and a fourth transistor for setting the potential of the gate of the second transistor to a level at which the second transistor is turned off. With such a configuration, a potential difference between the gate and a source of the second transistor can be kept at a level higher than the threshold voltage of the second transistor, so that operation speed can be improved.

公开(公告)号：US12127446B2

公开(公告)日：2024-10-22

申请号：US17538465

申请日：2021-11-30

申请人： LG Display Co., Ltd.

发明人： SeongPil Cho ,  JunSeuk Lee ,  YongBin Kang ,  HeeJin Jung ,  Jangdae Kim ,  Dongyup Kim ,  WonHo Son ,  Chanho Kim

IPC分类号： H10K59/123 ,  H01L27/12 ,  H01L29/417 ,  H01L29/786 ,  H10K59/121 ,  H10K59/124

CPC分类号： H10K59/123 ,  H10K59/1213 ,  H10K59/124 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/78675 ,  H01L29/7869

摘要： A display device includes a substrate including a plurality of sub-pixels, a first buffer layer on the substrate, an etch stopper on the first buffer layer, a second buffer layer covering the first buffer layer, and a first transistor on the second buffer layer. The first transistor includes a source electrode and a drain electrode overlapping the etch stopper. The etch stopper includes a hole in which at least one of the source electrode and the drain electrode is disposed. The etch stopper is spaced apart from the source electrode and the drain electrode. Therefore, it is possible to prevent moisture and impurities from penetrating into a display device by protecting a buffer layer.

公开(公告)号：US12119406B2

公开(公告)日：2024-10-15

申请号：US17852423

申请日：2022-06-29

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Shunpei Yamazaki

IPC分类号： H01L29/786 ,  H01L27/12 ,  H01L29/49 ,  H01L29/78 ,  H10K10/46

CPC分类号： H01L29/7869 ,  H01L27/1251 ,  H01L29/4908 ,  H01L29/7831 ,  H01L29/786 ,  H01L29/78693 ,  H10K10/46 ,  H10K10/468 ,  H10K10/474 ,  H01L27/1225

摘要： The oxide semiconductor film has the top and bottom surface portions each provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film. An insulating film containing a different constituent from the metal oxide film and the oxide semiconductor film is further formed in contact with a surface of the metal oxide film, which is opposite to the surface in contact with the oxide semiconductor film. The oxide semiconductor film used for the active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by removing impurities such as hydrogen, moisture, a hydroxyl group, and hydride from the oxide semiconductor and supplying oxygen which is a major constituent of the oxide semiconductor and is simultaneously reduced in a step of removing impurities.

公开(公告)号：US12113074B2

公开(公告)日：2024-10-08

申请号：US18231830

申请日：2023-08-09

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei Yamazaki

IPC分类号： H01L27/12 ,  H01L21/02 ,  H01L29/10 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L27/1225 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1266 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.

公开(公告)号：US12108629B2

公开(公告)日：2024-10-01

申请号：US18508947

申请日：2023-11-14

申请人： LG Display Co., Ltd.

发明人： Dong-Young Kim ,  Kyoung-Nam Lim ,  Yu-Ho Jung

IPC分类号： H10K59/131 ,  G09G3/32 ,  G09G3/3266 ,  G09G3/3291 ,  H01L27/12 ,  H01L29/786 ,  H10K50/11 ,  H10K59/121 ,  H10K59/122 ,  H10K59/123 ,  H10K59/124 ,  H10K59/126 ,  H10K59/35 ,  H10K77/10 ,  H10K102/00

CPC分类号： H10K59/1213 ,  G09G3/3266 ,  G09G3/3291 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1244 ,  H01L27/1255 ,  H01L29/78633 ,  H10K50/11 ,  H10K59/1216 ,  H10K59/122 ,  H10K59/123 ,  H10K59/124 ,  H10K59/126 ,  H10K59/131 ,  H10K59/35 ,  H10K77/111 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2330/021 ,  H10K59/352 ,  H10K59/353 ,  H10K2102/341

摘要： Disclosed is a display device that is capable of being driven with low power consumption. A first thin-film transistor including a polycrystalline semiconductor layer and a second thin-film transistor including an oxide semiconductor layer are disposed in an active area, thereby reducing power consumption. At least one opening formed in a bending area is formed to have the same depth as any one of contact holes formed in the active area, thereby making it possible to form the opening and the contact holes through the same process and consequently simplifying the process of manufacturing the device. A second source electrode of the second thin-film transistor and a second gate electrode of the second thin-film transistor overlap each other with an upper interlayer insulation film interposed therebetween so as to form a first storage capacitor.

公开(公告)号：US12106729B2

公开(公告)日：2024-10-01

申请号：US18132554

申请日：2023-04-10

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Susumu Kawashima ,  Naoto Kusumoto

IPC分类号： G09G3/36 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/3225 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/34 ,  H01L27/12 ,  H01L29/24 ,  H01L29/786 ,  H04N23/57 ,  H10K59/121 ,  H10K59/131 ,  H10K59/65

CPC分类号： G09G3/3688 ,  G02F1/136213 ,  G02F1/13624 ,  G02F1/1368 ,  G09G3/3225 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/3413 ,  G09G3/3677 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/7869 ,  H10K59/1213 ,  H10K59/1216 ,  H10K59/131 ,  H10K59/65 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2300/0809 ,  G09G2320/0233 ,  G09G2320/0252 ,  G09G2330/021 ,  H04N23/57

摘要： A display device capable of improving image quality is provided. The display device includes a first circuit, a pixel, and a wiring. The first circuit has a function of supplying data to the wiring and a function of making the wiring floating to hold the data. The pixel has a function of taking in the data twice from the wiring and performing addition. The pixel can perform the first writing of the data in a period during which the data is supplied to the wiring, and can perform the second writing of the data in a period during which the data is held in the wiring. Therefore, by one lime of data charging to a source line, a data potential larger than or equal to an output voltage of a source driver can be supplied to a display element.

公开(公告)号：US20240321903A1

公开(公告)日：2024-09-26

申请号：US18678215

申请日：2024-05-30

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Masayuki SAKAKURA ,  Yoshiaki OIKAWA ,  Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA

IPC分类号： H01L27/12 ,  G02F1/1343 ,  G02F1/1345 ,  G02F1/1368

CPC分类号： H01L27/124 ,  G02F1/134309 ,  G02F1/13454 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/1255 ,  G02F2202/10

摘要： The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.

公开(公告)号：USRE50145E1

公开(公告)日：2024-09-24

申请号：US17839488

申请日：2022-06-14

申请人： BOE Technology Group Co., Ltd.

发明人： Wei Liu

IPC分类号： H01L21/00 ,  H01L27/12 ,  H10K59/126 ,  H10K59/131 ,  H10K71/00 ,  G02F1/1362 ,  G02F1/1368 ,  H10K59/12 ,  H10K102/10

CPC分类号： H01L27/1218 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1288 ,  H10K59/126 ,  H10K59/131 ,  H10K71/00 ,  G02F1/136209 ,  G02F1/1368 ,  G02F1/13685 ,  G02F2201/123 ,  H10K59/1201 ,  H10K2102/103

摘要： An array substrate and a manufacturing method thereof, a display panel and display device relating to display technology are provided. The array substrate includes: a substrate; a light shielding layer being of electrical conductive over the substrate; a buffer layer over the light shielding layer; an active layer insulated from the light shielding layer by the buffer layer and shielded by the light shielding layer against light radiation; a gate insulating layer disposed over the active layer; and a patterned first electrode layer having a first electrode over the gate insulating layer, the first electrode being a gate electrode; wherein the patterned first electrode layer further comprises a second electrode over the buffer layer, the second electrode having at least a portion in contact with the buffer layer. The buffer layer comprises a first via-hole, and the second electrode is in electrical connection with the light shielding layer through the first via-hole.

公开(公告)号：US12101946B2

公开(公告)日：2024-09-24

申请号：US18387921

申请日：2023-11-08

申请人： Micron Technology, Inc.

发明人： Kamal M. Karda ,  Yi Fang Lee ,  Haitao Liu ,  Durai Vishak Nirmal Ramaswamy ,  Ramanathan Gandhi ,  Karthik Sarpatwari ,  Scott E. Sills ,  Sameer Chhajed

IPC分类号： H10B99/00 ,  H01L27/092 ,  H01L27/12 ,  H01L29/24 ,  H01L29/267 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC分类号： H10B99/00 ,  H01L27/092 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1259 ,  H01L29/24 ,  H01L29/267 ,  H01L29/42392 ,  H01L29/66969 ,  H01L29/78642 ,  H01L29/7869

摘要： Some embodiments include an integrated assembly having a first semiconductor material between two regions of a second semiconductor material. The second semiconductor material is a different composition than the first semiconductor material. Hydrogen is diffused within the first and second semiconductor materials. The conductivity of the second semiconductor material increases in response to the hydrogen diffused therein to thereby create a structure having the second semiconductor material as source/drain regions, and having the first semiconductor material as a channel region between the source/drain regions. A transistor gate is adjacent the channel region and is configured to induce an electric field within the channel region. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US12100709B2

公开(公告)日：2024-09-24

申请号：US18480552

申请日：2023-10-04

申请人： Japan Display Inc.

发明人： Isao Suzumura ,  Kazufumi Watabe ,  Yoshinori Ishii ,  Hidekazu Miyake ,  Yohei Yamaguchi

IPC分类号： H01L27/12 ,  G02F1/133 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/24 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/786 ,  H10K59/121

CPC分类号： H01L27/1225 ,  G02F1/13306 ,  G02F1/136209 ,  G02F1/1368 ,  H01L27/1251 ,  H01L27/1259 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/78633 ,  H01L29/78675 ,  H01L29/7869 ,  G02F1/13685 ,  G02F2202/10 ,  G02F2202/104 ,  H10K59/1213

摘要： The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.