公开(公告)号：US11984417B2

公开(公告)日：2024-05-14

申请号：US17648309

申请日：2022-01-19

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor： Ling-Yi Chuang

IPC: H01L23/48 ,  H01L23/00

CPC classification number: H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L24/03 ,  H01L2224/0331 ,  H01L2224/03462 ,  H01L2224/05013 ,  H01L2224/05017 ,  H01L2224/05025 ,  H01L2224/05073 ,  H01L2224/05147 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05564 ,  H01L2224/05578 ,  H01L2224/05601 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05638 ,  H01L2224/08145 ,  H01L2224/08503 ,  H01L2224/8081

Abstract: The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a first chip and a second chip. A first conductive connection wire of the first chip is connected to a first conductive contact pad, and a second conductive connection wire of the second chip is connected to a second conductive contact pad. In addition, the first conductive contact pad includes a first conductor group and a second conductor group, and the second conductive contact pad includes a third conductor group and a fourth conductor group.

公开(公告)号：US09966348B2

公开(公告)日：2018-05-08

申请号：US15716534

申请日：2017-09-27

Applicant: Infineon Technologies AG

Inventor： Jens Peter Konrath ,  Jochen Hilsenbeck

IPC: H01L23/52 ,  H01L23/00

CPC classification number: H01L24/03 ,  B81C1/00 ,  H01L24/05 ,  H01L24/06 ,  H01L29/40 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/0381 ,  H01L2224/0383 ,  H01L2224/0391 ,  H01L2224/05017 ,  H01L2224/05025 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05582 ,  H01L2224/05601 ,  H01L2224/05613 ,  H01L2224/05624 ,  H01L2224/05638 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05663 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/06181 ,  H01L2924/01029 ,  H01L2924/01014 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01076 ,  H01L2924/0108

Abstract: According to various embodiments an electronic component includes: at least one electrically conductive contact region; a contact pad including a self-segregating composition disposed over the at least one electrically conductive contact region; a segregation suppression structure disposed between the contact pad and the at least one electrically conductive contact region, wherein the segregation suppression structure includes more nucleation inducing topography features than the at least one electrically conductive contact region for perturbing a chemical segregation of the self-segregating composition by crystallographic interfaces of the contact pad defined by the nucleation inducing topography features.

公开(公告)号：US20170125366A1

公开(公告)日：2017-05-04

申请号：US15275522

申请日：2016-09-26

Applicant: FUJITSU LIMITED

Inventor： Taiki Uemura ,  Seiki Sakuyama

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05639 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/29199 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20102 ,  H01L2924/20103 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/014

Abstract: An electronic device includes a first electronic part, a second electronic part opposite the first electronic part, and a bonding portion between the first electronic part and the second electronic part. The bonding portion contains a solder containing a substance whose crystal structure reversibly changes in temperature rise and fall processes which accompany the operation of the electronic device or electronic equipment including the electronic device. A change in the crystal structure of the substance contained in the solder promotes recovery and recrystallization of the solder in the temperature rise and fall processes which accompany the operation of the electronic device or the electronic equipment. As a result, the coarsening of crystal grains in the solder is suppressed.

公开(公告)号：US09397062B2

公开(公告)日：2016-07-19

申请号：US14585534

申请日：2014-12-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kuei-Wei Huang ,  Wei-Yu Chen ,  Meng-Tse Chen ,  Wei-Hung Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L21/56 ,  H01L25/03 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H01L23/48

CPC classification number: H01L25/105 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/538 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05557 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13564 ,  H01L2224/136 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1705 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81007 ,  H01L2224/81193 ,  H01L2224/831 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/00014

Abstract: The described embodiments of mechanisms of forming a die package and package on package (PoP) structure involve forming a solder paste layer over metal balls of external connectors of a die package. The solder paste layer protects the metal balls from oxidation. In addition, the solder paste layer enables solder to solder bonding with another die package. Further, the solder paste layer moves an intermetallic compound (IMC) layer formed between the solder paste layer and the metal balls below a surface of a molding compound of the die package. Having the IMC layer below the surface strengthens the bonding structure between the two die packages.

公开(公告)号：US09209112B2

公开(公告)日：2015-12-08

申请号：US14504957

申请日：2014-10-02

Applicant: Seiko Epson Corporation

Inventor： Hideo Imai

IPC: H01L23/48 ,  H01L23/00 ,  H01L25/07 ,  H01L21/768 ,  H01L25/065

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/562 ,  H01L25/0657 ,  H01L25/074 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05553 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06181 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/13007 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13144 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81895 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/01327 ,  H01L2924/00

Abstract: A first substrate with a penetration electrode formed thereon is stacked on a second substrate with a protruding electrode formed thereon. The penetration electrode has a recessed portion. The substrates are stacked with the protruding electrode entered in the recessed portion. A distal width of the protruding electrode is smaller than an opening width of the recessed portion.

Abstract translation: 在其上形成有穿透电极的第一基板层叠在其上形成有突出电极的第二基板上。 穿透电极具有凹部。 基板被突出电极堆叠在凹入部分中。 突出电极的前端宽度小于凹部的开口宽度。

公开(公告)号：US20150187723A1

公开(公告)日：2015-07-02

申请号：US14585534

申请日：2014-12-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kuei-Wei Huang ,  Wei-Yu Chen ,  Meng-Tse Chen ,  Wei-Hung Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/00

CPC classification number: H01L25/105 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/538 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05557 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13564 ,  H01L2224/136 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1705 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81007 ,  H01L2224/81193 ,  H01L2224/831 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/00014

Abstract: The described embodiments of mechanisms of forming a die package and package on package (PoP) structure involve forming a solder paste layer over metal balls of external connectors of a die package. The solder paste layer protects the metal balls from oxidation. In addition, the solder paste layer enables solder to solder bonding with another die package. Further, the solder paste layer moves an intermetallic compound (IMC) layer formed between the solder paste layer and the metal balls below a surface of a molding compound of the die package. Having the IMC layer below the surface strengthens the bonding structure between the two die packages.

Abstract translation: 形成模具封装和封装（PoP）结构的机构的所述实施例涉及在管芯封装的外部连接器的金属球上形成焊膏层。 焊膏层保护金属球免受氧化。 此外，焊膏层能够使焊料与另一个管芯封装焊接。 此外，焊膏层将形成在焊膏层和金属球之间的金属间化合物（IMC）层移动到模具封装的模塑料的表面下方。 使表面下方的IMC层增强了两个管芯封装之间的结合结构。

公开(公告)号：US20140197547A1

公开(公告)日：2014-07-17

申请号：US14212233

申请日：2014-03-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Jung Wei CHENG ,  Tsung-Ding WANG ,  Chien-Hsun LEE ,  Chun-Chih CHUANG

IPC: H01L25/065 ,  H01L23/00

CPC classification number: H01L24/81 ,  H01L21/56 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05557 ,  H01L2224/05571 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06155 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/85 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00012

Abstract: A method of forming a semiconductor device package includes removing a portion of a first connector and a molding compound surrounding the first connector to form an opening, wherein the first connector is part of a first package, and removing the portion of the first connector comprises forming a surface on the first connector which is at an angle with respect to a top surface of the molding compound. The method further includes placing a second connector in the opening, wherein the second connector is part of a second package having a semiconductor die. The method further includes bonding the second connector to a remaining portion of the first connector.

Abstract translation: 一种形成半导体器件封装的方法包括去除第一连接器的一部分和围绕第一连接器的模制化合物以形成开口，其中第一连接器是第一封装的一部分，并且移除第一连接器的部分包括成形 所述第一连接器上的表面相对于所述模塑料的顶表面成一角度。 该方法还包括将第二连接器放置在开口中，其中第二连接器是具有半导体管芯的第二封装的一部分。 该方法还包括将第二连接器接合到第一连接器的剩余部分。

公开(公告)号：US08779300B2

公开(公告)日：2014-07-15

申请号：US13355311

申请日：2012-01-20

Applicant: Shih-Ping Hsu

Inventor： Shih-Ping Hsu

IPC: H05K1/11 ,  H01L29/40 ,  H01L23/48 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L24/00 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/11849 ,  H01L2224/11903 ,  H01L2224/13006 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13171 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/351 ,  H05K1/0271 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/3473 ,  H05K3/4007 ,  H05K2201/0341 ,  H05K2201/0367 ,  H05K2201/099 ,  H05K2203/054 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552

Abstract: A packaging substrate with conductive structure is provided, including a substrate body having at least one conductive pad on a surface thereof, a stress buffer metal layer disposed on the conductive pad and a thickness of the stress buffer metal layer being 1-20 μm, a solder resist layer disposed on the substrate body and having at least one opening therein for correspondingly exposing a portion of top surface of the stress buffer metal layer, a metal post disposed on a central portion of the surface of the stress buffer metal layer, and a solder bump covering the surfaces of the metal post.

Abstract translation: 提供一种具有导电结构的封装基板，包括其表面上具有至少一个导电焊盘的基板主体，设置在导电焊盘上的应力缓冲金属层，应力缓冲金属层的厚度为1-20μm， 防焊层设置在基板主体上并且在其中具有至少一个开口，用于相应地暴露应力缓冲金属层的顶表面的一部分，设置在应力缓冲金属层的表面的中心部分上的金属柱，以及 焊料凸块覆盖金属柱的表面。

公开(公告)号：US20130168851A1

公开(公告)日：2013-07-04

申请号：US13484289

申请日：2012-05-31

Applicant: Yu-Min Lin ,  Chau-Jie Zhan ,  Tao-Chih Chang

Inventor： Yu-Min Lin ,  Chau-Jie Zhan ,  Tao-Chih Chang

IPC: H01L23/498 ,  H01L21/28

CPC classification number: H01L24/13 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05552 ,  H01L2224/05559 ,  H01L2224/05572 ,  H01L2224/05613 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05684 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/115 ,  H01L2224/11502 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/11906 ,  H01L2224/13076 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13171 ,  H01L2224/13184 ,  H01L2224/16145 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/16507 ,  H01L2224/81097 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2224/1146

Abstract: A bump structure includes a substrate, a pad, an electrode and a protruding electrode. The pad is disposed on the substrate. The electrode is formed by a first metal material and disposed on the pad. The protruding electrode is formed by a second metal material and disposed on the electrode, wherein a cross-sectional area of the protruding electrode is less than a cross-sectional area of the electrode.

Abstract translation: 凸块结构包括基板，焊盘，电极和突出电极。 衬垫设置在衬底上。 电极由第一金属材料形成并设置在焊盘上。 突起电极由第二金属材料形成并设置在电极上，其中突出电极的横截面面积小于电极的横截面面积。

公开(公告)号：US08269354B2

公开(公告)日：2012-09-18

申请号：US12908777

申请日：2010-10-20

Applicant: Wen-Hung Hu

Inventor： Wen-Hung Hu

IPC: H01L23/48

CPC classification number: H01L23/49811 ,  H01L23/498 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05568 ,  H01L2224/056 ,  H01L2224/05605 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05618 ,  H01L2224/0562 ,  H01L2224/05623 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05671 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/00

Abstract: A semiconductor package substrate structure and a manufacturing method thereof are disclosed. The structure includes a substrate having a plurality of electrical connecting pads formed on at least one surface thereof; a plurality of electroplated conductive posts each covering a corresponding one of the electrical connecting pads and an insulating protective layer formed on the surface of the substrate and having a revealing portion for exposing the electroplated conductive posts therefrom. The invention allows the interval between the electroplated conductive posts to be minimized, the generation of concentrated stresses and the overflow of underfill to be avoided, as well as the reduction of the overall height of the fabricated package.

Abstract translation: 公开了一种半导体封装基板结构及其制造方法。 该结构包括具有形成在其至少一个表面上的多个电连接焊盘的基板; 多个电镀导电柱，每个覆盖相应的一个电连接焊盘和形成在该基板的表面上的绝缘保护层，并且具有用于使电镀的导电柱露出的露出部分。 本发明允许电镀导电柱之间的间隔最小化，产生集中应力和避免底部填充物的溢出，以及制造的封装的整体高度的降低。