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    PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF
    2.
    发明申请
    PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF 审中-公开
    包装基板及其制造方法

    公开(公告)号：US20110056738A1

    公开(公告)日：2011-03-10

    申请号：US12554087

    申请日：2009-09-04

    Applicant: Wen Hung Hu

    Inventor： Wen Hung Hu

    IPC: H05K1/11 ,  G03F7/20 ,  B23K26/00 ,  C25D5/02

    CPC classification number: H05K3/4007 ,  H01L21/4853 ,  H01L23/49816 ,  H01L2924/0002 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/3473 ,  H05K3/3478 ,  H05K3/3484 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2201/09845 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/054 ,  H05K2203/1476 ,  H01L2924/00

    Abstract: A package substrate and a manufacturing method thereof are provided, including: forming a solder mask on a package substrate body having a plurality of conductive pads; forming a plurality of first-step openings in the solder mask by exposure and development; forming a plurality of second-step openings in the solder mask by a laser-based or plasma-based drilling process; and removing a solder mask foot from the bottom of each of the first-step openings so as to expose large surface areas of the conductive pads. Hence, the contact area between a conductive element and a corresponding one of the conductive pads is large enough to enhance bonding and electrical connection therebetween.

    Abstract translation: 提供一种封装基板及其制造方法，包括：在具有多个导电焊盘的封装基板主体上形成焊接掩模; 通过曝光和显影在焊料掩模中形成多个第一步骤的开口; 通过基于激光或基于等离子体的钻孔方法在所述焊接掩模中形成多个第二阶段开口; 并且从每个第一步骤开口的底部去除焊接掩模脚，以暴露导电焊盘的大的表面积。 因此，导电元件和对应的一个导电焊盘之间的接触面积足够大以增强它们之间的接合和电连接。

    Semiconductor package substrate
    4.
    发明授权
    Semiconductor package substrate 有权
    半导体封装基板

    公开(公告)号：US07705456B2

    公开(公告)日：2010-04-27

    申请号：US12276477

    申请日：2008-11-24

    Applicant: Wen-Hung Hu

    Inventor： Wen-Hung Hu

    IPC: H01L23/498

    CPC classification number: H01L23/49822 ,  H01L21/563 ,  H01L23/49894 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/12044 ,  H01L2924/00 ,  H01L2224/05599

    Abstract: A semiconductor package substrate includes a main body with a surface having a first circuit layer thereon and a dielectric layer covering the first circuit layer, with a plurality of vias on a portion of the first circuit layer; a plurality of first conductive vias disposed in the vias; a plurality of first electrically connecting pads on the first conductive vias and completely exposed on the dielectric layer having no extending circuits for a semiconductor chip to be mounted thereon, the first electrically connecting pad being electrically connected to the first circuit layer of the first conductive via; and an insulating protective layer disposed on the main body with an opening for completely exposing the first electrically connecting pads, whereby the circuit layout density is increased without disposing circuits between the electrically connecting pads.

    Abstract translation: 一种半导体封装基板，包括主体，其表面上具有第一电路层，覆盖第一电路层的电介质层，在第一电路层的一部分上具有多个通孔; 设置在通孔中的多个第一导电通孔; 在第一导电通孔上的多个第一电连接焊盘，并且完全暴露在电介质层上，没有用于要安装在其上的半导体芯片的延伸电路，第一电连接焊盘电连接到第一导电通孔的第一电路层 ; 以及绝缘保护层，其设置在主体上，具有用于完全暴露第一电连接焊盘的开口，由此在不设置电连接焊盘之间的电路的同时增加电路布局密度。

    SEMICONDUCTOR PACKAGE SUBSTRATE
    5.
    发明申请
    SEMICONDUCTOR PACKAGE SUBSTRATE 有权
    半导体封装基板

    公开(公告)号：US20090134515A1

    公开(公告)日：2009-05-28

    申请号：US12276477

    申请日：2008-11-24

    Applicant: Wen-Hung Hu

    Inventor： Wen-Hung Hu

    IPC: H01L23/498

    CPC classification number: H01L23/49822 ,  H01L21/563 ,  H01L23/49894 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/12044 ,  H01L2924/00 ,  H01L2224/05599

    Abstract: A semiconductor package substrate includes a main body with a surface having a first circuit layer thereon and a dielectric layer covering the first circuit layer, with a plurality of vias on a portion of the first circuit layer; a plurality of first conductive vias disposed in the vias; a plurality of first electrically connecting pads on the first conductive vias and completely exposed on the dielectric layer having no extending circuits for a semiconductor chip to be mounted thereon, the first electrically connecting pad being electrically connected to the first circuit layer of the first conductive via; and an insulating protective layer disposed on the main body with an opening for completely exposing the first electrically connecting pads, whereby the circuit layout density is increased without disposing circuits between the electrically connecting pads.

    Abstract translation: 一种半导体封装基板，包括主体，其表面上具有第一电路层，覆盖第一电路层的电介质层，在第一电路层的一部分上具有多个通孔; 设置在通孔中的多个第一导电通孔; 在第一导电通孔上的多个第一电连接焊盘，并且完全暴露在电介质层上，没有用于要安装在其上的半导体芯片的延伸电路，第一电连接焊盘电连接到第一导电通孔的第一电路层 ; 以及绝缘保护层，其设置在主体上，具有用于完全暴露第一电连接焊盘的开口，由此在不设置电连接焊盘之间的电路的同时增加电路布局密度。

    Method for fabricating electrically connecting structure of circuit board
    8.
    发明申请
    Method for fabricating electrically connecting structure of circuit board 审中-公开
    电路板电连接结构的制造方法

    公开(公告)号：US20060252248A1

    公开(公告)日：2006-11-09

    申请号：US11429882

    申请日：2006-05-08

    Applicant: Wen-Hung Hu

    Inventor： Wen-Hung Hu

    IPC: H01L21/44

    CPC classification number: H05K3/4007 ,  H05K3/045 ,  H05K3/243 ,  H05K3/28 ,  H05K2201/0367 ,  H05K2203/0353 ,  H05K2203/054 ,  H05K2203/0723

    Abstract: A method for fabricating an electrically connecting structure of a circuit board is proposed. An insulating protecting layer is formed on a circuit board having electrically connecting pads and has openings to expose the electrically connecting pads. A resist layer with openings corresponding to the electrically connecting pads is formed on a conductive layer formed on the insulating protecting layer. A metal layer is formed in the openings of the resist layer and fills the openings. The resist layer is removed. The metal layer and the conductive layer on the surface of the insulating protecting layer are removed by thinning processing, so as to form a metal bump. An adhesive layer is formed on an exposed surface of the metal bump, so as to form the electrically connecting structure for electrically connecting the circuit board to an external electronic device.

    Abstract translation: 提出了一种用于制造电路板的电连接结构的方法。 在具有电连接焊盘的电路板上形成绝缘保护层，并且具有露出电连接焊盘的开口。 在形成在绝缘保护层上的导电层上形成具有与电连接焊盘对应的开口的抗蚀剂层。 在抗蚀剂层的开口中形成金属层并填充开口。 去除抗蚀剂层。 绝缘保护层的表面上的金属层和导电层通过减薄处理被去除，从而形成金属凸块。 在金属凸块的暴露表面上形成粘合层，以形成用于将电路板电连接到外部电子设备的电连接结构。

    Method for fabricating conductive bump of circuit board
    9.
    发明申请
    Method for fabricating conductive bump of circuit board 有权
    电路板导电凸块的制造方法

    公开(公告)号：US20060051952A1

    公开(公告)日：2006-03-09

    申请号：US11079389

    申请日：2005-03-15

    Applicant: Shih-Ping Hsu ,  Sao-Hsia Tang ,  Ying-Tung Wang ,  Wen-Hung Hu ,  Chao-Wen Shih ,  Meng-Da Chou

    Inventor： Shih-Ping Hsu ,  Sao-Hsia Tang ,  Ying-Tung Wang ,  Wen-Hung Hu ,  Chao-Wen Shih ,  Meng-Da Chou

    IPC: H01L21/44

    CPC classification number: H05K3/3473 ,  H01L21/4853 ,  H01L23/49816 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H05K3/242 ,  H05K3/4602 ,  H05K2201/0352 ,  H05K2201/09436 ,  H05K2201/096 ,  H05K2203/043 ,  H05K2203/054 ,  H05K2203/0574 ,  H05K2203/1476 ,  H05K2203/1572 ,  H05K2203/1581 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    Abstract: A method for fabricating conductive bumps of a circuit board is proposed. First of all, a circuit board having a first surface and a corresponding second surface is provided. A circuit structure having a plurality of conductive pads is formed on each of the first surface and the second surface, and conductive structures are formed in the circuit board for electrically connecting the circuit structures. Also, an insulating layer having a plurality of openings penetrating therethrough is formed on the circuit board for exposing the conductive pad. Then, a conductive layer is formed on a surface of the insulating layer having the opening formed on the first surface of the circuit board. An electroplating process is performed via the conductive layer and the conductive structure, such that a conductive bump is formed on the conductive pad located on the second surface of the circuit board. Subsequently, a resist layer is formed on the second surface of the circuit board to cover the conductive bump, and another resist layer having openings penetrating therethrough is formed on the first surface of the circuit board to expose the conductive pad. Finally, a conductive bump is formed on the conductive pad located on the first surface of the circuit board by an electroplating process. By such arrangement, the conductive bumps are successively formed on the first surface and the second surface of the circuit board.

    Abstract translation: 提出了一种用于制造电路板的导电凸块的方法。 首先，提供具有第一表面和相应的第二表面的电路板。 在所述第一表面和所述第二表面中的每一个上形成具有多个导电焊盘的电路结构，并且在所述电路板中形成导电结构以电连接所述电路结构。 此外，在电路板上形成具有贯穿其中的多个开口的绝缘层，用于暴露导电焊盘。 然后，在具有形成在电路板的第一表面上的开口的绝缘层的表面上形成导电层。 通过导电层和导电结构进行电镀处理，使得在位于电路板的第二表面上的导电焊盘上形成导电凸块。 随后，在电路板的第二表面上形成抗蚀剂层以覆盖导电凸块，并且在电路板的第一表面上形成具有贯穿其中的开口的另一个抗蚀剂层，以露出导电焊盘。 最后，通过电镀工艺在位于电路板的第一表面上的导电焊盘上形成导电凸块。 通过这种布置，导电凸块依次形成在电路板的第一表面和第二表面上。

    Circuit board having electrically connecting structure and fabrication method thereof
    10.
    发明授权
    Circuit board having electrically connecting structure and fabrication method thereof 有权
    具有电连接结构的电路板及其制造方法

    公开(公告)号：US08188377B2

    公开(公告)日：2012-05-29

    申请号：US12229422

    申请日：2008-08-21

    Applicant: Wen-Hung Hu ,  Wen-Yuan Chi

    Inventor： Wen-Hung Hu ,  Wen-Yuan Chi

    IPC: H02B1/30

    CPC classification number: H05K1/111 ,  H05K1/113 ,  H05K3/108 ,  H05K3/243 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2201/09781 ,  Y02P70/611 ,  Y10T29/49147

    Abstract: A circuit board having an electrically connecting structure and a method for fabricating the same are provided. A circuit board body having inner-layer circuits is provided. A circuit layer is formed on at least an outermost surface of circuit board body, and including electrically connecting pads and circuits. The electrically connecting pads are partially electrically connected to the circuits, and are partially electrically connected to the inner-layer circuits via conductive vias. An insulating protective layer is disposed on the circuit board body and is formed with openings therein for exposing the electrically connecting pads. Conductive posts are formed on the electrically connecting pads. Standalone metal pads are formed on the insulating protective layer but are not used for electrical connection. The conductive posts and electrically connecting pads are absent from the insulating protective layer beneath the standalone metal pads, such that circuits can be formed under the insulating protective layer.

    Abstract translation: 提供具有电连接结构的电路板及其制造方法。 提供具有内层电路的电路板主体。 电路层形成在电路板主体的至少最外表面上，并且包括电连接焊盘和电路。 电连接焊盘部分地电连接到电路，并且经由导电通孔部分地电连接到内层电路。 绝缘保护层设置在电路板主体上，并在其中形成有用于暴露电连接焊盘的开口。 导电柱形成在电连接焊盘上。 独立的金属焊盘形成在绝缘保护层上，但不用于电连接。 在独立的金属焊盘之下的绝缘保护层中不存在导电柱和电连接焊盘，使得电路可以形成在绝缘保护层下面。

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