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公开(公告)号:US20240105667A1
公开(公告)日:2024-03-28
申请号:US18263000
申请日:2022-01-25
CPC分类号: H01L24/45 , C22C21/00 , C22F1/002 , C22F1/04 , H01L24/05 , H01L24/48 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/85 , H01L2224/05073 , H01L2224/05124 , H01L2224/05138 , H01L2224/05573 , H01L2224/05647 , H01L2224/05655 , H01L2224/05663 , H01L2224/05666 , H01L2224/05684 , H01L2224/06181 , H01L2224/29139 , H01L2224/32225 , H01L2224/32245 , H01L2224/45105 , H01L2224/45124 , H01L2224/45138 , H01L2224/4516 , H01L2224/45172 , H01L2224/4801 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48245 , H01L2224/73265 , H01L2224/85205 , H01L2924/01005 , H01L2924/01014 , H01L2924/0132 , H01L2924/0133 , H01L2924/0134 , H01L2924/0135 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/13055 , H01L2924/13091
摘要: An aluminum wire with which, at the time of bonding a bonding wire for a power semiconductor, the wire is not detached from a wedge tool, and a long life is achieved in a power cycle test. The aluminum wire is made of an aluminum alloy having an aluminum purity of 99 mass % or more and contains, relative to a total amount of all elements of the aluminum alloy, a total of 0.01 mass % or more and 1 mass % or less of iron and silicon. In a lateral cross-section in a direction perpendicular to a wire axis of the aluminum wire, an orientation index of is 1 or more, an orientation index of is 1 or less, and an area ratio of precipitated particles is in a range of 0.02% or more to 2% or less.
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公开(公告)号:US20240153900A1
公开(公告)日:2024-05-09
申请号:US18053290
申请日:2022-11-07
发明人: SHENG-FU HUANG , SHING-YIH SHIH
IPC分类号: H01L23/00
CPC分类号: H01L24/08 , H01L24/05 , H01L24/80 , H01L2224/0215 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/05663 , H01L2224/05673 , H01L2224/05676 , H01L2224/05678 , H01L2224/0568 , H01L2224/05684 , H01L2224/08145 , H01L2224/80379 , H01L2224/80895 , H01L2224/80896
摘要: A semiconductor device structure and method for manufacturing the same are provided. The semiconductor device structure includes a substrate, a dielectric structure, a pad, a conductive structure, and a buffer structure. The dielectric structure is disposed on the substrate. The pad is embedded in the dielectric structure. The conductive structure is disposed on the pad. The buffer structure is disposed on the pad and separates the conductive structure from the dielectric structure. A coefficient of thermal expansion (CTE) of the buffer structure ranges between a CTE of the dielectric structure and a CTE of the conductive structure.
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公开(公告)号:US09966348B2
公开(公告)日:2018-05-08
申请号:US15716534
申请日:2017-09-27
CPC分类号: H01L24/03 , B81C1/00 , H01L24/05 , H01L24/06 , H01L29/40 , H01L2224/0345 , H01L2224/03462 , H01L2224/03464 , H01L2224/03612 , H01L2224/03614 , H01L2224/0381 , H01L2224/0383 , H01L2224/0391 , H01L2224/05017 , H01L2224/05025 , H01L2224/05155 , H01L2224/05166 , H01L2224/05557 , H01L2224/05558 , H01L2224/05582 , H01L2224/05601 , H01L2224/05613 , H01L2224/05624 , H01L2224/05638 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05663 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/05673 , H01L2224/06181 , H01L2924/01029 , H01L2924/01014 , H01L2924/00012 , H01L2924/00014 , H01L2924/01076 , H01L2924/0108
摘要: According to various embodiments an electronic component includes: at least one electrically conductive contact region; a contact pad including a self-segregating composition disposed over the at least one electrically conductive contact region; a segregation suppression structure disposed between the contact pad and the at least one electrically conductive contact region, wherein the segregation suppression structure includes more nucleation inducing topography features than the at least one electrically conductive contact region for perturbing a chemical segregation of the self-segregating composition by crystallographic interfaces of the contact pad defined by the nucleation inducing topography features.
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公开(公告)号:US09583453B2
公开(公告)日:2017-02-28
申请号:US13906317
申请日:2013-05-30
申请人: Ormet Circuits, Inc.
IPC分类号: H01L23/00 , H01L21/683
CPC分类号: H01L24/27 , H01L21/6836 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/83 , H01L24/92 , H01L24/94 , H01L2221/68327 , H01L2224/04026 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05663 , H01L2224/05664 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/05678 , H01L2224/06181 , H01L2224/27003 , H01L2224/2731 , H01L2224/27318 , H01L2224/2732 , H01L2224/27334 , H01L2224/27438 , H01L2224/278 , H01L2224/27848 , H01L2224/2929 , H01L2224/29301 , H01L2224/29305 , H01L2224/29309 , H01L2224/29311 , H01L2224/29313 , H01L2224/29314 , H01L2224/29316 , H01L2224/29317 , H01L2224/29318 , H01L2224/2932 , H01L2224/29324 , H01L2224/29338 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/29349 , H01L2224/29355 , H01L2224/29357 , H01L2224/2936 , H01L2224/29363 , H01L2224/29364 , H01L2224/29369 , H01L2224/29371 , H01L2224/29373 , H01L2224/2938 , H01L2224/2939 , H01L2224/2949 , H01L2224/29499 , H01L2224/30181 , H01L2224/3201 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/325 , H01L2224/32503 , H01L2224/32507 , H01L2224/83447 , H01L2224/83825 , H01L2224/8384 , H01L2224/83856 , H01L2224/83862 , H01L2224/92 , H01L2224/94 , H01L2924/01322 , H01L2924/10253 , H01L2924/15747 , H01L2924/00 , H01L2924/00014 , H01L2924/00012 , H01L2924/01004 , H01L2924/01048 , H01L2924/01052 , H01L2924/0108 , H01L2924/01034 , H01L2924/01084 , H01L2924/01076 , H01L2224/27 , H01L21/78 , H01L2224/83 , H01L2924/01005 , H01L2924/01015 , H01L2224/27436 , H01L2221/68381
摘要: Sintering die-attach materials provide a lead-free solution for semiconductor packages with superior electrical, thermal and mechanical performance to prior art alternatives. Wafer-applied sintering materials form a metallurgical bond to both semiconductor die and adherends as well as throughout the die-attach joint and do not remelt at the original process temperature. Application to either one or both sides of the wafer, as well as paste a film application are disclosed.
摘要翻译: 烧结芯片附着材料为现有技术的替代品提供了具有出色的电,热和机械性能的半导体封装的无铅解决方案。 晶片施加的烧结材料在半导体裸片和被粘物以及整个芯片附着接头处形成冶金结合,并且不会在原始工艺温度下重熔。 公开了应用于晶片的一侧或两侧以及粘贴薄膜应用。
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公开(公告)号:US20240234354A1
公开(公告)日:2024-07-11
申请号:US18542032
申请日:2023-12-15
发明人: HO-MING TONG , WEI YEN , CHAO-CHUN LU
CPC分类号: H01L24/08 , H01L24/05 , H01L24/80 , H01L25/167 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05163 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05172 , H01L2224/05173 , H01L2224/05176 , H01L2224/05178 , H01L2224/0518 , H01L2224/05181 , H01L2224/05184 , H01L2224/05609 , H01L2224/05611 , H01L2224/05613 , H01L2224/05616 , H01L2224/05618 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05663 , H01L2224/08145 , H01L2224/80224 , H01L2224/80895 , H01L2224/80896
摘要: A semiconductor package is provided. The semiconductor package includes a first die having a plurality of first metal pads at a first bonding side and a second die over the first die, having a plurality of second metal pads at a second bonding side facing the first bonding side. Each of the first metal pads corresponds to each of the second metal pads with a pitch no greater than about 10 μm. The semiconductor package further includes a first dielectric layer surrounding and in contact with a sidewall of the first metal pads and a second dielectric layer surrounding and in contact with a sidewall of the second metal pads. A method for manufacturing a semiconductor package is also provided.
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公开(公告)号:US20240014165A1
公开(公告)日:2024-01-11
申请号:US17860119
申请日:2022-07-08
发明人: WU-DER YANG
CPC分类号: H01L24/48 , H01L23/3128 , H01L2224/48227 , H01L2224/48992 , H01L2224/48997 , H01L2224/48091 , H01L2224/05647 , H01L2224/05684 , H01L2224/05639 , H01L2224/05644 , H01L2224/05676 , H01L2224/05678 , H01L2224/05655 , H01L2224/05663 , H01L2224/05673 , H01L2224/05624 , H01L2224/0568 , H01L2224/05657 , H01L24/05 , H01L2224/45147 , H01L2224/45139 , H01L2224/45144 , H01L2224/45155 , H01L2224/45124 , H01L24/45 , H01L2224/85399 , H01L24/85 , H01L2224/32225 , H01L24/32 , H01L2224/73265 , H01L24/73
摘要: A semiconductor device and method for manufacturing the same are provided. The semiconductor device includes a substrate, an electronic component, a bonding wire, and a fixing feature. The electronic component is disposed on the substrate. The bonding wire includes a first terminal connected to the electronic component and a second terminal connected to the substrate. The fixing feature is disposed on the substrate. The bonding wire is at least partially disposed on the fixing feature.
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公开(公告)号:US20170317468A1
公开(公告)日:2017-11-02
申请号:US15652177
申请日:2017-07-17
申请人: SpectraSensors, Inc.
CPC分类号: H01S5/02272 , H01L24/03 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2224/0383 , H01L2224/04026 , H01L2224/05573 , H01L2224/05624 , H01L2224/05663 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/0567 , H01L2224/0568 , H01L2224/05681 , H01L2224/05684 , H01L2224/05686 , H01L2224/29109 , H01L2224/29111 , H01L2224/29139 , H01L2224/29144 , H01L2224/32245 , H01L2224/83801 , H01L2924/12042 , H01L2924/15747 , H01S5/02212 , H01S5/0425 , H01L2924/04941 , H01L2924/01022 , H01L2924/053 , H01L2924/049 , H01L2924/00014 , H01L2924/01032 , H01L2924/01014 , H01L2924/014 , H01L2924/0105 , H01L2924/01029 , H01L2924/01082 , H01L2924/00
摘要: A first contact surface of a semiconductor laser chip can be formed to a target surface roughness selected to have a maximum peak to valley height that is substantially smaller than a barrier layer thickness. A barrier layer that includes a non-metallic, electrically-conducting compound and that has the barrier layer thickness can be applied to the first contact surface, and the semiconductor laser chip can be soldered to a carrier mounting along the first contact surface using a solder composition by heating the soldering composition to less than a threshold temperature at which dissolution of the barrier layer into the soldering composition occurs. Related systems, methods, articles of manufacture, and the like are also described.
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公开(公告)号:US20140131898A1
公开(公告)日:2014-05-15
申请号:US13906317
申请日:2013-05-30
申请人: Ormet Circuits, Inc.
IPC分类号: H01L23/00
CPC分类号: H01L24/27 , H01L21/6836 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/30 , H01L24/32 , H01L24/83 , H01L24/92 , H01L24/94 , H01L2221/68327 , H01L2224/04026 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05663 , H01L2224/05664 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/05678 , H01L2224/06181 , H01L2224/27003 , H01L2224/2731 , H01L2224/27318 , H01L2224/2732 , H01L2224/27334 , H01L2224/27438 , H01L2224/278 , H01L2224/27848 , H01L2224/2929 , H01L2224/29301 , H01L2224/29305 , H01L2224/29309 , H01L2224/29311 , H01L2224/29313 , H01L2224/29314 , H01L2224/29316 , H01L2224/29317 , H01L2224/29318 , H01L2224/2932 , H01L2224/29324 , H01L2224/29338 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/29349 , H01L2224/29355 , H01L2224/29357 , H01L2224/2936 , H01L2224/29363 , H01L2224/29364 , H01L2224/29369 , H01L2224/29371 , H01L2224/29373 , H01L2224/2938 , H01L2224/2939 , H01L2224/2949 , H01L2224/29499 , H01L2224/30181 , H01L2224/3201 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/325 , H01L2224/32503 , H01L2224/32507 , H01L2224/83447 , H01L2224/83825 , H01L2224/8384 , H01L2224/83856 , H01L2224/83862 , H01L2224/92 , H01L2224/94 , H01L2924/01322 , H01L2924/10253 , H01L2924/15747 , H01L2924/00 , H01L2924/00014 , H01L2924/00012 , H01L2924/01004 , H01L2924/01048 , H01L2924/01052 , H01L2924/0108 , H01L2924/01034 , H01L2924/01084 , H01L2924/01076 , H01L2224/27 , H01L21/78 , H01L2224/83 , H01L2924/01005 , H01L2924/01015 , H01L2224/27436 , H01L2221/68381
摘要: Sintering die-attach materials provide a lead-free solution for semiconductor packages with superior electrical, thermal and mechanical performance to prior art alternatives. Wafer-applied sintering materials form a metallurgical bond to both semiconductor die and adherends as well as throughout the die-attach joint and do not remelt at the original process temperature. Application to either one or both sides of the wafer, as well as paste a film application are disclosed.
摘要翻译: 烧结芯片附着材料为现有技术的替代品提供了具有出色的电,热和机械性能的半导体封装的无铅解决方案。 晶片施加的烧结材料在半导体裸片和被粘物以及整个芯片附着接头处形成冶金结合,并且不会在原始工艺温度下重熔。 公开了应用于晶片的一侧或两侧以及粘贴薄膜应用。
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公开(公告)号:US20230343734A1
公开(公告)日:2023-10-26
申请号:US18305149
申请日:2023-04-21
IPC分类号: H01L23/00
CPC分类号: H01L24/05 , H01L24/03 , H01L24/08 , H01L2224/05547 , H01L2224/05571 , H01L2224/05611 , H01L2224/05609 , H01L2224/05663 , H01L2924/01005 , H01L2224/05647 , H01L2224/05655 , H01L2224/05657 , H01L2224/05684 , H01L2224/0567 , H01L2224/0568 , H01L2924/0132 , H01L2224/05666 , H01L2224/05681 , H01L2224/05555 , H01L2224/05557 , H01L2224/05111 , H01L2224/05026 , H01L2224/05073 , H01L2224/05109 , H01L2224/05147 , H01L2224/05157 , H01L2224/05155 , H01L2224/0517 , H01L2224/05172 , H01L2224/0518 , H01L2224/05184 , H01L2224/05163 , H01L2224/03614 , H01L2224/03464 , H01L2224/03452 , H01L2224/03845 , H01L2224/08059 , H01L2224/08145 , H01L24/80 , H01L2224/80895
摘要: An element, a bonded structure including the element, and a method forming the element and the bonded structure are disclosed. The element can include a non-conductive region having a cavity. The element can include a conductive feature formed in the cavity. The conductive feature includes a center portion and an edge portion having first and second coefficients of thermal expansion respectively. The center and edge portions are recessed relative to a contact surface of the non-conductive region by a first depth and a second depth respectively. The first coefficient of thermal expansion can be at least 5% greater than the second coefficient of thermal expansion. The bonded structure can include the element and a second element having a second non-conductive region and a second conductive feature. A conductive interface between the first and second conductive features has a center region and an edge region. In a side cross-section of the bonded structure, there are more voids at or near the edge region than at or near the center region.
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公开(公告)号:US20230154885A1
公开(公告)日:2023-05-18
申请号:US18049428
申请日:2022-10-25
发明人: Jinyoung Kim , Jiyeong Kim , Okseon Yoon
CPC分类号: H01L24/73 , H01L21/563 , H01L23/295 , H01L24/16 , H01L24/29 , H01L24/32 , H01L25/18 , H01L25/50 , H01L24/05 , H01L24/13 , H01L2224/0567 , H01L2224/0568 , H01L2224/1317 , H01L2224/1318 , H01L2224/2929 , H01L2224/05609 , H01L2224/05611 , H01L2224/05613 , H01L2224/05616 , H01L2224/05617 , H01L2224/05618 , H01L2224/05624 , H01L2224/05638 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05649 , H01L2224/05655 , H01L2224/05657 , H01L2224/05663 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/05673 , H01L2224/05676 , H01L2224/05681 , H01L2224/05683 , H01L2224/05684 , H01L2224/05686 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13117 , H01L2224/13118 , H01L2224/13124 , H01L2224/13138 , H01L2224/13139 , H01L2224/13144 , H01L2224/13149 , H01L2224/13155 , H01L2224/13157 , H01L2224/13163 , H01L2224/13164 , H01L2224/13166 , H01L2224/13169 , H01L2224/13173 , H01L2224/13176 , H01L2224/13181 , H01L2224/13183 , H01L2224/13184 , H01L2224/13186 , H01L2224/16146 , H01L2224/29386 , H01L2224/32145 , H01L2224/73204
摘要: A semiconductor package includes a first semiconductor chip on a lower structure. A first underfill is between the first semiconductor chip and the lower structure. The first underfill includes a first portion adjacent to a center region of the first semiconductor chip, and a second portion adjacent to an edge region of the first semiconductor chip. The second portion has a higher degree of cure than the first portion. A plurality of inner connection terminals is between the first semiconductor chip and the lower structure. The plurality of inner connection terminals extends in the first underfill.
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