公开(公告)号：US20250029945A1

公开(公告)日：2025-01-23

申请号：US18909194

申请日：2024-10-08

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHING-YIH SHIH ,  CHIH-CHING LIN

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/48 ,  H01L23/528 ,  H01L23/535

Abstract: The present application provides a semiconductor structure having vias with different dimensions and a manufacturing method of the semiconductor structure. The semiconductor structure includes a first wafer including a first substrate, a first dielectric layer over the first substrate, and a first conductive pad surrounded by the first dielectric layer; a second wafer including a second dielectric layer, a second substrate over the second dielectric layer, and a second conductive pad surrounded by the second dielectric layer; a passivation disposed over the second substrate; a first conductive via extending from the first conductive pad through the second wafer and the passivation, and having a first width surrounded by the second wafer; and a second conductive via extending from the second conductive pad through the passivation and the second substrate and partially through the second dielectric layer, and having a second width surrounded by the second wafer.

公开(公告)号：US20220238487A1

公开(公告)日：2022-07-28

申请号：US17158337

申请日：2021-01-26

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHING-YIH SHIH

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/498 ,  H01L21/48 ,  H01L25/00

Abstract: The present application discloses a semiconductor device with a heat dissipation unit and a method for fabricating the semiconductor device. The semiconductor device includes a die stack, an intervening bonding layer positioned on the die stack, and a carrier structure including a carrier substrate positioned on the intervening bonding layer, and through semiconductor vias positioned in the carrier substrate and on the intervening bonding layer for thermally conducting heat.

公开(公告)号：US20220077071A1

公开(公告)日：2022-03-10

申请号：US17526158

申请日：2021-11-15

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHING-YIH SHIH

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a conductive feature, a redistribution layer, at least one through silicon via and at least one bump. The conductive feature is disposed over a front surface of the substrate, and the redistribution layer is disposed over a back surface opposite to the front surface. The through silicon via penetrates through the substrate and contacts the conductive feature embedded in an insulative layer. The bump contacts the redistribution layer and the through silicon via and serves as an electrical connection therebetween.

公开(公告)号：US20210257304A1

公开(公告)日：2021-08-19

申请号：US16793069

申请日：2020-02-18

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHING-YIH SHIH

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56

Abstract: The present disclosure provides a semiconductor device and a method of manufacturing a semiconductor device. The semiconductor device includes a substrate, a conductive feature, a redistribution layer, at least one through silicon via and at least one bump. The conductive feature is disposed over a front surface of the substrate, and the redistribution layer is disposed over a back surface opposite to the front surface. The through silicon via penetrates through the substrate and contacts the conductive feature embedded in an insulative layer. The bump contacts the redistribution layer and the through silicon via and serves as an electrical connection therebetween.

公开(公告)号：US20210249354A1

公开(公告)日：2021-08-12

申请号：US16787367

申请日：2020-02-11

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHING-YIH SHIH

IPC: H01L23/532 ,  H01L23/528

Abstract: The present disclosure provides a semiconductor structure and a method for preparing the semiconductor structure. The semiconductor device structure includes: a first conductive structure and a second conductive structure disposed at different vertical heights over a semiconductor substrate; a first conductive plug and a second conductive plug correspondingly disposed over the first conductive structure and the second conductive structure; a first spacer disposed on a sidewall surface of the first conductive plug; an etch stop layer disposed over the semiconductor substrate, wherein the etch stop layer adjoins the first spacer; and a first inter-layer dielectric (ILD) layer disposed over the etch stop layer and next to the first conductive plug, wherein the first ILD layer is separated from the first spacer by an air gap.

公开(公告)号：US20210028121A1

公开(公告)日：2021-01-28

申请号：US16520623

申请日：2019-07-24

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHING-YIH SHIH ,  TSE-YAO HUANG

IPC: H01L23/552 ,  H01L23/48 ,  H01L23/00

Abstract: The present disclosure provides a semiconductor structure, including a substrate having a front surface and a back surface, at least one semiconductor device, a first TSV disposed in the substrate, an insulating layer surrounding the first TSV, a shielding layer surrounding the insulating layer, and a second TSV adjacent to the first TSV. The semiconductor device is disposed in a device region of the substrate. The first TSV is exposed by the front surface and the back surface of the substrate. The insulating layer includes an electrically insulating material. The shielding layer includes an electrically conductive material coupled to ground through a ground layer. The second TSV is exposed by the front surface and the back surface of the substrate.

公开(公告)号：US20240021528A1

公开(公告)日：2024-01-18

申请号：US18196542

申请日：2023-05-12

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHING-YIH SHIH

IPC: H01L23/538 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L23/5385 ,  H01L25/50 ,  H01L25/0652 ,  H01L23/5386 ,  H01L25/18 ,  H01L24/08

Abstract: The present application provides a semiconductor package structure having interconnections between dies, and a manufacturing method of the semiconductor package structure. The semiconductor package structure includes a first interposer including a first substrate and a first interconnect layer over the first substrate; a second interposer disposed over the first interposer, wherein the second interposer includes a second substrate and a second interconnect layer over the second substrate; a first die disposed over the first interposer and adjacent to the second interposer; a second die disposed over the second interposer; a first molding disposed over the second interposer and surrounding the second die; and a second molding disposed over the first interposer and surrounding the first die and the first molding, wherein the first interconnect layer includes a first communication member electrically connecting the first die to the second interposer and the second die.

公开(公告)号：US20230110531A1

公开(公告)日：2023-04-13

申请号：US17497754

申请日：2021-10-08

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHING-YIH SHIH

IPC: H01L23/00 ,  H01L21/56

Abstract: A method for fabricating a semiconductor device includes providing a base wafer comprising a scribing portion; bonding a first stacked die and a second stacked die onto a front surface of the base wafer through a hybrid bonding process; conformally forming a re-fill layer to cover the first stacked die and the second stacked die; forming a first molding layer to cover the re-fill layer and configure an intermediate semiconductor device comprising the base wafer, the first stacked die, the second stacked die, the re-fill layer, and the first molding layer; and dicing the intermediate semiconductor device along the scribing portion to separate the first stacked die and the second stacked die, the re-fill layer, the first molding layer, and the base wafer.

公开(公告)号：US20220285240A1

公开(公告)日：2022-09-08

申请号：US17751953

申请日：2022-05-24

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： TSE-YAO HUANG ,  SHING-YIH SHIH

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/48 ,  H01L21/768 ,  H01L23/00 ,  H01L25/18

Abstract: The present disclosure provides a method for fabricating a semiconductor device including performing a bonding process to bond a second die onto a first die, forming a first mask layer on the second die, forming a first opening along the first mask layer and the second die, and extending to the first die, forming isolation layers on sidewalls of the first opening, forming protection layers covering upper portions of the isolation layers, and forming a conductive filler layer in the first opening.

公开(公告)号：US20220278078A1

公开(公告)日：2022-09-01

申请号：US17746030

申请日：2022-05-17

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： SHING-YIH SHIH

IPC: H01L25/065 ,  H01L25/00 ,  H01L25/18 ,  H01L23/498 ,  H01L21/48

Abstract: The present application provides a method for fabricating a semiconductor device. The method includes providing a carrier substrate, forming through semiconductor vias in the carrier substrate for thermally conducting heat, forming a bonding layer on the carrier substrate, providing a first die structure including through semiconductor vias, forming an intervening bonding layer on the first die structure, bonding the first die structure onto the bonding layer through the intervening bonding layer, and bonding a second die structure onto the first die structure. The carrier substrate, the through semiconductor vias, and the bonding layer together configure a carrier structure. The second die structure and the first die structure are electrically coupled by the through semiconductor vias.