公开(公告)号：US09853005B2

公开(公告)日：2017-12-26

申请号：US14792461

申请日：2015-07-06

申请人： Renesas Electronics Corporation

发明人： Takehiko Maeda ,  Akira Yajima ,  Satoshi Itou ,  Fumiyoshi Kawashiro

IPC分类号： H01L23/48 ,  H01L23/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/06 ,  H01L24/08 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05582 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/05684 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48505 ,  H01L2224/48799 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01008 ,  H01L2924/01074

摘要： An improvement is achieved in the reliability of a semiconductor device. Over a semiconductor substrate, an interlayer insulating film is formed and, over the interlayer insulating film, a pad is formed. Over the interlayer insulating film, an insulating film is formed so as to cover the pad. In the insulating film, an opening is formed to expose a part of the pad. The pad is a pad to which a copper wire is to be electrically coupled and which includes an Al-containing conductive film containing aluminum as a main component. Over the Al-containing conductive film in a region overlapping the opening in plan view, a laminated film including a barrier conductor film, and a metal film over the barrier conductor film is formed. The metal film is in an uppermost layer. The barrier conductor film is a single-layer film or a laminated film including one or more layers of films selected from the group consisting of a Ti film, a TiN film, a Ta film, a TaN film, a W film, a WN film, a TiW film, and a TaW film. The metal film is made of one or more metals selected from the group consisting of Pd, Au, Ru, Rh, Pt, and Ir.

公开(公告)号：US20170365567A1

公开(公告)日：2017-12-21

申请号：US15369518

申请日：2016-12-05

申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.

发明人： Yun Bog KIM ,  Mi Jin PARK ,  Yeon Seop YU ,  Shang Hoon SEO

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/538

CPC分类号： H01L24/05 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/20 ,  H01L2224/0235 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05569 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05663 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/20 ,  H01L2224/73204 ,  H01L2924/15153 ,  H01L2924/171 ,  H05K1/186

摘要： A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface and an inactive surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; and a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip, wherein the first interconnection member and the second interconnection member each include a redistribution layer electrically connected to the connection pads, the semiconductor chip includes a passivation layer having openings exposing at least portions of the connection pads, the redistribution layer of the second interconnection member is connected to the connection pad through a via, a metal layer is disposed between the connection pad and the via, and the metal layer covers at least a portion of the connection pad.

公开(公告)号：US09607954B2

公开(公告)日：2017-03-28

申请号：US15154954

申请日：2016-05-14

申请人： Renesas Electronics Corporation

发明人： Akira Yajima

IPC分类号： H01L21/66 ,  H01L23/00

CPC分类号： H01L24/02 ,  G11C29/06 ,  G11C29/50016 ,  G11C29/56016 ,  G11C2029/0403 ,  G11C2029/5602 ,  H01L22/14 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03831 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/0558 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/119 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2924/1437 ,  H01L2924/1438 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/01028 ,  H01L2924/00014 ,  H01L2224/0231 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/03848 ,  H01L22/10 ,  H01L22/12 ,  H01L21/78 ,  H01L2924/00012

摘要： Object is to prevent a coupling failure between a rewiring and a coupling member for coupling to outside. A passivation film and a first polyimide film are formed so as to cover a wiring layer. A first opening portion is formed in the first polyimide film. A rewiring is formed on the first polyimide film so as to be coupled to the wiring layer via the first opening portion. A second polyimide film that covers the rewiring and has a second opening portion communicated with the rewiring is formed. A palladium film is formed as a barrier film by sputtering on a portion of the surface of the rewiring at which the second opening portion exists. A solder ball is coupled to the palladium film.

公开(公告)号：US09013002B1

公开(公告)日：2015-04-21

申请号：US13534745

申请日：2012-06-27

申请人： David James Spry

发明人： David James Spry

IPC分类号： H01L21/70 ,  H01L23/485 ,  H01L21/768

CPC分类号： H01L23/485 ,  H01L21/76895 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0345 ,  H01L2224/03848 ,  H01L2224/04042 ,  H01L2224/0558 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05678 ,  H01L2224/05681 ,  H01L2224/45144 ,  H01L2224/45169 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/48678 ,  H01L2224/48681 ,  H01L2924/10272 ,  H01L2924/14 ,  H01L2924/01014 ,  H01L2924/00

摘要： An iridium interfacial stack (“IrIS”) and a method for producing the same are provided. The IrIS may include ordered layers of TaSi2, platinum, iridium, and platinum, and may be placed on top of a titanium layer and a silicon carbide layer. The IrIS may prevent, reduce, or mitigate against diffusion of elements such as oxygen, platinum, and gold through at least some of its layers.

摘要翻译： 提供铱界面叠层（“IrIS”）及其制造方法。 IrIS可以包括TaSi 2，铂，铱和铂的有序层，并且可以放置在钛层和碳化硅层的顶部上。 IrIS可以通过其至少一些层来防止，减少或减轻诸如氧，铂和金等元素的扩散。

公开(公告)号：US08912088B2

公开(公告)日：2014-12-16

申请号：US13879803

申请日：2011-11-18

申请人： Toshinori Ogashiwa ,  Masaaki Kurita ,  Takashi Nishimori ,  Yukio Kanehira

发明人： Toshinori Ogashiwa ,  Masaaki Kurita ,  Takashi Nishimori ,  Yukio Kanehira

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L23/00 ,  B23K35/30 ,  B23K35/32 ,  B23K35/02 ,  B81C1/00 ,  B22F7/08 ,  B23K1/00

CPC分类号： H01L21/4885 ,  B22F7/08 ,  B23K1/0016 ,  B23K35/0244 ,  B23K35/3006 ,  B23K35/3013 ,  B23K35/322 ,  B23K2101/40 ,  B81C1/00095 ,  B81C1/00373 ,  B81C2201/0188 ,  B81C2201/0194 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L2224/03003 ,  H01L2224/031 ,  H01L2224/0312 ,  H01L2224/03334 ,  H01L2224/0401 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/0567 ,  H01L2224/05671 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/1317 ,  H01L2224/13171 ,  H01L2224/13173 ,  H01L2224/13176 ,  H01L2224/13178 ,  H01L2224/13181 ,  H01L2224/13184 ,  H01L2224/94 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/11

摘要： The present invention provides a transfer substrate for transferring a metal wiring material to a transfer-receiving object, the transfer substrate comprising a substrate, at least one metal wiring material formed on the substrate and an underlying metal film formed between the substrate and the metal wiring material, wherein the metal wiring material is a molded article prepared by sintering, e.g., gold powder having a purity of 99.9% by weight or more and an average particle size of 0.01 μm to 1.0 μm and the underlying metal film is composed of a metal such as gold or an alloy. The transfer substrate is capable of transferring a metal wiring material to the transfer-receiving object even at a temperature for heating the transfer-receiving object of 80 to 300° C.

摘要翻译： 本发明提供一种用于将金属布线材料转印到转印接收对象的转印基板，所述转印基板包括基板，形成在所述基板上的至少一种金属布线材料和形成在所述基板和所述金属布线之间的下面的金属膜 材料，其中金属布线材料是通过烧结制备的模制品，例如纯度为99.9重量％以上，平均粒径为0.01μm〜1.0μm的金粉，下面的金属膜由金属 如金或合金。 转印基板即使在80〜300℃的转印接收对象的加热温度下也能够将金属配线材料转印到转印接收体。

公开(公告)号：US20240153900A1

公开(公告)日：2024-05-09

申请号：US18053290

申请日：2022-11-07

申请人： NANYA TECHNOLOGY CORPORATION

发明人： SHENG-FU HUANG ,  SHING-YIH SHIH

IPC分类号： H01L23/00

CPC分类号： H01L24/08 ,  H01L24/05 ,  H01L24/80 ,  H01L2224/0215 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05663 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/0568 ,  H01L2224/05684 ,  H01L2224/08145 ,  H01L2224/80379 ,  H01L2224/80895 ,  H01L2224/80896

摘要： A semiconductor device structure and method for manufacturing the same are provided. The semiconductor device structure includes a substrate, a dielectric structure, a pad, a conductive structure, and a buffer structure. The dielectric structure is disposed on the substrate. The pad is embedded in the dielectric structure. The conductive structure is disposed on the pad. The buffer structure is disposed on the pad and separates the conductive structure from the dielectric structure. A coefficient of thermal expansion (CTE) of the buffer structure ranges between a CTE of the dielectric structure and a CTE of the conductive structure.

公开(公告)号：US09583453B2

公开(公告)日：2017-02-28

申请号：US13906317

申请日：2013-05-30

申请人： Ormet Circuits, Inc.

发明人： Catherine Shearer ,  Michael C Matthews ,  Peter A Matturi ,  Eunsook Barber ,  Richard Weaver

IPC分类号： H01L23/00 ,  H01L21/683

CPC分类号： H01L24/27 ,  H01L21/6836 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2224/04026 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05663 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/06181 ,  H01L2224/27003 ,  H01L2224/2731 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/27438 ,  H01L2224/278 ,  H01L2224/27848 ,  H01L2224/2929 ,  H01L2224/29301 ,  H01L2224/29305 ,  H01L2224/29309 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29314 ,  H01L2224/29316 ,  H01L2224/29317 ,  H01L2224/29318 ,  H01L2224/2932 ,  H01L2224/29324 ,  H01L2224/29338 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29349 ,  H01L2224/29355 ,  H01L2224/29357 ,  H01L2224/2936 ,  H01L2224/29363 ,  H01L2224/29364 ,  H01L2224/29369 ,  H01L2224/29371 ,  H01L2224/29373 ,  H01L2224/2938 ,  H01L2224/2939 ,  H01L2224/2949 ,  H01L2224/29499 ,  H01L2224/30181 ,  H01L2224/3201 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/325 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/83447 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/15747 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01004 ,  H01L2924/01048 ,  H01L2924/01052 ,  H01L2924/0108 ,  H01L2924/01034 ,  H01L2924/01084 ,  H01L2924/01076 ,  H01L2224/27 ,  H01L21/78 ,  H01L2224/83 ,  H01L2924/01005 ,  H01L2924/01015 ,  H01L2224/27436 ,  H01L2221/68381

摘要： Sintering die-attach materials provide a lead-free solution for semiconductor packages with superior electrical, thermal and mechanical performance to prior art alternatives. Wafer-applied sintering materials form a metallurgical bond to both semiconductor die and adherends as well as throughout the die-attach joint and do not remelt at the original process temperature. Application to either one or both sides of the wafer, as well as paste a film application are disclosed.

摘要翻译： 烧结芯片附着材料为现有技术的替代品提供了具有出色的电，热和机械性能的半导体封装的无铅解决方案。 晶片施加的烧结材料在半导体裸片和被粘物以及整个芯片附着接头处形成冶金结合，并且不会在原始工艺温度下重熔。 公开了应用于晶片的一侧或两侧以及粘贴薄膜应用。

公开(公告)号：US20160013142A1

公开(公告)日：2016-01-14

申请号：US14792461

申请日：2015-07-06

申请人： Renesas Electronics Corporation

发明人： Takehiko MAEDA ,  Akira YAJIMA ,  Satoshi ITOU ,  Fumiyoshi KAWASHIRO

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/06 ,  H01L24/08 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05582 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/05684 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48505 ,  H01L2224/48799 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01008 ,  H01L2924/01074

摘要： An improvement is achieved in the reliability of a semiconductor device. Over a semiconductor substrate, an interlayer insulating film is formed and, over the interlayer insulating film, a pad is formed. Over the interlayer insulating film, an insulating film is formed so as to cover the pad. In the insulating film, an opening is formed to expose a part of the pad. The pad is a pad to which a copper wire is to be electrically coupled and which includes an Al-containing conductive film containing aluminum as a main component. Over the Al-containing conductive film in a region overlapping the opening in plan view, a laminated film including a barrier conductor film, and a metal film over the barrier conductor film is formed. The metal film is in an uppermost layer. The barrier conductor film is a single-layer film or a laminated film including one or more layers of films selected from the group consisting of a Ti film, a TiN film, a Ta film, a TaN film, a W film, a WN film, a TiW film, and a TaW film. The metal film is made of one or more metals selected from the group consisting of Pd, Au, Ru, Rh, Pt, and Ir.

摘要翻译： 半导体器件的可靠性得到改善。 在半导体衬底上形成层间绝缘膜，并且在层间绝缘膜上形成衬垫。 在层间绝缘膜之上，形成绝缘膜以覆盖该焊盘。 在绝缘膜中形成开口以露出垫的一部分。 焊盘是铜导线电耦合的焊盘，其包括含有铝作为主要成分的含Al导电膜。 在平面图中与开口重叠的区域中的含Al导电膜上形成包含阻挡导体膜的层叠膜和阻挡导体膜上的金属膜。 金属膜位于最上层。 阻挡导电膜是单层膜或包含选自Ti膜，TiN膜，Ta膜，TaN膜，W膜，WN膜中的一层或多层膜的层压膜 ，TiW膜和TaW膜。 金属膜由选自Pd，Au，Ru，Rh，Pt和Ir中的一种或多种金属制成。

公开(公告)号：US20140262003A1

公开(公告)日：2014-09-18

申请号：US14354134

申请日：2012-11-08

申请人： Tanaka Kikinzoku Kogyo K.K.

发明人： Toshinori Ogashiwa ,  Masaaki Kurita ,  Takashi Nishimori ,  Yukio Kanehira

IPC分类号： H01L21/48 ,  H01L21/71

CPC分类号： H01L21/4814 ,  B22F7/08 ,  B23K35/007 ,  B23K35/0244 ,  B23K35/025 ,  B23K35/3006 ,  B23K35/3013 ,  B23K35/322 ,  B23K2035/008 ,  B23K2101/40 ,  B32B15/018 ,  C22C5/02 ,  C22C5/04 ,  C23C18/165 ,  C25D7/00 ,  H01L21/71 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L2224/03003 ,  H01L2224/031 ,  H01L2224/0312 ,  H01L2224/03334 ,  H01L2224/0401 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/0567 ,  H01L2224/05671 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/11505 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/1317 ,  H01L2224/13171 ,  H01L2224/13173 ,  H01L2224/13176 ,  H01L2224/13178 ,  H01L2224/13181 ,  H01L2224/13184 ,  H01L2224/94 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/181 ,  Y10T428/12056 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01046 ,  H01L2924/00012

摘要： A transfer substrate for transferring a metal wiring material to a transfer target including a substrate, at least one metal wiring material formed on the substrate, at least one coating layer formed on a surface of the metal wiring material, and an underlying metal film formed between the substrate and the metal wiring material, in which the metal wiring material is a compact formed by sintering metal powder such as gold powder having a purity of 99.9 wt % or more and an average particle size of 0.01 μm to 1.0 μm, and the coating layer is a predetermined metal such as gold or an alloy having a different composition from that of the metal wiring material and has a total thickness of 1 μm or less, and the metal underlying film is made of a predetermined metal such as gold or an alloy. The transfer substrate can lower heating temperature on the transfer target side.

摘要翻译： 一种用于将金属布线材料转印到包括基底的转印靶上的转印衬底，形成在基底上的至少一种金属布线材料，形成在金属布线材料的表面上的至少一层涂层， 基板和金属布线材料，其中金属布线材料是通过烧结纯度为99.9重量％以上和平均粒径为0.01μm至1.0μm的金粉末等金属粉末形成的压块，以及涂层 层是具有与金属布线材料的组成不同的金或合金的预定金属，其总厚度为1μm以下，金属底膜由金或合金等规定金属构成 。 转印基板可以降低转印目标侧的加热温度。

公开(公告)号：US20080132053A1

公开(公告)日：2008-06-05

申请号：US11566166

申请日：2006-12-01

申请人： Hsiao Che Wu ,  Yu Min Tsai ,  Wen Li Tsai

发明人： Hsiao Che Wu ,  Yu Min Tsai ,  Wen Li Tsai

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/522 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/0517 ,  H01L2224/05176 ,  H01L2224/05178 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/0567 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01044 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/0476 ,  H01L2924/0479 ,  H01L2924/0475 ,  H01L2924/0474 ,  H01L2924/0483 ,  H01L2924/0496 ,  H01L2924/01014 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/048

摘要： An integrated circuit device comprises a substrate, a stack structure including circuit structure having conductive lines positioned on the substrate, a reinforcement structure including at least one supporting member positioned on the substrate and a roof covering the circuit structure and the supporting member and at least one bonding pad positioned on the roof and electrically connected to the conductive lines. A method for preparing an integrated circuit device comprises forming a stack structure including circuit structure having conductive lines on a substrate, forming a reinforcement structure including at least one supporting member on the substrate and a roof covering the supporting member and the circuit structure and forming at least one bonding pad on the roof and electrically connecting to the conductive lines.

摘要翻译： 集成电路装置包括基板，包括具有位于基板上的导线的电路结构的堆叠结构，包括位于基板上的至少一个支撑构件和覆盖电路结构和支撑构件的顶板的加强结构以及至少一个 接合垫定位在屋顶上并电连接到导电线。 一种集成电路器件的制造方法，其特征在于，在基板上形成具有导线的电路结构的堆叠结构，形成包括所述基板上的至少一个支撑部件的加强结构以及覆盖所述支撑部件和所述电路结构的屋顶， 至少一个焊盘在屋顶上并且电连接到导电线。