公开(公告)号：US20240332246A1

公开(公告)日：2024-10-03

申请号：US18190206

申请日：2023-03-27

申请人： MACRONIX INTERNATIONAL CO., LTD.

发明人： Tien Chu YANG ,  Chin Cheng YANG

IPC分类号： H01L23/00

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/98 ,  H01L21/67288 ,  H01L2224/03848 ,  H01L2224/80125 ,  H01L2224/80895 ,  H01L2224/80948 ,  H01L2224/98

摘要： A compensation method for wafer bonding includes bonding a first wafer and a second wafer, the first wafer including a first conductive pad and a second conductive pad. A first overlay check is performed. A result of the first overlay check is determined whether the result is within a first predetermined specification. If the result of the first overlay check is determined as beyond the first predetermined specification, performing a first compensation method to form a compensated first wafer and a compensated second wafer, wherein a position of a first conductive pad of the compensated first wafer is different from a position of the first conductive pad of the first wafer, and a position of a second conductive pad of the compensated first wafer is different from a position of the second conductive pad of the first wafer.

公开(公告)号：US20240304576A1

公开(公告)日：2024-09-12

申请号：US18586366

申请日：2024-02-23

申请人： Kioxia Corporation

发明人： Yuya KIYOMURA ,  Ayako KAWANISHI ,  Yuta TAGUCHI ,  Ayumi WATARAI ,  Ippei KUME

IPC分类号： H01L23/00 ,  H01L25/18 ,  H10B80/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/08 ,  H01L25/18 ,  H10B80/00 ,  H01L2224/03848 ,  H01L2224/05009 ,  H01L2224/05017 ,  H01L2224/05018 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05087 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2924/1438

摘要： A memory device includes a first chip including a first electrode and a second chip including a second electrode. The first electrode includes a first conductive film having a first surface in contact with the second electrode at a boundary region of the first and second electrodes, a second surface spaced apart from the boundary region, and a third surface between the first surface and the second surface, and having a first portion on the first surface side and a second portion on the second surface side, and includes a second conductive film covering the second surface and the third surface of the first conductive film. A (111) orientation ratio of copper contained in the first portion is higher than a (111) orientation ratio of copper contained in the second portion.

公开(公告)号：US10020281B2

公开(公告)日：2018-07-10

申请号：US15251520

申请日：2016-08-30

申请人： International Business Machines Corporation

发明人： Chih-Chao Yang

IPC分类号： H01L21/00 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02205 ,  H01L2224/02215 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03616 ,  H01L2224/03848 ,  H01L2224/039 ,  H01L2224/05011 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/11009 ,  H01L2224/1141 ,  H01L2224/11428 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11616 ,  H01L2224/11848 ,  H01L2224/119 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/80004 ,  H01L2224/80203 ,  H01L2224/80895 ,  H01L2224/81203 ,  H01L2224/81895 ,  H01L2225/06524 ,  H01L2924/00015 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/0529 ,  H01L2224/45099 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/1147 ,  H01L2224/114 ,  H01L2224/0347 ,  H01L2224/034 ,  H01L2224/03009 ,  H01L2224/131 ,  H01L2924/014

摘要： Methods and semiconductor devices for bonding a first semiconductor device to a second semiconductor device include forming metal pads including a textured microstructure having a columnar grain structure at substantially the same angular direction from the top surface to the bottom surface. The textured crystalline microstructures enables the use of low temperatures and low pressures to effect bonding of the metal pads. Also described are methods of packaging and semiconductor devices.

公开(公告)号：US20180061804A1

公开(公告)日：2018-03-01

申请号：US15251520

申请日：2016-08-30

申请人： International Business Machines Corporation

发明人： CHIH-CHAO YANG

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02205 ,  H01L2224/02215 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03616 ,  H01L2224/03848 ,  H01L2224/039 ,  H01L2224/05011 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/11009 ,  H01L2224/1141 ,  H01L2224/11428 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11616 ,  H01L2224/11848 ,  H01L2224/119 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/80004 ,  H01L2224/80203 ,  H01L2224/80895 ,  H01L2224/81203 ,  H01L2224/81895 ,  H01L2225/06524 ,  H01L2924/00015 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/0529 ,  H01L2224/45099 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/1147 ,  H01L2224/114 ,  H01L2224/0347 ,  H01L2224/034 ,  H01L2224/03009 ,  H01L2224/131 ,  H01L2924/014

摘要： Methods and semiconductor devices for bonding a first semiconductor device to a second semiconductor device include forming metal pads including a textured microstructure having a columnar grain structure at substantially the same angular direction from the top surface to the bottom surface. The textured crystalline microstructures enables the use of low temperatures and low pressures to effect bonding of the metal pads. Also described are methods of packaging and semiconductor devices.

公开(公告)号：US09793198B2

公开(公告)日：2017-10-17

申请号：US14275519

申请日：2014-05-12

申请人： Invensas Corporation

发明人： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC分类号： H01L23/498 ,  B23K35/22 ,  B23K35/02 ,  B32B15/01 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  B23K1/00 ,  B23K101/40

CPC分类号： H01L23/49811 ,  B23K1/0016 ,  B23K35/0244 ,  B23K35/0266 ,  B23K35/22 ,  B23K2101/40 ,  B32B15/01 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/98 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/03 ,  H01L2224/03001 ,  H01L2224/03009 ,  H01L2224/03318 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/03334 ,  H01L2224/0348 ,  H01L2224/03848 ,  H01L2224/03849 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0391 ,  H01L2224/04105 ,  H01L2224/05022 ,  H01L2224/051 ,  H01L2224/05294 ,  H01L2224/05547 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/056 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11009 ,  H01L2224/111 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1403 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/2401 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/24146 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/75253 ,  H01L2224/81 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/8122 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/82105 ,  H01L2224/83 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841

摘要： A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

公开(公告)号：US20160379947A1

公开(公告)日：2016-12-29

申请号：US15191777

申请日：2016-06-24

申请人： Infineon Technologies AG

发明人： Manfred Schneegans ,  Franziska Haering ,  Hans-Joachim Schulze ,  Bernhard Weidgans

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L21/76843 ,  H01L21/76858 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L24/03 ,  H01L29/407 ,  H01L29/417 ,  H01L29/41741 ,  H01L29/42376 ,  H01L29/45 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/7396 ,  H01L29/7397 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03848 ,  H01L2224/03912 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01013 ,  H01L2924/01074

摘要： A semiconductor device includes a semiconductor die that having a conductive structure. A metal structure is electrically connected to the conductive structure and contains a first metal. An auxiliary layer stack is sandwiched between the conductive structure and the metal structure and includes an adhesion layer that contains a second metal. The auxiliary layer stack further includes a metal diffusion barrier layer between the adhesion layer and the conductive structure. The adhesion layer contains the first metal and a second metal.

摘要翻译： 半导体器件包括具有导电结构的半导体管芯。 金属结构电连接到导电结构并且包含第一金属。 辅助层堆叠夹在导电结构和金属结构之间，并包括含有第二金属的粘附层。 辅助层堆叠还包括在粘附层和导电结构之间的金属扩散阻挡层。 粘附层含有第一金属和第二金属。

公开(公告)号：US09478518B2

公开(公告)日：2016-10-25

申请号：US13637781

申请日：2011-02-23

申请人： Viorel Dragoi ,  Markus Wimplinger

发明人： Viorel Dragoi ,  Markus Wimplinger

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L24/03 ,  H01L24/29 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03015 ,  H01L2224/0311 ,  H01L2224/0355 ,  H01L2224/03848 ,  H01L2224/29 ,  H01L2224/29111 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29298 ,  H01L2224/83801 ,  H01L2224/8383 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/14 ,  H01L2924/01014 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2924/00

摘要： A process for the production of a permanent, electrically conductive connection between a first metal surface of a first substrate and a second metal surface of a second substrate, wherein a permanent, electrically conductive connection is produced, at least primarily, by substitution diffusion between metal ions and/or metal atoms of the two metal surfaces.

摘要翻译： 一种用于在第一基底的第一金属表面和第二基底的第二金属表面之间生产永久导电连接的方法，其中永久导电连接至少主要由金属之间的置换扩散 两个金属表面的离子和/或金属原子。

公开(公告)号：US09406646B2

公开(公告)日：2016-08-02

申请号：US13282927

申请日：2011-10-27

申请人： Khalil Hosseini ,  Frank Kahlmann

发明人： Khalil Hosseini ,  Frank Kahlmann

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L21/56 ,  H01L29/40 ,  H01L23/552

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L23/291 ,  H01L23/3185 ,  H01L23/552 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L29/402 ,  H01L2221/68359 ,  H01L2224/0233 ,  H01L2224/02371 ,  H01L2224/0239 ,  H01L2224/03002 ,  H01L2224/034 ,  H01L2224/03848 ,  H01L2224/0556 ,  H01L2224/061 ,  H01L2224/0612 ,  H01L2224/06181 ,  H01L2224/32245 ,  H01L2224/97 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/03

摘要： An embodiment electronic device comprises a semiconductor chip including a first main face, a second main face and side faces each connecting the first main face to the second main face. A metal layer is disposed above the second main face and the side faces, the metal layer including a porous structure.

摘要翻译： 实施例电子设备包括半导体芯片，其包括第一主面，第二主面和各自将第一主面与第二主面连接的侧面。 金属层设置在第二主面和侧面之上，金属层包括多孔结构。

公开(公告)号：US20160141208A1

公开(公告)日：2016-05-19

申请号：US14541239

申请日：2014-11-14

申请人： INFINEON TECHNOLOGIES AG

发明人： Hirschler Joachim ,  Roesner Michael ,  Heinrici Juch Markus ,  Stranzl Gudrun ,  Mischitz Martin ,  Zgaga Martin

IPC分类号： H01L21/78 ,  H01L21/324 ,  H01L23/29 ,  H01L21/3213

CPC分类号： H01L21/78 ,  H01L21/288 ,  H01L21/3213 ,  H01L21/6835 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/94 ,  H01L24/95 ,  H01L2221/68327 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2224/03002 ,  H01L2224/03005 ,  H01L2224/03009 ,  H01L2224/0332 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03464 ,  H01L2224/03505 ,  H01L2224/03848 ,  H01L2224/039 ,  H01L2224/05794 ,  H01L2224/05847 ,  H01L2224/06181 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2221/68381

摘要： According to various embodiments, a method for processing a semiconductor substrate may include: covering a plurality of die regions of the semiconductor substrate with a metal; forming a plurality of dies from the semiconductor substrate, wherein each die of the plurality of dies is covered with the metal; and, subsequently, annealing the metal covering at least one die of the plurality of dies.

摘要翻译： 根据各种实施例，用于处理半导体衬底的方法可以包括：用金属覆盖半导体衬底的多个管芯区域; 从所述半导体衬底形成多个管芯，其中所述多个管芯中的每个管芯被所述金属覆盖; 并且随后对所述多个管芯中的至少一个管芯进行金属覆盖退火。

公开(公告)号：US09257414B2

公开(公告)日：2016-02-09

申请号：US14250024

申请日：2014-04-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Szu-Ying Chen ,  Meng-Hsun Wan ,  Dun-Nian Yaung

IPC分类号： H01L21/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/80 ,  H01L25/50 ,  H01L2224/03019 ,  H01L2224/033 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03616 ,  H01L2224/0384 ,  H01L2224/03848 ,  H01L2224/04105 ,  H01L2224/05184 ,  H01L2224/05546 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/06181 ,  H01L2224/08058 ,  H01L2224/08145 ,  H01L2224/80357 ,  H01L2224/8083 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80948 ,  H01L2224/80986 ,  H01L2224/9202 ,  H01L2225/06548 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/00014 ,  H01L2224/03

摘要： A method for forming a stacked semiconductor structure comprises providing a first chip comprising a plurality of first active circuits and a first aluminum connection pad, depositing a first dielectric layer on a first side of the first chip, forming a first copper bonding pad on the first aluminum connection pad, providing a second chip comprising a plurality of second active circuits, depositing a second dielectric layer on a first side of the second chip, forming a second copper bonding pad in the second dielectric layer, stacking the first chip on the second chip, wherein the first copper bonding pad is in direct contact with the second copper bonding pad and bonding the first chip and the second chip to form a uniform bonded feature.

摘要翻译： 一种用于形成堆叠半导体结构的方法，包括提供包括多个第一有源电路和第一铝连接焊盘的第一芯片，在第一芯片的第一侧上沉积第一电介质层，在第一芯片上形成第一铜焊盘 铝连接焊盘，提供包括多个第二有源电路的第二芯片，在第二芯片的第一侧上沉积第二电介质层，在第二电介质层中形成第二铜焊盘，将第一芯片堆叠在第二芯片上 ，其中所述第一铜焊盘与所述第二铜焊盘直接接触并且接合所述第一芯片和所述第二芯片以形成均匀的接合特征。