公开(公告)号：US20180323161A1

公开(公告)日：2018-11-08

申请号：US16035231

申请日：2018-07-13

申请人： Amkor Technology, Inc.

发明人： Greg Hames ,  Glenn Rinne ,  Devarajan Balaraman

IPC分类号： H01L23/00

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/03001 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03618 ,  H01L2224/0384 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0391 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/0518 ,  H01L2224/05184 ,  H01L2224/0519 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2224/05576 ,  H01L2224/05578 ,  H01L2224/056 ,  H01L2224/05647 ,  H01L2224/0569 ,  H01L2224/0579 ,  H01L2224/058 ,  H01L2224/11 ,  H01L2224/11462 ,  H01L2224/11614 ,  H01L2224/13026 ,  H01L2224/131 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2924/01074 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/034 ,  H01L2224/0361 ,  H01L21/78 ,  H01L2924/014 ,  H01L2224/033 ,  H01L2924/0665 ,  H01L2224/03

摘要： A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a method of manufacturing a semiconductor device comprising forming interconnection structures by at least part performing a lateral plating process, and a semiconductor device manufactured thereby.

公开(公告)号：US10026883B2

公开(公告)日：2018-07-17

申请号：US15385068

申请日：2016-12-20

申请人： GLOBALFOUNDRIES INC.

发明人： Luke England ,  Rahul Agarwal

IPC分类号： H01L33/62 ,  H01L23/00 ,  H01L25/16 ,  H01L33/30 ,  H01L33/32 ,  H01L33/28 ,  F21V19/00 ,  F21Y115/10

CPC分类号： H01L33/62 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/80 ,  H01L25/167 ,  H01L27/156 ,  H01L27/24 ,  H01L2224/03452 ,  H01L2224/03612 ,  H01L2224/03845 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/0615 ,  H01L2224/06179 ,  H01L2224/08145 ,  H01L2224/80896 ,  H01L2224/80902 ,  H01L2924/12041 ,  H01L2924/1434 ,  H01L2924/00014 ,  H01L2924/05442

摘要： The present disclosure relates to semiconductor structures and, more particularly, to wafer bond interconnect structures and methods of manufacture. The structure includes: a plurality of sub-pixels each comprising a contact plate; and redundant connections at opposite corners of each sub-pixel on a backside of the contact plate.

公开(公告)号：US20160254761A1

公开(公告)日：2016-09-01

申请号：US15051822

申请日：2016-02-24

申请人： Hitachi Power Semiconductor Device, Ltd.

发明人： Tomoyasu FURUKAWA ,  Masaki SHIRAISHI ,  Hiroshi NAKANO ,  Toshiaki MORITA

IPC分类号： H02M7/537 ,  H01L25/00 ,  H01L21/78 ,  H01L29/45 ,  H01L21/283 ,  H01L25/16 ,  H01L23/00

CPC分类号： H02M7/537 ,  H01L21/283 ,  H01L21/78 ,  H01L23/4827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/50 ,  H01L29/45 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05655 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/13387 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/14154 ,  H01L2224/14177 ,  H01L2224/16145 ,  H01L2224/16238 ,  H01L2224/29147 ,  H01L2224/29387 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/81447 ,  H01L2224/8184 ,  H01L2224/83065 ,  H01L2224/83203 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/01013 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/3511 ,  H02M7/003 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2224/03 ,  H01L2924/0541 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/1413 ,  H01L2224/1415 ,  H01L2224/03464 ,  H01L21/304 ,  H01L21/22

摘要： A semiconductor device includes a semiconductor substrate in which a semiconductor element is formed, an electrode structure of a first semiconductor chip which is provided on a first surface of an n+-type semiconductor layer of the semiconductor substrate to be electrically connected to the semiconductor element and in which a first Al metal layer composed of Al or Al alloy, a Cu diffusion-prevention layer, a second Al metal layer composed of Al or Al alloy, and a Ni layer are formed in this order, and a conductive member which is bonded to the electrode structure of the first semiconductor chip via a sintered copper layer disposed on a surface of the Ni layer. In this semiconductor device, a crystal plane orientation of Al crystal grains on a surface of the second Al metal layer is principally on (110) plane.

摘要翻译： 半导体器件包括其半导体元件形成的半导体衬底，第一半导体芯片的电极结构，其设置在半导体衬底的n +型半导体层的第一表面上以与半导体元件电连接，并且 其中依次形成由Al或Al合金构成的第一Al金属层，Cu扩散防止层，由Al或Al合金构成的第二Al金属层和Ni层，以及导电构件 通过设置在Ni层的表面上的烧结铜层与第一半导体芯片的电极结构。 在该半导体器件中，第二Al金属层的表面上的Al晶粒的晶面取向主要在（110）面上。

公开(公告)号：US20160204075A1

公开(公告)日：2016-07-14

申请号：US14995028

申请日：2016-01-13

申请人： Infineon Technologies AG

发明人： Dietrich BONART ,  Ludger BORUCKI ,  Martina DEBIE ,  Bernhard WEIDGANS

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/06 ,  H01L24/13 ,  H01L24/29 ,  H01L24/33 ,  H01L24/83 ,  H01L2224/0345 ,  H01L2224/03614 ,  H01L2224/03901 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05083 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05172 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05564 ,  H01L2224/05582 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/13026 ,  H01L2224/26145 ,  H01L2224/291 ,  H01L2224/33181 ,  H01L2224/83447 ,  H01L2224/83815 ,  H01L2224/8384 ,  H01L2924/1203 ,  H01L2924/1306 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05341

摘要： Various embodiments provide a semiconductor chip, wherein the semiconductor chip comprises a first contact area and a second contact area both formed at a frontside of the semiconductor chip; a passivation layer arranged at the frontside between the first contact area and the second contact area; and a contact stack formed over the frontside of the semiconductor chip and comprising a plurality of layers, wherein at least one layer of the plurality of layers is removed from the passivation layer and boundary regions of the contact areas being adjacent to the passivation layer and wherein at least one another layer of the plurality of different layer is present in the boundary region of the contact areas adjoining the passivation layer.

摘要翻译： 各种实施例提供半导体芯片，其中半导体芯片包括在半导体芯片的前侧形成的第一接触区域和第二接触区域; 布置在第一接触区域和第二接触区域之间的前侧的钝化层; 以及形成在所述半导体芯片的前侧并且包括多个层的接触堆叠，其中所述多个层中的至少一个层从所述钝化层移除，并且所述接触区域的边界区域与所述钝化层相邻，并且其中 多个不同层中的至少另一层存在于与钝化层相邻的接触区域的边界区域中。

公开(公告)号：US09362241B2

公开(公告)日：2016-06-07

申请号：US14829619

申请日：2015-08-18

申请人： Renesas Electronics Corporation

发明人： Takaomi Nishi ,  Takehiko Saito ,  Katsuhiro Torii

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L23/528 ,  H01L23/532

CPC分类号： H01L24/03 ,  H01L21/304 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/525 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/562 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/0346 ,  H01L2224/03464 ,  H01L2224/0381 ,  H01L2224/03828 ,  H01L2224/03848 ,  H01L2224/03849 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05084 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05562 ,  H01L2224/05569 ,  H01L2224/05644 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/9212 ,  H01L2224/94 ,  H01L2924/01024 ,  H01L2924/3512 ,  H01L2924/365 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01022 ,  H01L2924/00012 ,  H01L2224/0231 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L21/78 ,  H01L2221/68304 ,  H01L2221/68381

摘要： A manufacturing method for semiconductor devices includes the steps of forming an Ni/Au film that includes an Ni film and an Au film formed over the Ni film over a wiring that is coupled to each of a plurality of electrode pads formed over a principal surface of a semiconductor wafer and arranges each of the electrode pads at a different position, grinding a back surface of the semiconductor wafer, performing reduction treatment on a surface of the Ni/Au film, and forming a solder bump over the Ni/Au film. In the reduction treatment, respective processes of flux application, reflow soldering and cleaning are performed and the solder bump is bonded to the Ni/Au film after the reduction treatment has been completed. Thereby, bonding reliability in flip chip bonding of a semiconductor device is improved.

摘要翻译： 一种半导体器件的制造方法，其特征在于，具有以下工序：将Ni膜和形成在所述Ni膜上的Au膜形成的Ni / Au膜形成在与所述多个电极焊盘的主表面上形成的多个电极焊盘 半导体晶片，将各电极焊盘配置在不同的位置，研磨半导体晶片的背面，对Ni / Au膜的表面进行还原处理，在Ni / Au膜上形成焊料凸块。 在还原处理中，进行助焊剂施加，回流焊接和清洗的各个处理，并且在还原处理完成之后将焊料凸点接合到Ni / Au膜。 由此，提高了半导体器件的倒装芯片接合中的接合可靠性。

公开(公告)号：US20150325507A1

公开(公告)日：2015-11-12

申请号：US14275519

申请日：2014-05-12

申请人： Invensas Corporation

发明人： Cyprian Emeka UZOH ,  Rajesh Katkar

IPC分类号： H01L23/498 ,  B23K35/22 ,  H01L23/00

CPC分类号： H01L23/49811 ,  B23K1/0016 ,  B23K35/0244 ,  B23K35/0266 ,  B23K35/22 ,  B23K2101/40 ,  B32B15/01 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/98 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/03 ,  H01L2224/03001 ,  H01L2224/03009 ,  H01L2224/03318 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/03334 ,  H01L2224/0348 ,  H01L2224/03848 ,  H01L2224/03849 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0391 ,  H01L2224/04105 ,  H01L2224/05022 ,  H01L2224/051 ,  H01L2224/05294 ,  H01L2224/05547 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/056 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11009 ,  H01L2224/111 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1403 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/2401 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/24146 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/75253 ,  H01L2224/81 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/8122 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/82105 ,  H01L2224/83 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841

摘要： A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

摘要翻译： 焊料连接可以被焊料锁定层（1210,2210）包围，并且可以凹陷在该层中的孔（1230）中。 可以通过蒸发焊料连接的可蒸发部分（1250）来获得凹部。 还提供其他功能。

公开(公告)号：US20150137354A1

公开(公告)日：2015-05-21

申请号：US14086932

申请日：2013-11-21

申请人： Chee Seng Foong ,  Lan Chu Tan

发明人： Chee Seng Foong ,  Lan Chu Tan

IPC分类号： H01L23/00

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03442 ,  H01L2224/0345 ,  H01L2224/03505 ,  H01L2224/03552 ,  H01L2224/0381 ,  H01L2224/03901 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/11505 ,  H01L2224/11552 ,  H01L2224/1181 ,  H01L2224/1182 ,  H01L2224/11825 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13082 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13166 ,  H01L2224/13562 ,  H01L2224/13566 ,  H01L2224/136 ,  H01L2924/12042 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/01024 ,  H01L2224/11442 ,  H01L2924/014 ,  H01L2924/00

摘要： A pillar bump, such as a copper pillar bump, is formed on an integrated circuit chip by applying a metallic powder over a conductive pad on a surface of the chip. The metallic powder is selectively spot-lasered to form the pillar bump. Any remaining unsolidified metallic powder may be removed from the surface of the chip. This process may be repeated to increase the bump height. Further, a solder cap may be formed on an outer surface of the pillar bump.

摘要翻译： 通过在芯片的表面上的导电焊盘上施加金属粉末，在集成电路芯片上形成诸如铜柱凸起的柱状凸块。 选择性地点燃金属粉末以形成柱状凸块。 任何剩余的非固化金属粉末可以从芯片的表面去除。 可以重复该过程以增加凸起高度。 此外，可以在柱状凸起的外表面上形成焊锡帽。

公开(公告)号：US20140327136A1

公开(公告)日：2014-11-06

申请号：US14335084

申请日：2014-07-18

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Tsung-Fu TSAI ,  Yian-Liang KUO ,  Chih-Horng CHANG

IPC分类号： H01L23/498 ,  H01L23/535 ,  H01L21/768

CPC分类号： H01L23/49811 ,  H01L21/76885 ,  H01L21/76886 ,  H01L23/535 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03424 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03614 ,  H01L2224/03848 ,  H01L2224/03901 ,  H01L2224/03903 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05084 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/013 ,  H01L2924/01046 ,  H01L2924/01039 ,  H01L2924/01016 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01028 ,  H01L2224/034 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor device comprises a semiconductor substrate, an under-bump metallization (UBM) structure overlying the semiconductor substrate, and a solder bump overlying and electrically connected to the UBM structure. The UBM structure comprises a first metallization layer comprising a first metal, a second metallization layer comprising a second metal different from the first metal, and a first intermetallic compound (IMC) layer between the first metallization layer and the second metallization layer, the first IMC layer comprising the first metal and the second metal.

摘要翻译： 半导体器件包括半导体衬底，覆盖半导体衬底的凸起下金属化（UBM）结构以及覆盖并电连接到UBM结构的焊料凸块。 UBM结构包括第一金属化层，其包括第一金属，第二金属化层，第二金属化层包括不同于第一金属的第二金属，以及在第一金属化层和第二金属化层之间的第一金属间化合物（IMC）层，第一IMC 层，其包含第一金属和第二金属。

公开(公告)号：US08841766B2

公开(公告)日：2014-09-23

申请号：US12730411

申请日：2010-03-24

申请人： Chien Ling Hwang ,  Yi-Wen Wu ,  Chun-Chieh Wang ,  Chung-Shi Liu

发明人： Chien Ling Hwang ,  Yi-Wen Wu ,  Chun-Chieh Wang ,  Chung-Shi Liu

IPC分类号： H01L23/50 ,  H01L23/00

CPC分类号： H01L21/76885 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/023 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03614 ,  H01L2224/03901 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05024 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/0569 ,  H01L2224/10126 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11614 ,  H01L2224/1182 ,  H01L2224/11827 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/11912 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13565 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/1369 ,  H01L2224/16238 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2224/81411 ,  H01L2224/81413 ,  H01L2224/81416 ,  H01L2224/81439 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81815 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/206 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/01028 ,  H01L2924/01022 ,  H01L2924/01046 ,  H01L2924/01083 ,  H01L2924/01051 ,  H01L2924/00

摘要： Sidewall protection processes are provided for Cu pillar bump technology, in which a protection structure on the sidewalls of the Cu pillar bump is formed of at least one of non-metal material layers, for example a dielectric material layer, a polymer material layer, or combinations thereof.

摘要翻译： 提供了用于Cu柱凸点技术的侧壁保护工艺，其中Cu柱凸起的侧壁上的保护结构由非金属材料层，例如电介质材料层，聚合物材料层或聚合物材料层中的至少一个形成 其组合。

公开(公告)号：US20120091576A1

公开(公告)日：2012-04-19

申请号：US13009377

申请日：2011-01-19

申请人： Tsung-Fu TSAI ,  Yian-Liang KUO ,  Chih-Horng CHANG

发明人： Tsung-Fu TSAI ,  Yian-Liang KUO ,  Chih-Horng CHANG

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L23/49811 ,  H01L21/76885 ,  H01L21/76886 ,  H01L23/535 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03424 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03614 ,  H01L2224/03848 ,  H01L2224/03901 ,  H01L2224/03903 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05084 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/013 ,  H01L2924/01046 ,  H01L2924/01039 ,  H01L2924/01016 ,  H01L2924/0103 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01028 ,  H01L2224/034 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552

摘要： An under-bump metallization (UBM) structure in a semiconductor device includes a copper layer, a nickel layer, and a Cu—Ni—Sn intermetallic compound (IMC) layer between the copper layer and the nickel layer.

摘要翻译： 半导体器件中的凸起下金属化（UBM）结构包括在铜层和镍层之间的铜层，镍层和Cu-Ni-Sn金属间化合物（IMC）层。