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公开(公告)号:US20230253356A1
公开(公告)日:2023-08-10
申请号:US18302228
申请日:2023-04-18
发明人: Shan-Yu HUANG , Ming-Da CHENG , Hsiao-Wen CHUNG , Ching-Wen HSIAO , Li-Chun HUNG , Yuan-Yao CHANG , Meng-Hsiu HSIEH
IPC分类号: H01L23/00 , H01L23/522
CPC分类号: H01L24/13 , H01L23/5226 , H01L24/11 , H01L2224/1147 , H01L2224/13015 , H01L2224/13018 , H01L2224/13082
摘要: A chip structure is provided. The chip structure includes a substrate. The chip structure includes a first conductive line over the substrate. The chip structure includes an insulating layer over the substrate and the first conductive line. The chip structure includes a conductive pillar over and passing through the insulating layer. The conductive pillar is formed in one piece, the conductive pillar is in direct contact with the first conductive line, and a first sidewall of the first conductive line extends across a second sidewall of the conductive pillar in a top view of the first conductive line and the conductive pillar. The chip structure includes a solder bump on the conductive pillar. The solder bump is in direct contact with the conductive pillar.
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公开(公告)号:US11710718B2
公开(公告)日:2023-07-25
申请号:US17140519
申请日:2021-01-04
发明人: Cyprian Emeka Uzoh
IPC分类号: H01L23/00 , H01L25/065 , H01L25/00
CPC分类号: H01L24/81 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/80 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/03009 , H01L2224/0401 , H01L2224/05571 , H01L2224/05572 , H01L2224/05605 , H01L2224/05609 , H01L2224/05611 , H01L2224/05616 , H01L2224/05639 , H01L2224/05644 , H01L2224/05684 , H01L2224/11009 , H01L2224/11464 , H01L2224/13018 , H01L2224/13019 , H01L2224/13084 , H01L2224/13562 , H01L2224/13564 , H01L2224/13655 , H01L2224/13684 , H01L2224/13686 , H01L2224/13805 , H01L2224/13809 , H01L2224/13811 , H01L2224/13844 , H01L2224/13847 , H01L2224/13855 , H01L2224/16148 , H01L2224/16238 , H01L2224/16265 , H01L2224/16268 , H01L2224/16501 , H01L2224/2919 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/81026 , H01L2224/81065 , H01L2224/8181 , H01L2224/81099 , H01L2224/81193 , H01L2224/83026 , H01L2224/83815 , H01L2225/06513 , H01L2924/014 , H01L2924/0105 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/19041 , H01L2924/19043 , H01L2924/19104 , H01L2924/3841 , H01L2224/13655 , H01L2924/013 , H01L2924/00014 , H01L2224/13684 , H01L2924/013 , H01L2924/00014 , H01L2224/05644 , H01L2924/00014 , H01L2224/05611 , H01L2924/00014 , H01L2224/05684 , H01L2924/00014 , H01L2224/05616 , H01L2924/00014 , H01L2224/05605 , H01L2924/00014 , H01L2224/05609 , H01L2924/00014 , H01L2224/05639 , H01L2924/00014 , H01L2224/13811 , H01L2924/013 , H01L2924/00014 , H01L2224/13809 , H01L2924/013 , H01L2924/00014 , H01L2224/13805 , H01L2924/013 , H01L2924/00014 , H01L2224/13847 , H01L2924/013 , H01L2924/00014 , H01L2224/13855 , H01L2924/013 , H01L2924/00014 , H01L2224/13844 , H01L2924/013 , H01L2924/00014 , H01L2224/05571 , H01L2924/00012 , H01L2224/05572 , H01L2924/00012
摘要: A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.
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公开(公告)号:US20230154878A1
公开(公告)日:2023-05-18
申请号:US17528523
申请日:2021-11-17
发明人: SUMING HU , FARSHAD GHAHGHAHI
IPC分类号: H01L23/00
CPC分类号: H01L24/13 , H01L24/16 , H01L24/11 , H01L2224/16238 , H01L2224/16227 , H01L2224/11622 , H01L2224/13582 , H01L2224/13541 , H01L2224/13552 , H01L2224/13006 , H01L2224/13018
摘要: In an implementation, a semiconductor chip includes a device layer, an interconnect layer fabricated on the device layer, the interconnect layer including a conductive pad, and a conductive pillar coupled to the conductive pad. The conductive pillar includes at least a first portion having a first width and a second portion having a second width, the first portion being disposed between the second portion and the conductive pad, wherein the first width of the first portion is greater than the second width of the second portion.
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公开(公告)号:US20180247906A1
公开(公告)日:2018-08-30
申请号:US15966447
申请日:2018-04-30
发明人: Shing-Yih Shih , Tieh-Chiang Wu
IPC分类号: H01L23/00
CPC分类号: H01L24/05 , H01L24/03 , H01L24/11 , H01L24/13 , H01L2224/02125 , H01L2224/0362 , H01L2224/03622 , H01L2224/0401 , H01L2224/05005 , H01L2224/05012 , H01L2224/05015 , H01L2224/05017 , H01L2224/05082 , H01L2224/051 , H01L2224/05111 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05184 , H01L2224/05551 , H01L2224/05558 , H01L2224/05578 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05686 , H01L2224/10125 , H01L2224/1145 , H01L2224/1146 , H01L2224/11849 , H01L2224/13018 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2924/04941 , H01L2924/05042 , H01L2924/05341 , H01L2924/05432 , H01L2924/05442 , H01L2924/06 , H01L2924/07025 , H01L2924/013 , H01L2924/00014 , H01L2924/01074
摘要: A connector structure and a manufacturing method thereof are provided. The connector structure includes a semiconductor substrate, a metal layer, a passivation layer, and a conductive structure. The metal layer is over the semiconductor substrate. The passivation layer is over the metal layer and includes an opening. The conductive structure is in contact with the metal layer in a patterned surface structure of the conductive structure through the opening of the passivation layer.
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公开(公告)号:US20180061797A1
公开(公告)日:2018-03-01
申请号:US15803053
申请日:2017-11-03
发明人: Toyohiro Aoki , Takashi Hisada , Eiji I. Nakamura
CPC分类号: H01L24/11 , H01B1/026 , H01L24/05 , H01L24/13 , H01L2224/03831 , H01L2224/0401 , H01L2224/05567 , H01L2224/05624 , H01L2224/11312 , H01L2224/1132 , H01L2224/11505 , H01L2224/11622 , H01L2224/13018 , H01L2224/13076 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13339 , H01L2224/13344 , H01L2224/13347 , H01L2224/13355 , H01L2224/94 , H05K3/3478 , H05K3/4007 , H05K2201/10734 , H01L2224/11 , H01L2924/00014 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01029 , H01L2924/01028 , H01L2924/01083 , H01L2924/01049 , H01L2924/0103 , H01L2924/01027 , H01L2924/01032 , H01L2924/01026 , H01L2924/01022
摘要: A method of the present invention includes preparing a substrate having a surface on which a electrode pad is formed, forming a resist layer on the substrate, the resist layer having an opening on the electrode pad, filling conductive paste in the opening of the resist layer; sintering the conductive paste in the opening to form a conductive layer which covers a side wall of the resist layer and a surface of the electrode pad in the opening, a space on the conductive layer leading to the upper end of the opening being formed, filling solder in the space on the conductive layer and removing the resist layer.
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公开(公告)号:US20180053741A1
公开(公告)日:2018-02-22
申请号:US15803008
申请日:2017-11-03
发明人: Chih-Horng Chang , Tin-Hao Kuo , Chen-Shien Chen , Yen-Liang Lin
CPC分类号: H01L24/13 , H01L24/11 , H01L24/14 , H01L24/16 , H01L24/81 , H01L25/50 , H01L2224/0401 , H01L2224/05552 , H01L2224/05572 , H01L2224/05599 , H01L2224/10145 , H01L2224/11849 , H01L2224/13011 , H01L2224/13012 , H01L2224/13015 , H01L2224/13018 , H01L2224/13082 , H01L2224/13083 , H01L2224/131 , H01L2224/13147 , H01L2224/14051 , H01L2224/1412 , H01L2224/14152 , H01L2224/14153 , H01L2224/16238 , H01L2224/81191 , H01L2224/81345 , H01L2224/81815 , H01L2924/00014 , H01L2924/01322 , H01L2924/2064 , H01L2924/384 , Y10T428/12493 , Y10T428/24479 , H01L2924/014 , H01L2924/00012 , H01L2924/00
摘要: In some embodiments, the present disclosure relates to a method of integrated chip bonding. The method is performed by forming a metal layer on a substrate, and forming a solder layer on the metal layer. The solder layer is reflowed. The metal layer and the solder layer have sidewalls defining a recess that is at least partially filled by the solder layer during reflowing of the solder layer.
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公开(公告)号:US20180019191A1
公开(公告)日:2018-01-18
申请号:US15715515
申请日:2017-09-26
申请人: INVENSAS CORPORATION
发明人: Cyprian Emeka UZOH , Rajesh Katkar
IPC分类号: H01L23/498 , B23K1/00 , H01L25/065 , H01L23/00 , H01L23/31 , H01L21/48 , B32B15/01 , B23K35/22 , B23K35/02 , H01L25/10 , H01L25/00 , H01L21/56 , B23K101/40
CPC分类号: H01L23/49811 , B23K1/0016 , B23K35/0244 , B23K35/0266 , B23K35/22 , B23K2101/40 , B32B15/01 , H01L21/4853 , H01L21/56 , H01L21/563 , H01L21/565 , H01L23/3114 , H01L23/3135 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/73 , H01L24/742 , H01L24/81 , H01L24/82 , H01L24/83 , H01L24/98 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/03 , H01L2224/03001 , H01L2224/03009 , H01L2224/03318 , H01L2224/0332 , H01L2224/0333 , H01L2224/03334 , H01L2224/0348 , H01L2224/03848 , H01L2224/03849 , H01L2224/039 , H01L2224/03901 , H01L2224/0391 , H01L2224/04105 , H01L2224/05022 , H01L2224/051 , H01L2224/05294 , H01L2224/05547 , H01L2224/05567 , H01L2224/05573 , H01L2224/05582 , H01L2224/056 , H01L2224/05794 , H01L2224/05839 , H01L2224/05844 , H01L2224/05847 , H01L2224/05855 , H01L2224/0603 , H01L2224/06102 , H01L2224/10145 , H01L2224/11001 , H01L2224/11005 , H01L2224/11009 , H01L2224/111 , H01L2224/11318 , H01L2224/1132 , H01L2224/11334 , H01L2224/1134 , H01L2224/11848 , H01L2224/11849 , H01L2224/119 , H01L2224/11901 , H01L2224/1191 , H01L2224/13005 , H01L2224/13017 , H01L2224/13018 , H01L2224/13021 , H01L2224/13022 , H01L2224/13082 , H01L2224/131 , H01L2224/13116 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/1319 , H01L2224/13294 , H01L2224/133 , H01L2224/13339 , H01L2224/13344 , H01L2224/13347 , H01L2224/13355 , H01L2224/13561 , H01L2224/13562 , H01L2224/13565 , H01L2224/136 , H01L2224/13609 , H01L2224/13611 , H01L2224/1403 , H01L2224/16058 , H01L2224/16059 , H01L2224/16145 , H01L2224/16147 , H01L2224/16148 , H01L2224/16227 , H01L2224/16238 , H01L2224/1701 , H01L2224/1703 , H01L2224/17181 , H01L2224/17505 , H01L2224/2101 , H01L2224/211 , H01L2224/2401 , H01L2224/2402 , H01L2224/24137 , H01L2224/24146 , H01L2224/2919 , H01L2224/32145 , H01L2224/73104 , H01L2224/73204 , H01L2224/73267 , H01L2224/75253 , H01L2224/81 , H01L2224/81138 , H01L2224/81141 , H01L2224/81193 , H01L2224/81203 , H01L2224/8121 , H01L2224/8122 , H01L2224/81224 , H01L2224/81815 , H01L2224/82005 , H01L2224/82101 , H01L2224/82102 , H01L2224/82105 , H01L2224/83 , H01L2224/8385 , H01L2224/9211 , H01L2225/06513 , H01L2225/1023 , H01L2225/1058 , H01L2924/00 , H01L2924/00012 , H01L2924/00014 , H01L2924/014 , H01L2924/07025 , H01L2924/15192 , H01L2924/15311 , H01L2924/15321 , H01L2924/3512 , H01L2924/381 , H01L2924/3841
摘要: A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.
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公开(公告)号:US20170352631A1
公开(公告)日:2017-12-07
申请号:US15281095
申请日:2016-09-30
发明人: Kun-Shu Chuang
IPC分类号: H01L23/00 , H01L23/498
CPC分类号: H01L24/02 , H01L23/3192 , H01L23/498 , H01L23/49811 , H01L23/49838 , H01L23/49894 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/17 , H01L2224/02145 , H01L2224/0233 , H01L2224/02351 , H01L2224/0236 , H01L2224/02373 , H01L2224/0345 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05557 , H01L2224/05558 , H01L2224/05569 , H01L2224/05572 , H01L2224/05573 , H01L2224/05639 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/1184 , H01L2224/11849 , H01L2224/13018 , H01L2224/13022 , H01L2224/13082 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/1412 , H01L2924/00014 , H01L2924/01074 , H01L2924/01047 , H01L2924/014
摘要: Provided is a semiconductor device including a substrate, a pad, a protective layer, a plurality of convex patterns, a redistribution layer (RDL), and a bump. The pad is disposed on the substrate. The protective layer is disposed on the substrate. The protective layer has a first opening exposing a portion of a surface of the pad. The convex patterns are disposed on the protective layer. The RDL is disposed on the convex patterns. The RDL extends from the pad to the convex patterns. The bump is disposed on the convex patterns.
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公开(公告)号:US09831202B2
公开(公告)日:2017-11-28
申请号:US15262040
申请日:2016-09-12
发明人: Sun-kyoung Seo , Seung-kwan Ryu , Ju-il Choi , Tae-je Cho , Yong-hwan Kwon
CPC分类号: H01L24/13 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/81 , H01L2224/02205 , H01L2224/02215 , H01L2224/0345 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05008 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05184 , H01L2224/05569 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/05666 , H01L2224/05671 , H01L2224/05684 , H01L2224/10145 , H01L2224/11462 , H01L2224/1147 , H01L2224/11614 , H01L2224/1162 , H01L2224/11849 , H01L2224/13006 , H01L2224/13014 , H01L2224/13017 , H01L2224/13018 , H01L2224/13022 , H01L2224/13026 , H01L2224/13076 , H01L2224/13083 , H01L2224/13084 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/1312 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13157 , H01L2224/13164 , H01L2224/13169 , H01L2224/13564 , H01L2224/16227 , H01L2224/16237 , H01L2224/73204 , H01L2224/81011 , H01L2224/81191 , H01L2224/81815 , H01L2924/05042 , H01L2924/05442 , H01L2924/07025 , H01L2924/00014 , H01L2924/014 , H01L2924/01082 , H01L2924/01083 , H01L2924/0103 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012
摘要: An electronic device is provided, which includes a substrate having an electrically conductive contact pad thereon and an electrically conductive connection terminal on the contact pad. The connection terminal includes an electrically conductive pillar structure and a solder layer that extends on the pillar structure and contacts a protruding portion of a sidewall of the pillar structure. The pillar structure can include a lower pillar layer, a diffusion barrier layer on the lower pillar layer and an upper pillar layer on the diffusion barrier layer. In some additional embodiments of the invention, the protruding portion of the sidewall of the pillar structure includes an outermost portion of an upper surface of the diffusion barrier layer. This can be achieved by making a width of the diffusion barrier layer greater than a width of the upper pillar layer when viewed in transverse cross-section.
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公开(公告)号:US09818709B2
公开(公告)日:2017-11-14
申请号:US15098138
申请日:2016-04-13
发明人: Hiroyuki Utsunomiya
IPC分类号: H01L23/48 , H01L23/52 , H01L21/44 , H01L21/4763 , H01L23/00
CPC分类号: H01L24/13 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/0345 , H01L2224/03462 , H01L2224/03831 , H01L2224/03912 , H01L2224/0401 , H01L2224/05166 , H01L2224/05572 , H01L2224/05647 , H01L2224/10145 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/11903 , H01L2224/13005 , H01L2224/13014 , H01L2224/13017 , H01L2224/13018 , H01L2224/13083 , H01L2224/131 , H01L2224/13147 , H01L2224/13155 , H01L2224/16237 , H01L2224/81191 , H01L2224/81193 , H01L2224/81424 , H01L2224/81444 , H01L2224/81447 , H01L2224/81455 , H01L2224/81469 , H01L2224/81815 , H01L2924/206 , H01L2924/3841 , H01L2924/00014 , H01L2924/00012 , H01L2924/014
摘要: A flip-chip mounting technique with high reliability is provided in flip-chip mounting using a Cu pillar. In a semiconductor device to be coupled to a mounting board via a Cu pillar, the Cu pillar is caused to have a laminated structure including a pillar layer, a barrier layer, and a bump in this order from below, and the bump is formed to be smaller than the barrier layer.
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