公开(公告)号：US20140159233A1

公开(公告)日：2014-06-12

申请号：US13708461

申请日：2012-12-07

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chun-Cheng Lin ,  Hsiu-Jen Lin ,  Cheng-Ting Chen ,  Wei-Yu Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/498 ,  H01L23/00

CPC分类号： H01L24/16 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/48 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/06181 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13216 ,  H01L2224/13224 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13255 ,  H01L2224/13284 ,  H01L2224/13309 ,  H01L2224/13317 ,  H01L2224/13318 ,  H01L2224/1332 ,  H01L2224/13338 ,  H01L2224/13349 ,  H01L2224/13355 ,  H01L2224/1336 ,  H01L2224/13366 ,  H01L2224/137 ,  H01L2224/13809 ,  H01L2224/13817 ,  H01L2224/13818 ,  H01L2224/1382 ,  H01L2224/13838 ,  H01L2224/13849 ,  H01L2224/13855 ,  H01L2224/1386 ,  H01L2224/13866 ,  H01L2224/14181 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16506 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/384 ,  H05K3/3436 ,  H05K3/4015 ,  H05K2201/10515 ,  Y02P70/613 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/01032 ,  H01L2924/01015 ,  H01L2924/01058 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package on package structure includes a first substrate having a first region and a second region, a bump formed on the first region of the first substrate, a first semiconductor die bonded to the second region of the first substrate, and a semiconductor die package bonded to the first substrate. The bump includes a metallic structure and a plurality of minor elements dispersed in the metallic structure. The semiconductor die package includes a connector bonded to the bump, and the first semiconductor die is between the semiconductor die package and the first substrate.

摘要翻译： 封装结构包括具有第一区域和第二区域的第一基板，形成在第一基板的第一区域上的凸块，与第一基板的第二区域接合的第一半导体管芯，以及半导体管芯封装 到第一底物。 凸块包括分散在金属结构中的金属结构和多个次要元件。 半导体管芯封装包括接合到凸块的连接器，并且第一半导体管芯位于半导体管芯封装和第一衬底之间。

公开(公告)号：US08227334B2

公开(公告)日：2012-07-24

申请号：US12843760

申请日：2010-07-26

申请人： Ming-Da Cheng ,  Ming-Che Ho ,  Chung-Shi Liu ,  Chien Ling Hwang ,  Cheng-Chung Lin ,  Hui-Jung Tsai ,  Zheng-Yi Lim

发明人： Ming-Da Cheng ,  Ming-Che Ho ,  Chung-Shi Liu ,  Chien Ling Hwang ,  Cheng-Chung Lin ,  Hui-Jung Tsai ,  Zheng-Yi Lim

IPC分类号： H01L21/00

CPC分类号： H01L24/11 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/93 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11416 ,  H01L2224/11422 ,  H01L2224/11424 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/118 ,  H01L2224/1181 ,  H01L2224/1182 ,  H01L2224/11822 ,  H01L2224/11827 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13005 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/132 ,  H01L2224/13211 ,  H01L2224/13339 ,  H01L2224/13562 ,  H01L2224/13584 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13664 ,  H01L2224/1379 ,  H01L2224/13794 ,  H01L2224/13809 ,  H01L2224/13813 ,  H01L2224/13817 ,  H01L2224/13818 ,  H01L2224/1382 ,  H01L2224/13849 ,  H01L2224/13855 ,  H01L2224/13857 ,  H01L2224/1386 ,  H01L2224/13866 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/93 ,  H01L2225/06513 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2224/11 ,  H01L2924/00

摘要： A method of forming a device includes providing a substrate, and forming a solder bump over the substrate. A minor element is introduced to a region adjacent a top surface of the solder bump. A re-flow process is then performed to the solder bump to drive the minor element into the solder bump.

摘要翻译： 形成器件的方法包括提供衬底，以及在衬底上形成焊料凸点。 将次要元件引入邻近焊料凸块顶表面的区域。 然后对焊料凸块执行再流程以将次要元件驱动到焊料凸块中。

公开(公告)号：US20110226841A1

公开(公告)日：2011-09-22

申请号：US13131818

申请日：2008-11-27

申请人： Jun Wei ,  Xiao Fang Ang ,  Chee Cheong Wong ,  Zhong Chen

发明人： Jun Wei ,  Xiao Fang Ang ,  Chee Cheong Wong ,  Zhong Chen

IPC分类号： B23K31/02 ,  B23K20/02 ,  B32B15/04 ,  B32B5/16 ,  C09D7/12 ,  B82Y99/00 ,  B82Y40/00

CPC分类号： H01L21/2007 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05644 ,  H01L2224/1181 ,  H01L2224/1182 ,  H01L2224/11821 ,  H01L2224/11822 ,  H01L2224/11823 ,  H01L2224/11826 ,  H01L2224/11827 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13793 ,  H01L2224/13824 ,  H01L2224/13839 ,  H01L2224/13844 ,  H01L2224/13847 ,  H01L2224/13855 ,  H01L2224/13886 ,  H01L2224/1389 ,  H01L2224/13893 ,  H01L2224/1607 ,  H01L2224/16145 ,  H01L2224/81099 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81203 ,  H01L2224/81207 ,  H01L2224/8182 ,  H01L2225/06513 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/3512 ,  H01L2924/36 ,  Y10T428/25 ,  Y10T428/254 ,  Y10T428/31678 ,  H01L2924/01074 ,  H01L2924/00

摘要： A method for forming direct metal-metal bond between metallic surfaces is disclosed. The method comprises depositing a first nanostructured organic coating (118) on a first metallic surface (116) to form a first passivation layer thereon, the first nanostructured organic coating (118) comprising an organic phase with nanoparticles dispersed within the organic phase, contacting the first nanostructured organic coating (118) with a second metallic surface (126), and applying on the first and second metallic surfaces (116, 126) at least a bonding temperature of at least room temperature and/or a bonding pressure for a bonding period to bond the first and second metallic surfaces (116, 126) thereby forming the direct metal-metal bond therebetween. A second nanostructured organic coating (128) comprising an organic phase with nanoparticles dispersed within the organic phase may also be deposited on the second metallic surface (126).

摘要翻译： 公开了在金属表面之间形成直接金属 - 金属结合的方法。 该方法包括在第一金属表面（116）上沉积第一纳米结构化有机涂层（118）以在其上形成第一钝化层，第一纳米结构有机涂层（118）包含有机相，纳米颗粒分散在有机相内， 具有第二金属表面（126）的第一纳米结构有机涂层（118），并且在第一和第二金属表面（116,126）上至少施加至少室温的粘结温度和/或粘合时间段的粘合压力 以接合第一和第二金属表面（116,126），从而在它们之间形成直接金属 - 金属粘合。 包含分散在有机相内的纳米颗粒的有机相的第二纳米结构有机涂层（128）也可沉积在第二金属表面（126）上。

公开(公告)号：US20240312954A1

公开(公告)日：2024-09-19

申请号：US18674629

申请日：2024-05-24

申请人： ADEIA SEMICONDUCTOR TECHNOLOGIES LLC

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/80 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03009 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05605 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05684 ,  H01L2224/11009 ,  H01L2224/11464 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13084 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13655 ,  H01L2224/13684 ,  H01L2224/13686 ,  H01L2224/13805 ,  H01L2224/13809 ,  H01L2224/13811 ,  H01L2224/13844 ,  H01L2224/13847 ,  H01L2224/13855 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/16265 ,  H01L2224/16268 ,  H01L2224/16501 ,  H01L2224/2919 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81026 ,  H01L2224/81065 ,  H01L2224/81099 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2224/83026 ,  H01L2224/83815 ,  H01L2225/06513 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/3841

摘要： A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

公开(公告)号：US11973056B2

公开(公告)日：2024-04-30

申请号：US18145330

申请日：2022-12-22

申请人： ADEIA SEMICONDUCTOR TECHNOLOGIES LLC

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/485 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/80 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03009 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05605 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05684 ,  H01L2224/11009 ,  H01L2224/11464 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13084 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13655 ,  H01L2224/13684 ,  H01L2224/13686 ,  H01L2224/13805 ,  H01L2224/13809 ,  H01L2224/13811 ,  H01L2224/13844 ,  H01L2224/13847 ,  H01L2224/13855 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/16265 ,  H01L2224/16268 ,  H01L2224/16501 ,  H01L2224/2919 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81026 ,  H01L2224/81065 ,  H01L2224/81099 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2224/83026 ,  H01L2224/83815 ,  H01L2225/06513 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/3841

摘要： A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

公开(公告)号：US20170047307A1

公开(公告)日：2017-02-16

申请号：US15336192

申请日：2016-10-27

申请人： Invensas Corporation

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/00

CPC分类号： H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/80 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03009 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05605 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05684 ,  H01L2224/11009 ,  H01L2224/11464 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13084 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13655 ,  H01L2224/13684 ,  H01L2224/13686 ,  H01L2224/13805 ,  H01L2224/13809 ,  H01L2224/13811 ,  H01L2224/13844 ,  H01L2224/13847 ,  H01L2224/13855 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/16265 ,  H01L2224/16268 ,  H01L2224/16501 ,  H01L2224/2919 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81026 ,  H01L2224/81065 ,  H01L2224/81099 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2224/83026 ,  H01L2224/83815 ,  H01L2225/06513 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/3841 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

摘要翻译： 制造组件的方法可以包括在第一衬底的第一表面处与第二衬底的主表面处的第二导电元件的顶表面并置第一导电元件的顶表面。 一个：第一导电元件的顶表面可以在第一表面下方凹入，或者第二导电元件的顶表面可以在主表面下方凹入。 导电纳米颗粒可以设置在第一和第二导电元件的顶表面之间。 导电纳米颗粒可以具有小于100纳米的长尺寸。 该方法还可以包括至少在并置的第一和第二导电元件的界面处升高温度至导电纳米颗粒可以在并置的第一和第二导电元件之间形成冶金接头的接合温度。

公开(公告)号：US20160247778A1

公开(公告)日：2016-08-25

申请号：US15144108

申请日：2016-05-02

申请人： Invensas Corporation

发明人： Rajesh Katkar ,  Cyprian Emeka Uzoh ,  Arkalgud R. Sitaram

IPC分类号： H01L23/00

CPC分类号： H01L24/81 ,  H01L21/768 ,  H01L23/49838 ,  H01L23/528 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/10126 ,  H01L2224/1182 ,  H01L2224/13023 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/1379 ,  H01L2224/13809 ,  H01L2224/13811 ,  H01L2224/13847 ,  H01L2224/13855 ,  H01L2224/1601 ,  H01L2224/16014 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/16507 ,  H01L2224/81007 ,  H01L2224/81048 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2224/8182 ,  H01L2224/81862 ,  H01L2224/81895 ,  H01L2224/81903 ,  H01L2224/81905 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/01051 ,  H01L2924/01327 ,  H01L2924/364 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/2064

摘要： An apparatus relates generally to a microelectronic device. In such an apparatus, a first substrate has a first surface with first interconnects located on the first surface, and a second substrate has a second surface spaced apart from the first surface with a gap between the first surface and the second surface. Second interconnects are located on the second surface. Lower surfaces of the first interconnects and upper surfaces of the second interconnects are coupled to one another for electrical conductivity between the first substrate and the second substrate. A conductive collar is around sidewalls of the first and second interconnects, and a dielectric layer is around the conductive collar.

摘要翻译： 一种装置一般涉及一种微电子装置。 在这样的装置中，第一基板具有第一表面，第一互连位于第一表面上，第二基板具有与第一表面间隔开的第二表面，第一表面与第二表面之间具有间隙。 第二互连位于第二表面上。 第一互连件的下表面和第二互连件的上表面彼此耦合，用于在第一基板和第二基板之间的导电性。 导电套环在第一和第二互连的侧壁周围，并且电介质层围绕导电套环。

公开(公告)号：US09331043B1

公开(公告)日：2016-05-03

申请号：US14609720

申请日：2015-01-30

申请人： Invensas Corporation

发明人： Rajesh Katkar ,  Cyprian Emeka Uzoh ,  Arkalgud R. Sitaram

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L23/498 ,  H01L23/528 ,  H01L21/768

CPC分类号： H01L24/81 ,  H01L21/768 ,  H01L23/49838 ,  H01L23/528 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/10126 ,  H01L2224/1182 ,  H01L2224/13023 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/1379 ,  H01L2224/13809 ,  H01L2224/13811 ,  H01L2224/13847 ,  H01L2224/13855 ,  H01L2224/1601 ,  H01L2224/16014 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/16507 ,  H01L2224/81007 ,  H01L2224/81048 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2224/8182 ,  H01L2224/81862 ,  H01L2224/81895 ,  H01L2224/81903 ,  H01L2224/81905 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/01051 ,  H01L2924/01327 ,  H01L2924/364 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/2064

摘要： An apparatus relates generally to a microelectronic device. In such an apparatus, a first substrate has a first surface with first interconnects located on the first surface, and a second substrate has a second surface spaced apart from the first surface with a gap between the first surface and the second surface. Second interconnects are located on the second surface. Lower surfaces of the first interconnects and upper surfaces of the second interconnects are coupled to one another for electrical conductivity between the first substrate and the second substrate. A conductive collar is around sidewalls of the first and second interconnects, and a dielectric layer is around the conductive collar.

公开(公告)号：US20150108638A1

公开(公告)日：2015-04-23

申请号：US14557227

申请日：2014-12-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun-Cheng Lin ,  Hsiu-Jen Lin ,  Cheng-Ting Chen ,  Wei-Yu Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/00 ,  H01L25/07

CPC分类号： H01L24/16 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/48 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/06181 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13216 ,  H01L2224/13224 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13255 ,  H01L2224/13284 ,  H01L2224/13309 ,  H01L2224/13317 ,  H01L2224/13318 ,  H01L2224/1332 ,  H01L2224/13338 ,  H01L2224/13349 ,  H01L2224/13355 ,  H01L2224/1336 ,  H01L2224/13366 ,  H01L2224/137 ,  H01L2224/13809 ,  H01L2224/13817 ,  H01L2224/13818 ,  H01L2224/1382 ,  H01L2224/13838 ,  H01L2224/13849 ,  H01L2224/13855 ,  H01L2224/1386 ,  H01L2224/13866 ,  H01L2224/14181 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16506 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/384 ,  H05K3/3436 ,  H05K3/4015 ,  H05K2201/10515 ,  Y02P70/613 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/01032 ,  H01L2924/01015 ,  H01L2924/01058 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package on package structure includes a first substrate having a first region and a second region, a bump formed on the first region of the first substrate, a first semiconductor die bonded to the second region of the first substrate, and a semiconductor die package bonded to the first substrate. The bump includes a metallic structure and a plurality of minor elements dispersed in the metallic structure. The semiconductor die package includes a connector bonded to the bump, and the first semiconductor die is between the semiconductor die package and the first substrate.

摘要翻译： 封装结构包括具有第一区域和第二区域的第一基板，形成在第一基板的第一区域上的凸块，与第一基板的第二区域接合的第一半导体管芯，以及半导体管芯封装 到第一底物。 凸块包括分散在金属结构中的金属结构和多个次要元件。 半导体管芯封装包括接合到凸块的连接器，并且第一半导体管芯位于半导体管芯封装和第一衬底之间。

公开(公告)号：US08901726B2

公开(公告)日：2014-12-02

申请号：US13708461

申请日：2012-12-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun-Cheng Lin ,  Hsiu-Jen Lin ,  Cheng-Ting Chen ,  Wei-Yu Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/02 ,  H01L25/10 ,  H01L23/00 ,  H01L25/00 ,  H01L23/498 ,  H01L25/065

CPC分类号： H01L24/16 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/48 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/06181 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13216 ,  H01L2224/13224 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13255 ,  H01L2224/13284 ,  H01L2224/13309 ,  H01L2224/13317 ,  H01L2224/13318 ,  H01L2224/1332 ,  H01L2224/13338 ,  H01L2224/13349 ,  H01L2224/13355 ,  H01L2224/1336 ,  H01L2224/13366 ,  H01L2224/137 ,  H01L2224/13809 ,  H01L2224/13817 ,  H01L2224/13818 ,  H01L2224/1382 ,  H01L2224/13838 ,  H01L2224/13849 ,  H01L2224/13855 ,  H01L2224/1386 ,  H01L2224/13866 ,  H01L2224/14181 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16506 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/384 ,  H05K3/3436 ,  H05K3/4015 ,  H05K2201/10515 ,  Y02P70/613 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/01032 ,  H01L2924/01015 ,  H01L2924/01058 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package on package structure includes a first substrate having a first region and a second region, a bump formed on the first region of the first substrate, a first semiconductor die bonded to the second region of the first substrate, and a semiconductor die package bonded to the first substrate. The bump includes a metallic structure and a plurality of minor elements dispersed in the metallic structure. The semiconductor die package includes a connector bonded to the bump, and the first semiconductor die is between the semiconductor die package and the first substrate.

摘要翻译： 封装结构包括具有第一区域和第二区域的第一基板，形成在第一基板的第一区域上的凸块，与第一基板的第二区域接合的第一半导体管芯，以及半导体管芯封装 到第一底物。 凸块包括分散在金属结构中的金属结构和多个次要元件。 半导体管芯封装包括接合到凸块的连接器，并且第一半导体管芯位于半导体管芯封装和第一衬底之间。