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公开(公告)号：US20120286423A1
公开(公告)日：2012-11-15
申请号：US13556016
申请日：2012-07-23
Applicant: Ming-Da Cheng , Ming-Che Ho , Chung-Shi Liu , Chien Ling Hwang , Cheng-Chung Lin , Hui-Jung Tsai , Zheng-Yi Lim
Inventor： Ming-Da Cheng , Ming-Che Ho , Chung-Shi Liu , Chien Ling Hwang , Cheng-Chung Lin , Hui-Jung Tsai , Zheng-Yi Lim
IPC: H01L23/498
CPC classification number: H01L24/11 , H01L21/4853 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/93 , H01L25/0657 , H01L25/50 , H01L2224/0345 , H01L2224/0346 , H01L2224/0347 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/11416 , H01L2224/11422 , H01L2224/11424 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/118 , H01L2224/1181 , H01L2224/1182 , H01L2224/11822 , H01L2224/11827 , H01L2224/11848 , H01L2224/11849 , H01L2224/119 , H01L2224/13005 , H01L2224/13111 , H01L2224/13144 , H01L2224/13155 , H01L2224/13164 , H01L2224/132 , H01L2224/13211 , H01L2224/13339 , H01L2224/13562 , H01L2224/13584 , H01L2224/13611 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13657 , H01L2224/13664 , H01L2224/1379 , H01L2224/13794 , H01L2224/13809 , H01L2224/13813 , H01L2224/13817 , H01L2224/13818 , H01L2224/1382 , H01L2224/13849 , H01L2224/13855 , H01L2224/13857 , H01L2224/1386 , H01L2224/13866 , H01L2224/16145 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2224/93 , H01L2225/06513 , H01L2924/01012 , H01L2924/01013 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01058 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/04941 , H01L2924/04953 , H01L2924/00014 , H01L2924/01039 , H01L2224/11 , H01L2924/00
Abstract: A method of forming a device includes providing a substrate, and forming a solder bump over the substrate. A minor element is introduced to a region adjacent a top surface of the solder bump. A re-flow process is then performed to the solder bump to drive the minor element into the solder bump.
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公开(公告)号：US09263390B2
公开(公告)日：2016-02-16
申请号：US13889582
申请日：2013-05-08
Applicant: Semiconductor Components Industries, LLC
Inventor： Michael J. Seddon , Francis J. Carney
IPC: H01L23/48 , H01L23/52 , H01L29/40 , H01L23/532 , H01L23/00 , H01L23/58 , H01L21/768 , H01L23/31
CPC classification number: H01L23/53238 , H01L21/76885 , H01L23/3157 , H01L23/53252 , H01L23/58 , H01L24/03 , H01L24/05 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/48 , H01L2224/02126 , H01L2224/0345 , H01L2224/03912 , H01L2224/0401 , H01L2224/05027 , H01L2224/05166 , H01L2224/05572 , H01L2224/05647 , H01L2224/11472 , H01L2224/11474 , H01L2224/11906 , H01L2224/11914 , H01L2224/13007 , H01L2224/13147 , H01L2224/13155 , H01L2224/13562 , H01L2224/13582 , H01L2224/13583 , H01L2224/13584 , H01L2224/136 , H01L2224/13611 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13664 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: In accordance with an embodiment a semiconductor component includes an electrically conductive structure formed over a portion of a semiconductor material. An electrical interconnect having a top surface and opposing edges contacts the electrically conductive structure. A protective structure is formed on the top surface and the opposing edges of the electrical interconnect and over a portion of the electrically conductive structure, wherein the protective structure forms a seal that protects the electrical interconnect.
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公开(公告)号：US09219010B2
公开(公告)日：2015-12-22
申请号：US13889573
申请日：2013-05-08
Applicant: Semiconductor Components Industries, LLC
Inventor： Michael J. Seddon , Francis J. Carney
IPC: H01L21/44 , H01L21/768 , H01L23/00 , H01L23/58 , H01L23/31
CPC classification number: H01L23/53238 , H01L21/76885 , H01L23/3157 , H01L23/53252 , H01L23/58 , H01L24/03 , H01L24/05 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/48 , H01L2224/02126 , H01L2224/0345 , H01L2224/03912 , H01L2224/0401 , H01L2224/05027 , H01L2224/05166 , H01L2224/05572 , H01L2224/05647 , H01L2224/11472 , H01L2224/11474 , H01L2224/11906 , H01L2224/11914 , H01L2224/13007 , H01L2224/13147 , H01L2224/13155 , H01L2224/13562 , H01L2224/13582 , H01L2224/13583 , H01L2224/13584 , H01L2224/136 , H01L2224/13611 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13664 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A method for manufacturing a semiconductor component that includes the use of multiple layers of photoresist. A first layer of electrically conductive material is formed over a substrate and a first layer of photoresist is formed over the first layer of electrically conductive material. A portion of the first layer of photoresist is removed leaving photoresist having sidewalls separated by a gap. A second layer of electrically conductive material having first and second sidewalls is formed in the gap. A second layer of photoresist is formed over the first layer of photoresist and over the second layer of electrically conductive material. Portions of the second layer of photoresist and the first layer of photoresist are removed to uncover the first and second edges of the second layer of electrically conductive material. A protective structure is formed over the first and second edges of the second electrically conductive material.
Abstract translation: 一种制造半导体元件的方法，包括使用多层光致抗蚀剂。 第一层导电材料形成在衬底上，第一层光致抗蚀剂形成在第一层导电材料上。 除去第一层光致抗蚀剂的一部分，留下具有通过间隙分隔的侧壁的光致抗蚀剂。 具有第一和第二侧壁的第二层导电材料形成在间隙中。 第二层光致抗蚀剂形成在第一层光致抗蚀剂上方和第二层导电材料上。 去除第二层光致抗蚀剂和第一层光致抗蚀剂的部分以露出第二层导电材料的第一和第二边缘。 在第二导电材料的第一和第二边缘上形成保护结构。
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公开(公告)号：US08434668B2
公开(公告)日：2013-05-07
申请号：US12778313
申请日：2010-05-12
Applicant: Aleksandar Aleksov , Rajasekaran Swaminathan , Ting Zhong
Inventor： Aleksandar Aleksov , Rajasekaran Swaminathan , Ting Zhong
CPC classification number: H01F1/01 , B23K1/0016 , B23K1/20 , H01L24/05 , H01L24/13 , H01L24/75 , H01L24/81 , H01L2224/0401 , H01L2224/05547 , H01L2224/0556 , H01L2224/05599 , H01L2224/131 , H01L2224/13111 , H01L2224/13116 , H01L2224/13584 , H01L2224/16225 , H01L2224/75264 , H01L2224/81192 , H01L2224/81222 , H01L2224/81234 , H01L2224/81815 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , Y10T428/24612 , H01L2924/00 , H01L2224/05552
Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein components of the microelectronic packages may have magnetic attachment structures comprising a magnetic component and a metal component. The magnetic attachment structure may be exposed to a magnetic field, which, through the vibration of the magnetic component, can heat the magnetic attachment structure, and which when placed in contact with a solder material can reflow the solder material and attach microelectronic components of the microelectronic package.
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公开(公告)号：US20230411330A1
公开(公告)日：2023-12-21
申请号：US17930688
申请日：2022-09-08
Applicant: Kioxia Corporation
Inventor： Masatoshi SHOMURA , Tatsuo MIGITA
IPC: H01L23/00 , H01L25/065
CPC classification number: H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/11 , H01L25/0657 , H01L2924/1438 , H01L2224/11013 , H01L2224/73204 , H01L2224/32225 , H01L2224/32145 , H01L2224/16225 , H01L2224/73253 , H01L2225/06517 , H01L2225/06524 , H01L2225/06527 , H01L2225/06562 , H01L2224/10156 , H01L2224/13553 , H01L2224/13584 , H01L2224/13014 , H01L2224/13016 , H01L2924/35121 , H01L2924/3511
Abstract: A semiconductor device according to the present embodiment includes an insulation member, a columnar electrode, a member, and an electrode pad. The insulation member has a first face. The columnar electrode penetrates the insulation member in a direction approximately perpendicular to the first face. The columnar electrode has a columnar electrode member and a first metal layer of at least one layer which covers an outer circumference of the columnar electrode member and which extends until becoming exposed from the first face. The member is provided on the first face and is arranged so as to overlap with at least a part of the first metal layer that is exposed from the first face as viewed from a direction approximately perpendicular to the first face. The electrode pad is provided on the first face so as to cover the member and is electrically connected to the columnar electrode member.
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Patent Agency Ranking
公开(公告)号：US11694982B2
公开(公告)日：2023-07-04
申请号：US17185244
申请日：2021-02-25
Applicant: QUALCOMM Incorporated
Inventor： Wei Hu , Dongming He , Wen Yin , Zhe Guan , Lily Zhao
IPC: H01L23/00
CPC classification number: H01L24/13 , H01L24/05 , H01L24/11 , H01L2224/11013 , H01L2224/11622 , H01L2224/11849 , H01L2224/13147 , H01L2224/13584 , H01L2224/13655
Abstract: Disclosed are examples of integrated circuit (IC) structures and techniques to fabricate IC structures. Each IC package may include a die (e.g., a flip-chip (FC) die) and one or more die interconnects to electrically couple the die to a substrate. The die interconnect may include a pillar, a wetting barrier on the pillar, and a solder cap on the wetting barrier. The wetting barrier may be wider than the pillar. The die interconnect may also include a low wetting layer formed on the wetting barrier.
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公开(公告)号：US08227334B2
公开(公告)日：2012-07-24
申请号：US12843760
申请日：2010-07-26
Applicant: Ming-Da Cheng , Ming-Che Ho , Chung-Shi Liu , Chien Ling Hwang , Cheng-Chung Lin , Hui-Jung Tsai , Zheng-Yi Lim
Inventor： Ming-Da Cheng , Ming-Che Ho , Chung-Shi Liu , Chien Ling Hwang , Cheng-Chung Lin , Hui-Jung Tsai , Zheng-Yi Lim
IPC: H01L21/00
CPC classification number: H01L24/11 , H01L21/4853 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/93 , H01L25/0657 , H01L25/50 , H01L2224/0345 , H01L2224/0346 , H01L2224/0347 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/11416 , H01L2224/11422 , H01L2224/11424 , H01L2224/1146 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/118 , H01L2224/1181 , H01L2224/1182 , H01L2224/11822 , H01L2224/11827 , H01L2224/11848 , H01L2224/11849 , H01L2224/119 , H01L2224/13005 , H01L2224/13111 , H01L2224/13144 , H01L2224/13155 , H01L2224/13164 , H01L2224/132 , H01L2224/13211 , H01L2224/13339 , H01L2224/13562 , H01L2224/13584 , H01L2224/13611 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13657 , H01L2224/13664 , H01L2224/1379 , H01L2224/13794 , H01L2224/13809 , H01L2224/13813 , H01L2224/13817 , H01L2224/13818 , H01L2224/1382 , H01L2224/13849 , H01L2224/13855 , H01L2224/13857 , H01L2224/1386 , H01L2224/13866 , H01L2224/16145 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2224/93 , H01L2225/06513 , H01L2924/01012 , H01L2924/01013 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01058 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2924/04941 , H01L2924/04953 , H01L2924/00014 , H01L2924/01039 , H01L2224/11 , H01L2924/00
Abstract: A method of forming a device includes providing a substrate, and forming a solder bump over the substrate. A minor element is introduced to a region adjacent a top surface of the solder bump. A re-flow process is then performed to the solder bump to drive the minor element into the solder bump.
Abstract translation: 形成器件的方法包括提供衬底，以及在衬底上形成焊料凸点。 将次要元件引入邻近焊料凸块顶表面的区域。 然后对焊料凸块执行再流程以将次要元件驱动到焊料凸块中。
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公开(公告)号：US09010618B2
公开(公告)日：2015-04-21
申请号：US13855100
申请日：2013-04-02
Applicant: Intel Corporation
Inventor： Aleksandar Aleksov , Rajasekaran Swaminathan , Ting Zhong
CPC classification number: H01F1/01 , B23K1/0016 , B23K1/20 , H01L24/05 , H01L24/13 , H01L24/75 , H01L24/81 , H01L2224/0401 , H01L2224/05547 , H01L2224/0556 , H01L2224/05599 , H01L2224/131 , H01L2224/13111 , H01L2224/13116 , H01L2224/13584 , H01L2224/16225 , H01L2224/75264 , H01L2224/81192 , H01L2224/81222 , H01L2224/81234 , H01L2224/81815 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , Y10T428/24612 , H01L2924/00 , H01L2224/05552
Abstract: The present disclosure relates to the field of fabricating microelectronic packages, wherein components of the microelectronic packages may have magnetic attachment structures comprising a magnetic component and a metal component. The magnetic attachment structure may be exposed to a magnetic field, which, through the vibration of the magnetic component, can heat the magnetic attachment structure, and which when placed in contact with a solder material can reflow the solder material and attach microelectronic components of the microelectronic package.
Abstract translation: 本公开涉及制造微电子封装的领域，其中微电子封装的部件可具有包括磁性部件和金属部件的磁性附接结构。 磁性附着结构可能暴露于磁场，通过磁性部件的振动可以加热磁性附着结构，并且当与焊料材料接触时，磁性附着结构可以回流焊料材料并附着微电子部件 微电子封装。
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公开(公告)号：US20130244418A1
公开(公告)日：2013-09-19
申请号：US13889573
申请日：2013-05-08
Applicant: Michael J. Seddon , Francis J. Carney
Inventor： Michael J. Seddon , Francis J. Carney
IPC: H01L21/768
CPC classification number: H01L23/53238 , H01L21/76885 , H01L23/3157 , H01L23/53252 , H01L23/58 , H01L24/03 , H01L24/05 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/48 , H01L2224/02126 , H01L2224/0345 , H01L2224/03912 , H01L2224/0401 , H01L2224/05027 , H01L2224/05166 , H01L2224/05572 , H01L2224/05647 , H01L2224/11472 , H01L2224/11474 , H01L2224/11906 , H01L2224/11914 , H01L2224/13007 , H01L2224/13147 , H01L2224/13155 , H01L2224/13562 , H01L2224/13582 , H01L2224/13583 , H01L2224/13584 , H01L2224/136 , H01L2224/13611 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13664 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A method for manufacturing a semiconductor component that includes the use of multiple layers of photoresist. A first layer of electrically conductive material is formed over a substrate and a first layer of photoresist is formed over the first layer of electrically conductive material. A portion of the first layer of photoresist is removed leaving photoresist having sidewalls separated by a gap. A second layer of electrically conductive material having first and second sidewalls is formed in the gap. A second layer of photoresist is formed over the first layer of photoresist and over the second layer of electrically conductive material. Portions of the second layer of photoresist and the first layer of photoresist are removed to uncover the first and second edges of the second layer of electrically conductive material. A protective structure is formed over the first and second edges of the second electrically conductive material.
Abstract translation: 一种制造半导体元件的方法，包括使用多层光致抗蚀剂。 第一层导电材料形成在衬底上，第一层光致抗蚀剂形成在第一层导电材料上。 除去第一层光致抗蚀剂的一部分，留下具有通过间隙分隔的侧壁的光致抗蚀剂。 具有第一和第二侧壁的第二层导电材料形成在间隙中。 第二层光致抗蚀剂形成在第一层光致抗蚀剂上方和第二层导电材料上。 去除第二层光致抗蚀剂和第一层光致抗蚀剂的部分以露出第二层导电材料的第一和第二边缘。 在第二导电材料的第一和第二边缘上形成保护结构。
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公开(公告)号：US20130234311A1
公开(公告)日：2013-09-12
申请号：US13889582
申请日：2013-05-08
Applicant: Michael J. Seddon , Francis J. Carney
Inventor： Michael J. Seddon , Francis J. Carney
IPC: H01L23/58
CPC classification number: H01L23/53238 , H01L21/76885 , H01L23/3157 , H01L23/53252 , H01L23/58 , H01L24/03 , H01L24/05 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/48 , H01L2224/02126 , H01L2224/0345 , H01L2224/03912 , H01L2224/0401 , H01L2224/05027 , H01L2224/05166 , H01L2224/05572 , H01L2224/05647 , H01L2224/11472 , H01L2224/11474 , H01L2224/11906 , H01L2224/11914 , H01L2224/13007 , H01L2224/13147 , H01L2224/13155 , H01L2224/13562 , H01L2224/13582 , H01L2224/13583 , H01L2224/13584 , H01L2224/136 , H01L2224/13611 , H01L2224/13644 , H01L2224/13647 , H01L2224/13655 , H01L2224/13664 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2224/05552 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: In accordance with an embodiment a semiconductor component includes an electrically conductive structure formed over a portion of a semiconductor material. An electrical interconnect having a top surface and opposing edges contacts the electrically conductive structure. A protective structure is formed on the top surface and the opposing edges of the electrical interconnect and over a portion of the electrically conductive structure, wherein the protective structure forms a seal that protects the electrical interconnect.
Abstract translation: 根据实施例，半导体部件包括形成在半导体材料的一部分上的导电结构。 具有顶表面和相对边缘的电互连接触导电结构。 在电互连的顶表面和相对边缘以及导电结构的一部分之上形成保护结构，其中保护结构形成保护电互连的密封。
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