公开(公告)号：US12027487B2

公开(公告)日：2024-07-02

申请号：US18145310

申请日：2022-12-22

申请人： ADEIA SEMICONDUCTOR TECHNOLOGIES LLC

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/538 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/80 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03009 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05605 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05684 ,  H01L2224/11009 ,  H01L2224/11464 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13084 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13655 ,  H01L2224/13684 ,  H01L2224/13686 ,  H01L2224/13805 ,  H01L2224/13809 ,  H01L2224/13811 ,  H01L2224/13844 ,  H01L2224/13847 ,  H01L2224/13855 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/16265 ,  H01L2224/16268 ,  H01L2224/16501 ,  H01L2224/2919 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81026 ,  H01L2224/81065 ,  H01L2224/81099 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2224/83026 ,  H01L2224/83815 ,  H01L2225/06513 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/3841

摘要： A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

公开(公告)号：US20230335531A1

公开(公告)日：2023-10-19

申请号：US18145310

申请日：2022-12-22

申请人： ADEIA SEMICONDUCTOR TECHNOLOGIES LLC

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L24/81 ,  H01L24/17 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L24/11 ,  H01L24/80 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/81026 ,  H01L2224/83026 ,  H01L2224/16501 ,  H01L2924/01029 ,  H01L2924/01013 ,  H01L2924/01074 ,  H01L2924/01047 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01031 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2224/16148 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2225/06513 ,  H01L2224/80895 ,  H01L2224/13684 ,  H01L2224/13562 ,  H01L2224/13844 ,  H01L2224/05605 ,  H01L2224/8181 ,  H01L2224/0401 ,  H01L2224/81193 ,  H01L2224/05611 ,  H01L2224/81065 ,  H01L2224/13655 ,  H01L2224/03009 ,  H01L2224/05639 ,  H01L2224/13847 ,  H01L2224/80896 ,  H01L2224/16268 ,  H01L2224/81099 ,  H01L2224/16238 ,  H01L2224/05684 ,  H01L2224/13805 ,  H01L2224/11464 ,  H01L2224/13018 ,  H01L2224/13686 ,  H01L2224/05572 ,  H01L2224/13019 ,  H01L2224/05616 ,  H01L2224/13084 ,  H01L2224/13809 ,  H01L2224/2919 ,  H01L2224/13564 ,  H01L2224/05644 ,  H01L2224/13855 ,  H01L2224/05609 ,  H01L2224/13811 ,  H01L2224/11009 ,  H01L2224/05571 ,  H01L2224/80357 ,  H01L2224/83815 ,  H01L2924/014 ,  H01L2924/3841 ,  H01L2224/16265

摘要： A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

公开(公告)号：US11715730B2

公开(公告)日：2023-08-01

申请号：US17327169

申请日：2021-05-21

申请人： ADEIA SEMICONDUCTOR TECHNOLOGIES LLC

发明人： Min Tao ,  Liang Wang ,  Rajesh Katkar ,  Cyprian Emeka Uzoh

IPC分类号： H01L25/16 ,  H01L33/00 ,  H01L25/10 ,  H01L27/12 ,  H01L27/15 ,  H01L25/18 ,  H01L21/321 ,  H01L21/02 ,  H01L23/00 ,  H01L33/06 ,  H01L33/32 ,  H01L33/44 ,  H01L33/46 ,  H01L33/62

CPC分类号： H01L25/167 ,  H01L21/02118 ,  H01L21/3212 ,  H01L24/08 ,  H01L24/80 ,  H01L25/105 ,  H01L25/18 ,  H01L27/1214 ,  H01L27/156 ,  H01L33/007 ,  H01L33/0093 ,  H01L33/06 ,  H01L33/32 ,  H01L33/44 ,  H01L33/46 ,  H01L33/62 ,  H01L2224/08145 ,  H01L2224/80013 ,  H01L2224/80355 ,  H01L2224/80357 ,  H01L2933/0016 ,  H01L2933/0025 ,  H01L2933/0066

摘要： Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.

公开(公告)号：US11710718B2

公开(公告)日：2023-07-25

申请号：US17140519

申请日：2021-01-04

申请人： ADEIA SEMICONDUCTOR TECHNOLOGIES LLC

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/80 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03009 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05605 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05684 ,  H01L2224/11009 ,  H01L2224/11464 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13084 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13655 ,  H01L2224/13684 ,  H01L2224/13686 ,  H01L2224/13805 ,  H01L2224/13809 ,  H01L2224/13811 ,  H01L2224/13844 ,  H01L2224/13847 ,  H01L2224/13855 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/16265 ,  H01L2224/16268 ,  H01L2224/16501 ,  H01L2224/2919 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81026 ,  H01L2224/81065 ,  H01L2224/8181 ,  H01L2224/81099 ,  H01L2224/81193 ,  H01L2224/83026 ,  H01L2224/83815 ,  H01L2225/06513 ,  H01L2924/014 ,  H01L2924/0105 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/3841 ,  H01L2224/13655 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13684 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05611 ,  H01L2924/00014 ,  H01L2224/05684 ,  H01L2924/00014 ,  H01L2224/05616 ,  H01L2924/00014 ,  H01L2224/05605 ,  H01L2924/00014 ,  H01L2224/05609 ,  H01L2924/00014 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/13811 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13809 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13805 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13847 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13855 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/13844 ,  H01L2924/013 ,  H01L2924/00014 ,  H01L2224/05571 ,  H01L2924/00012 ,  H01L2224/05572 ,  H01L2924/00012

摘要： A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

公开(公告)号：US20230187264A1

公开(公告)日：2023-06-15

申请号：US18064551

申请日：2022-12-12

申请人： ADEIA SEMICONDUCTOR TECHNOLOGIES LLC

发明人： Cyprian Emeka Uzoh ,  Laura Wills Mirkarimi

IPC分类号： H01L21/762 ,  H01L21/02 ,  H01L21/304 ,  H01L21/3205 ,  H01L21/324 ,  H01L21/768

CPC分类号： H01L21/76202 ,  H01L21/304 ,  H01L21/324 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02345 ,  H01L21/32051 ,  H01L21/76898

摘要： Disclosed herein are methods for direct bonding. In some embodiments, the direct bonding method includes microwave annealing a dielectric bonding layer of a first element by exposing the dielectric bonding layer to microwave radiation and then directly bonding the dielectric bonding layer of the first element to a second element without an intervening adhesive. The bonding method also includes depositing the dielectric bonding layer on a semiconductor portion of the first element at a first temperature and microwave annealing the dielectric bonding layer at a second temperature lower than the first temperature.

公开(公告)号：US20240334733A1

公开(公告)日：2024-10-03

申请号：US18129653

申请日：2023-03-31

申请人： Adeia Semiconductor Technologies LLC

发明人： Oliver Zhao ,  Cyprian Emeka Uzoh ,  Thomas Workman ,  Guilian Gao

IPC分类号： H10K50/19 ,  H10K50/13 ,  H10K85/30

CPC分类号： H10K50/19 ,  H10K50/13 ,  H10K85/371

摘要： A tandem OLED device is formed by patterning a first side of a substrate to form a first OLED opening, forming a first material layer stack in the first OLED opening, the first material layer stack comprising a first charge generation layer (CGL) and a second CGL disposed on the first CGL. After forming the first CGL and the second CGL, a second side of the substrate, opposite the first side, is patterned to form a second OLED opening in registration with the first OLED opening. A second material layer stack is formed in the second OLED opening.

公开(公告)号：US20230317703A1

公开(公告)日：2023-10-05

申请号：US18206512

申请日：2023-06-06

申请人： ADEIA SEMICONDUCTOR TECHNOLOGIES LLC

发明人： Min Tao ,  Liang Wang ,  Rajesh Katkar ,  Cyprian Emeka Uzoh

IPC分类号： H01L25/16 ,  H01L33/00 ,  H01L25/10 ,  H01L27/12 ,  H01L27/15 ,  H01L25/18 ,  H01L21/321 ,  H01L21/02 ,  H01L23/00

CPC分类号： H01L25/167 ,  H01L33/007 ,  H01L25/105 ,  H01L27/1214 ,  H01L27/156 ,  H01L25/18 ,  H01L21/3212 ,  H01L21/02118 ,  H01L24/80 ,  H01L24/08 ,  H01L33/0093 ,  H01L33/06

摘要： Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.

公开(公告)号：US11999001B2

公开(公告)日：2024-06-04

申请号：US17545322

申请日：2021-12-08

申请人： Adeia Semiconductor Technologies LLC

发明人： Cyprian Emeka Uzoh

IPC分类号： H05K1/11 ,  B23K20/00 ,  B23K20/02 ,  H01L21/50 ,  H01L23/00 ,  H01L23/10 ,  H01L23/48 ,  H01L23/49 ,  H01L23/498 ,  H05K1/14 ,  H05K1/18 ,  H05K3/00 ,  H05K3/34 ,  H05K13/04 ,  H01L21/48 ,  H01L21/768

CPC分类号： B23K20/023 ,  B23K20/002 ,  H01L21/50 ,  H01L23/10 ,  H01L23/481 ,  H01L23/49 ,  H01L23/49811 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/98 ,  H05K1/11 ,  H05K1/14 ,  H05K1/144 ,  H05K1/18 ,  H05K3/0094 ,  H05K3/34 ,  H05K13/046 ,  H05K13/0465 ,  H01L21/4853 ,  H01L21/76898 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/27 ,  H01L2224/02372 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05138 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/13009 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13138 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13184 ,  H01L2224/1319 ,  H01L2224/14131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/16501 ,  H01L2224/16503 ,  H01L2224/16505 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/29011 ,  H01L2224/29023 ,  H01L2224/2908 ,  H01L2224/29082 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29138 ,  H01L2224/29147 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/32505 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/81075 ,  H01L2224/8112 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/83075 ,  H01L2224/8312 ,  H01L2224/83193 ,  H01L2224/83825 ,  H01L2924/00014 ,  H01L2924/381 ,  H05K1/111 ,  H05K2201/04 ,  H05K2203/04 ,  H01L2224/8112 ,  H01L2924/00014 ,  H01L2224/1147 ,  H01L2924/00014 ,  H01L2224/05187 ,  H01L2924/04953 ,  H01L2224/0518 ,  H01L2924/01071 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05181 ,  H01L2924/00014 ,  H01L2224/05171 ,  H01L2924/01042 ,  H01L2224/05138 ,  H01L2924/01015 ,  H01L2924/00014 ,  H01L2224/05184 ,  H01L2924/00014 ,  H01L2224/05164 ,  H01L2924/00014 ,  H01L2224/05187 ,  H01L2924/04941 ,  H01L2224/05155 ,  H01L2924/01015 ,  H01L2224/05157 ,  H01L2924/01015 ,  H01L2224/05166 ,  H01L2924/01074 ,  H01L2224/05155 ,  H01L2924/01074 ,  H01L2224/13105 ,  H01L2924/01047 ,  H01L2224/13109 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2224/13138 ,  H01L2924/01034 ,  H01L2224/11462 ,  H01L2924/00014 ,  H01L2224/11464 ,  H01L2924/00014 ,  H01L2224/1145 ,  H01L2924/00014 ,  H01L2224/11452 ,  H01L2924/00014 ,  H01L2224/16501 ,  H01L2924/00012 ,  H01L2224/16505 ,  H01L2924/00012 ,  H01L2224/14131 ,  H01L2924/00014 ,  H01L2224/05026 ,  H01L2924/00012 ,  H01L2224/05571 ,  H01L2924/00012 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13184 ,  H01L2924/00014 ,  H01L2224/73103 ,  H01L2924/00012 ,  H01L2224/73203 ,  H01L2924/00012 ,  H01L2224/27462 ,  H01L2924/00014 ,  H01L2224/27464 ,  H01L2924/00014 ,  H01L2224/2745 ,  H01L2924/00014 ,  H01L2224/27452 ,  H01L2924/00014 ,  H01L2224/29105 ,  H01L2924/01047 ,  H01L2224/29109 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2224/29138 ,  H01L2924/01034 ,  H01L2224/32501 ,  H01L2924/00012 ,  H01L2224/32505 ,  H01L2924/00012 ,  H01L2224/8312 ,  H01L2924/00014 ,  H01L2224/1319 ,  H01L2924/07025 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2224/13018 ,  H01L2924/00012

摘要： A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.

公开(公告)号：US20240312954A1

公开(公告)日：2024-09-19

申请号：US18674629

申请日：2024-05-24

申请人： ADEIA SEMICONDUCTOR TECHNOLOGIES LLC

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/80 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03009 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05605 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05684 ,  H01L2224/11009 ,  H01L2224/11464 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13084 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13655 ,  H01L2224/13684 ,  H01L2224/13686 ,  H01L2224/13805 ,  H01L2224/13809 ,  H01L2224/13811 ,  H01L2224/13844 ,  H01L2224/13847 ,  H01L2224/13855 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/16265 ,  H01L2224/16268 ,  H01L2224/16501 ,  H01L2224/2919 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81026 ,  H01L2224/81065 ,  H01L2224/81099 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2224/83026 ,  H01L2224/83815 ,  H01L2225/06513 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/3841

摘要： A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

公开(公告)号：US12087629B2

公开(公告)日：2024-09-10

申请号：US15157197

申请日：2016-05-17

申请人： Adeia Semiconductor Technologies LLC

发明人： Cyprian Emeka Uzoh

IPC分类号： H01L21/768 ,  H01L23/48 ,  H01L23/532 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L23/5329 ,  H01L2225/06544

摘要： Through-dielectric-vias (TDVs) for 3D integrated circuits in silicon are provided. Example structures and processes fabricate conductive vertical pillars for an integrated circuit assembly in a volume of dielectric material instead of in silicon. For example, a block of a silicon substrate may be removed and replaced with dielectric material, and then a plurality of the conductive pillars can be fabricated through the dielectric block. The through-dielectric-vias are shielded from devices and from each other by an intervening thickness of the dielectric sufficient to reduce noise, signal coupling, and frequency losses. The through-dielectric-vias can provide improved stress management and reduced keep-out-zones, reduced via-to-via and via-to-device coupling because of relatively large dielectric spacing and low-k dielectrics that can be used, reduced parasitic capacitance, faster switching speeds, lower heat dissipation requirements, lower production costs, easy miniaturization that is scalable to large assemblies and interposers, and high performance stacked assemblies.