公开(公告)号：US20100193952A1

公开(公告)日：2010-08-05

申请号：US12386238

申请日：2009-04-14

Applicant: Leonel Arana ,  Michael Newman ,  Devendra Natekar

Inventor： Leonel Arana ,  Michael Newman ,  Devendra Natekar

IPC: H01L23/48

CPC classification number: H01L21/76898 ,  H01L21/2885 ,  H01L23/481 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/11 ,  H01L2224/11424 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13009 ,  H01L2224/13216 ,  H01L2224/13224 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13284 ,  H01L2224/13384 ,  H01L2224/13386 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01322 ,  H01L2924/12033 ,  H01L2924/14 ,  H01L2924/0105 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A method, apparatus and system with an electrically conductive through hole via of a composite material with a matrix forming a continuous phase and embedded particles, with a different material property than the matrix, forming a dispersed phase, the resulting composite material having a different material property than the matrix.

Abstract translation: 一种具有导电通孔通孔的方法，装置和系统，其具有形成连续相的基质的复合材料的导电通孔，并且具有与基质不同的材料性质的嵌入的颗粒，形成分散相，所得复合材料具有不同的材料 属性比矩阵。

公开(公告)号：US20140159233A1

公开(公告)日：2014-06-12

申请号：US13708461

申请日：2012-12-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chun-Cheng Lin ,  Hsiu-Jen Lin ,  Cheng-Ting Chen ,  Wei-Yu Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L24/16 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/48 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/06181 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13216 ,  H01L2224/13224 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13255 ,  H01L2224/13284 ,  H01L2224/13309 ,  H01L2224/13317 ,  H01L2224/13318 ,  H01L2224/1332 ,  H01L2224/13338 ,  H01L2224/13349 ,  H01L2224/13355 ,  H01L2224/1336 ,  H01L2224/13366 ,  H01L2224/137 ,  H01L2224/13809 ,  H01L2224/13817 ,  H01L2224/13818 ,  H01L2224/1382 ,  H01L2224/13838 ,  H01L2224/13849 ,  H01L2224/13855 ,  H01L2224/1386 ,  H01L2224/13866 ,  H01L2224/14181 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16506 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/384 ,  H05K3/3436 ,  H05K3/4015 ,  H05K2201/10515 ,  Y02P70/613 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/01032 ,  H01L2924/01015 ,  H01L2924/01058 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package on package structure includes a first substrate having a first region and a second region, a bump formed on the first region of the first substrate, a first semiconductor die bonded to the second region of the first substrate, and a semiconductor die package bonded to the first substrate. The bump includes a metallic structure and a plurality of minor elements dispersed in the metallic structure. The semiconductor die package includes a connector bonded to the bump, and the first semiconductor die is between the semiconductor die package and the first substrate.

Abstract translation: 封装结构包括具有第一区域和第二区域的第一基板，形成在第一基板的第一区域上的凸块，与第一基板的第二区域接合的第一半导体管芯，以及半导体管芯封装 到第一底物。 凸块包括分散在金属结构中的金属结构和多个次要元件。 半导体管芯封装包括接合到凸块的连接器，并且第一半导体管芯位于半导体管芯封装和第一衬底之间。

公开(公告)号：US20070001266A1

公开(公告)日：2007-01-04

申请号：US11174125

申请日：2005-06-30

Applicant: Leonel Arana ,  Michael Newman ,  Devendra Natekar

Inventor： Leonel Arana ,  Michael Newman ,  Devendra Natekar

IPC: H01L29/40 ,  H01L21/44

CPC classification number: H01L21/76898 ,  H01L21/2885 ,  H01L23/481 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/11 ,  H01L2224/11424 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13009 ,  H01L2224/13216 ,  H01L2224/13224 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13284 ,  H01L2224/13384 ,  H01L2224/13386 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01322 ,  H01L2924/12033 ,  H01L2924/14 ,  H01L2924/0105 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A method, apparatus and system with an electrically conductive through hole via of a composite material with a matrix forming a continuous phase and embedded particles, with a different material property than the matrix, forming a dispersed phase, the resulting composite material having a different material property than the matrix.

Abstract translation: 一种具有导电通孔通孔的方法，装置和系统，其具有形成连续相的基质的复合材料的导电通孔，并且具有与基质不同的材料性质的嵌入的颗粒，形成分散相，所得复合材料具有不同的材料 属性比矩阵。

公开(公告)号：US09230935B2

公开(公告)日：2016-01-05

申请号：US14557227

申请日：2014-12-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Cheng Lin ,  Hsiu-Jen Lin ,  Cheng-Ting Chen ,  Wei-Yu Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/02 ,  H01L23/00 ,  H01L23/498 ,  H01L25/10 ,  H01L25/065 ,  H01L25/00 ,  H05K3/34 ,  H05K3/40 ,  H01L25/07

CPC classification number: H01L24/16 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/48 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/06181 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13216 ,  H01L2224/13224 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13255 ,  H01L2224/13284 ,  H01L2224/13309 ,  H01L2224/13317 ,  H01L2224/13318 ,  H01L2224/1332 ,  H01L2224/13338 ,  H01L2224/13349 ,  H01L2224/13355 ,  H01L2224/1336 ,  H01L2224/13366 ,  H01L2224/137 ,  H01L2224/13809 ,  H01L2224/13817 ,  H01L2224/13818 ,  H01L2224/1382 ,  H01L2224/13838 ,  H01L2224/13849 ,  H01L2224/13855 ,  H01L2224/1386 ,  H01L2224/13866 ,  H01L2224/14181 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16506 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/384 ,  H05K3/3436 ,  H05K3/4015 ,  H05K2201/10515 ,  Y02P70/613 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/01032 ,  H01L2924/01015 ,  H01L2924/01058 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package on package structure includes a first substrate having a first region and a second region, a bump formed on the first region of the first substrate, a first semiconductor die bonded to the second region of the first substrate, and a semiconductor die package bonded to the first substrate. The bump includes a metallic structure and a plurality of minor elements dispersed in the metallic structure. The semiconductor die package includes a connector bonded to the bump, and the first semiconductor die is between the semiconductor die package and the first substrate.

Abstract translation: 封装结构包括具有第一区域和第二区域的第一基板，形成在第一基板的第一区域上的凸块，与第一基板的第二区域接合的第一半导体管芯，以及半导体管芯封装 到第一底物。 凸块包括分散在金属结构中的金属结构和多个次要元件。 半导体管芯封装包括接合到凸块的连接器，并且第一半导体管芯位于半导体管芯封装和第一衬底之间。

公开(公告)号：US08592299B1

公开(公告)日：2013-11-26

申请号：US13358716

申请日：2012-01-26

Applicant: Voya R. Markovich ,  Rabindra N. Das ,  Rajinder S. Rai ,  Michael Vincent

Inventor： Voya R. Markovich ,  Rabindra N. Das ,  Rajinder S. Rai ,  Michael Vincent

IPC: H01L21/44

CPC classification number: H01L21/441 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L27/14676 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/1132 ,  H01L2224/11424 ,  H01L2224/13209 ,  H01L2224/13211 ,  H01L2224/13213 ,  H01L2224/13216 ,  H01L2224/13218 ,  H01L2224/1322 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/1329 ,  H01L2224/13294 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13439 ,  H01L2224/13444 ,  H01L2224/16225 ,  H01L2224/81193 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2224/8184 ,  H01L2924/12037 ,  H01L2924/00

Abstract: A structure for minimizing resistance between a semi-insulating x-ray detector crystal and an electrically conducting substrate. Electrical contact pads are disposed on the detector crystal and on the substrate with an electrical interconnect between the contact pads formed from a conductive adhesive and washed solder in electrical and mechanical communication with the pads.

Abstract translation: 用于最小化半绝缘x射线检测器晶体和导电基底之间的电阻的结构。 电接触焊盘设置在检测器晶体和基板上，在由导电粘合剂形成的接触焊盘和与焊盘电气和机械连通的冲洗焊料之间具有电互连。

公开(公告)号：US20170256496A1

公开(公告)日：2017-09-07

申请号：US15440442

申请日：2017-02-23

Applicant: XINTEC INC.

Inventor： Chia-Sheng LIN ,  Chaung-Lin LAI ,  Kuei-Wei CHEN

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L27/14618 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14683 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02372 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/05008 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/0529 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/11 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/13211 ,  H01L2224/13216 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13255 ,  H01L2924/146 ,  H01L2924/19102 ,  H01L2924/301 ,  H01L2924/00014 ,  H01L2924/013 ,  H01L2924/06 ,  H01L2924/01074

Abstract: A chip package including a substrate is provided. A sensing region or device region of the substrate is electrically connected to a conducting pad. A first insulating layer is disposed on the substrate. A redistribution layer is disposed on the first insulating layer. A first portion and a second portion of the redistribution layer are electrically connected to the conducting pad. A second insulating layer conformally extends on the first insulating layer, and covers side surfaces of the first portion and the second portion. A protection layer is disposed on the second insulating layer. A portion of the second insulating layer is located between the protection layer and the first insulating layer. A method of forming the chip package is also provided.

公开(公告)号：US20150108638A1

公开(公告)日：2015-04-23

申请号：US14557227

申请日：2014-12-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Cheng Lin ,  Hsiu-Jen Lin ,  Cheng-Ting Chen ,  Wei-Yu Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/00 ,  H01L25/07

CPC classification number: H01L24/16 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/48 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/06181 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13216 ,  H01L2224/13224 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13255 ,  H01L2224/13284 ,  H01L2224/13309 ,  H01L2224/13317 ,  H01L2224/13318 ,  H01L2224/1332 ,  H01L2224/13338 ,  H01L2224/13349 ,  H01L2224/13355 ,  H01L2224/1336 ,  H01L2224/13366 ,  H01L2224/137 ,  H01L2224/13809 ,  H01L2224/13817 ,  H01L2224/13818 ,  H01L2224/1382 ,  H01L2224/13838 ,  H01L2224/13849 ,  H01L2224/13855 ,  H01L2224/1386 ,  H01L2224/13866 ,  H01L2224/14181 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16506 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/384 ,  H05K3/3436 ,  H05K3/4015 ,  H05K2201/10515 ,  Y02P70/613 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/01032 ,  H01L2924/01015 ,  H01L2924/01058 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package on package structure includes a first substrate having a first region and a second region, a bump formed on the first region of the first substrate, a first semiconductor die bonded to the second region of the first substrate, and a semiconductor die package bonded to the first substrate. The bump includes a metallic structure and a plurality of minor elements dispersed in the metallic structure. The semiconductor die package includes a connector bonded to the bump, and the first semiconductor die is between the semiconductor die package and the first substrate.

Abstract translation: 封装结构包括具有第一区域和第二区域的第一基板，形成在第一基板的第一区域上的凸块，与第一基板的第二区域接合的第一半导体管芯，以及半导体管芯封装 到第一底物。 凸块包括分散在金属结构中的金属结构和多个次要元件。 半导体管芯封装包括接合到凸块的连接器，并且第一半导体管芯位于半导体管芯封装和第一衬底之间。

公开(公告)号：US08901726B2

公开(公告)日：2014-12-02

申请号：US13708461

申请日：2012-12-07

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Cheng Lin ,  Hsiu-Jen Lin ,  Cheng-Ting Chen ,  Wei-Yu Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/02 ,  H01L25/10 ,  H01L23/00 ,  H01L25/00 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L24/16 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L24/48 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/06181 ,  H01L2224/111 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13216 ,  H01L2224/13224 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13255 ,  H01L2224/13284 ,  H01L2224/13309 ,  H01L2224/13317 ,  H01L2224/13318 ,  H01L2224/1332 ,  H01L2224/13338 ,  H01L2224/13349 ,  H01L2224/13355 ,  H01L2224/1336 ,  H01L2224/13366 ,  H01L2224/137 ,  H01L2224/13809 ,  H01L2224/13817 ,  H01L2224/13818 ,  H01L2224/1382 ,  H01L2224/13838 ,  H01L2224/13849 ,  H01L2224/13855 ,  H01L2224/1386 ,  H01L2224/13866 ,  H01L2224/14181 ,  H01L2224/1601 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16506 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/384 ,  H05K3/3436 ,  H05K3/4015 ,  H05K2201/10515 ,  Y02P70/613 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/01032 ,  H01L2924/01015 ,  H01L2924/01058 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package on package structure includes a first substrate having a first region and a second region, a bump formed on the first region of the first substrate, a first semiconductor die bonded to the second region of the first substrate, and a semiconductor die package bonded to the first substrate. The bump includes a metallic structure and a plurality of minor elements dispersed in the metallic structure. The semiconductor die package includes a connector bonded to the bump, and the first semiconductor die is between the semiconductor die package and the first substrate.

Abstract translation: 封装结构包括具有第一区域和第二区域的第一基板，形成在第一基板的第一区域上的凸块，与第一基板的第二区域接合的第一半导体管芯，以及半导体管芯封装 到第一底物。 凸块包括分散在金属结构中的金属结构和多个次要元件。 半导体管芯封装包括接合到凸块的连接器，并且第一半导体管芯位于半导体管芯封装和第一衬底之间。

公开(公告)号：US07528006B2

公开(公告)日：2009-05-05

申请号：US11174125

申请日：2005-06-30

Applicant: Leonel Arana ,  Michael Newman ,  Devendra Natekar

Inventor： Leonel Arana ,  Michael Newman ,  Devendra Natekar

IPC: H01L21/44

CPC classification number: H01L21/76898 ,  H01L21/2885 ,  H01L23/481 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/11 ,  H01L2224/11424 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13009 ,  H01L2224/13216 ,  H01L2224/13224 ,  H01L2224/13239 ,  H01L2224/13244 ,  H01L2224/13247 ,  H01L2224/13284 ,  H01L2224/13384 ,  H01L2224/13386 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01322 ,  H01L2924/12033 ,  H01L2924/14 ,  H01L2924/0105 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A method, apparatus and system with an electrically conductive through hole via of a composite material with a matrix forming a continuous phase and embedded particles, with a different material property than the matrix, forming a dispersed phase, the resulting composite material having a different material property than the matrix.

Abstract translation: 一种具有导电通孔通孔的方法，装置和系统，其具有形成连续相的基质的复合材料的导电通孔，并且具有与基质不同的材料性质的嵌入的颗粒，形成分散相，所得复合材料具有不同的材料 属性比矩阵。