公开(公告)号：US11830837B2

公开(公告)日：2023-11-28

申请号：US17524928

申请日：2021-11-12

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tse-Yao Huang

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L25/065

CPC分类号： H01L24/08 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/89 ,  H01L25/0657 ,  H01L2224/0391 ,  H01L2224/03622 ,  H01L2224/03848 ,  H01L2224/0807 ,  H01L2224/08148 ,  H01L2224/80001

摘要： The present application provides a semiconductor package with air gaps for reducing capacitive coupling between conductive features and a method for manufacturing the semiconductor package. The semiconductor package includes a first semiconductor structure and a second semiconductor structure bonded with the first semiconductor structure. The first semiconductor structure has a first bonding surface. The second semiconductor structure has a second bonding surface partially in contact with the first bonding surface. A portion of the first bonding surface is separated from a portion of the second bonding surface, a space between the portions of the first and second bonding surfaces is sealed and forms an air gap in the semiconductor package.

公开(公告)号：US20190221533A1

公开(公告)日：2019-07-18

申请号：US16246912

申请日：2019-01-14

申请人： Infineon Technologies AG

发明人： Horst THEUSS ,  Rudolf BERGER ,  Walter HARTNER ,  Veronika HUBER ,  Werner ROBL

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L21/48

CPC分类号： H01L24/05 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0231 ,  H01L2224/0239 ,  H01L2224/03462 ,  H01L2224/03848 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2924/3512

摘要： A semiconductor device includes a semiconductor chip, an electrical connection element for electrically connecting the semiconductor device to a carrier, and a metallization adjoining the electrical connection element, the metallization contains porous nanocrystalline copper that contains portions of organic acids.

公开(公告)号：US20180350761A1

公开(公告)日：2018-12-06

申请号：US16101114

申请日：2018-08-10

申请人： Infineon Technologies AG

发明人： Manfred Schneegans ,  Franziska Haering ,  Hans-Joachim Schulze ,  Bernhard Weidgans

IPC分类号： H01L23/00 ,  H01L21/768 ,  H01L23/532 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66 ,  H01L29/739

CPC分类号： H01L24/05 ,  H01L21/76843 ,  H01L21/76858 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L24/03 ,  H01L29/407 ,  H01L29/417 ,  H01L29/41741 ,  H01L29/42376 ,  H01L29/45 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/7396 ,  H01L29/7397 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03848 ,  H01L2224/03912 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01013 ,  H01L2924/01074

摘要： A method of manufacturing a semiconductor device includes forming a semiconductor substrate that has a conductive structure, and forming a precursor auxiliary layer stack on a first section of the conductive structure. The precursor auxiliary layer stack has a precursor adhesion layer and a precursor barrier layer between the precursor adhesion layer and the conductive structure. The precursor adhesion layer contains a second metal. The method further includes forming, on the precursor auxiliary layer stack, a metal structure containing a first metal and forming, from portions of the precursor auxiliary layer stack an adhesive layer containing the first and second metals.

公开(公告)号：US20180019191A1

公开(公告)日：2018-01-18

申请号：US15715515

申请日：2017-09-26

申请人： INVENSAS CORPORATION

发明人： Cyprian Emeka UZOH ,  Rajesh Katkar

IPC分类号： H01L23/498 ,  B23K1/00 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  B32B15/01 ,  B23K35/22 ,  B23K35/02 ,  H01L25/10 ,  H01L25/00 ,  H01L21/56 ,  B23K101/40

CPC分类号： H01L23/49811 ,  B23K1/0016 ,  B23K35/0244 ,  B23K35/0266 ,  B23K35/22 ,  B23K2101/40 ,  B32B15/01 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3135 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/73 ,  H01L24/742 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/98 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/03 ,  H01L2224/03001 ,  H01L2224/03009 ,  H01L2224/03318 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/03334 ,  H01L2224/0348 ,  H01L2224/03848 ,  H01L2224/03849 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0391 ,  H01L2224/04105 ,  H01L2224/05022 ,  H01L2224/051 ,  H01L2224/05294 ,  H01L2224/05547 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/056 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/10145 ,  H01L2224/11001 ,  H01L2224/11005 ,  H01L2224/11009 ,  H01L2224/111 ,  H01L2224/11318 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/1191 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13339 ,  H01L2224/13344 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13561 ,  H01L2224/13562 ,  H01L2224/13565 ,  H01L2224/136 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/1403 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16145 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/17505 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/2401 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/24146 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/75253 ,  H01L2224/81 ,  H01L2224/81138 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/8122 ,  H01L2224/81224 ,  H01L2224/81815 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/82105 ,  H01L2224/83 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841

摘要： A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

公开(公告)号：US20170221842A1

公开(公告)日：2017-08-03

申请号：US15420815

申请日：2017-01-31

申请人： Infineon Technologies AG

发明人： Roman ROTH ,  Frank HILLE ,  Hans-Joachim SCHULZE

IPC分类号： H01L23/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02181 ,  H01L2224/0219 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/03848 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/0603 ,  H01L2224/48091 ,  H01L2224/491 ,  H01L2224/4911 ,  H01L2924/00014 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2224/45099

摘要： A power semiconductor device, a power semiconductor module and a power semiconductor device processing method are provided. The power semiconductor device includes a first load terminal structure, a second load terminal structure, and a semiconductor structure electrically coupled to each load terminal structure and configured to carry a load current. The first load terminal structure includes a conductive layer in contact with the semiconductor structure, a bonding block configured to be contacted by at least one bond wire and to receive at least a part of the load current from the at least one bond wire and/or the conductive layer, a support block having a hardness greater than the hardness of the conductive layer and the bonding block. The bonding block is mounted on the conductive layer via the support block, and a zone is arranged within the conductive layer and/or the bonding block, the zone exhibiting nitrogen atoms.

公开(公告)号：US09673096B2

公开(公告)日：2017-06-06

申请号：US14541239

申请日：2014-11-14

申请人： INFINEON TECHNOLOGIES AG

发明人： Joachim Hirschler ,  Michael Roesner ,  Markus Juch Heinrici ,  Gudrun Stranzl ,  Martin Mischitz ,  Martin Zgaga

IPC分类号： H01L21/78 ,  H01L21/288 ,  H01L21/3213 ,  H01L21/683 ,  H01L23/00

CPC分类号： H01L21/78 ,  H01L21/288 ,  H01L21/3213 ,  H01L21/6835 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/94 ,  H01L24/95 ,  H01L2221/68327 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2224/03002 ,  H01L2224/03005 ,  H01L2224/03009 ,  H01L2224/0332 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03464 ,  H01L2224/03505 ,  H01L2224/03848 ,  H01L2224/039 ,  H01L2224/05794 ,  H01L2224/05847 ,  H01L2224/06181 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2221/68381

摘要： According to various embodiments, a method for processing a semiconductor substrate may include: covering a plurality of die regions of the semiconductor substrate with a metal; forming a plurality of dies from the semiconductor substrate, wherein each die of the plurality of dies is covered with the metal; and, subsequently, annealing the metal covering at least one die of the plurality of dies.

公开(公告)号：US20160247772A1

公开(公告)日：2016-08-25

申请号：US15147070

申请日：2016-05-05

申请人： Renesas Electronics Corporation

发明人： Takaomi Nishi ,  Takehiko Saito ,  Katsuhiro Torii

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L21/304 ,  H01L23/528 ,  H01L23/532

CPC分类号： H01L24/03 ,  H01L21/304 ,  H01L21/6836 ,  H01L23/3114 ,  H01L23/525 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/562 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/0346 ,  H01L2224/03464 ,  H01L2224/0381 ,  H01L2224/03828 ,  H01L2224/03848 ,  H01L2224/03849 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05084 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05562 ,  H01L2224/05569 ,  H01L2224/05644 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/9212 ,  H01L2224/94 ,  H01L2924/01024 ,  H01L2924/3512 ,  H01L2924/365 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01022 ,  H01L2924/00012 ,  H01L2224/0231 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L21/78 ,  H01L2221/68304 ,  H01L2221/68381

摘要： A manufacturing method for semiconductor devices includes the steps of forming an Ni/Au film that includes an Ni film and an Au film formed over the Ni film over a wiring that is coupled to each of a plurality of electrode pads formed over a principal surface of a semiconductor wafer and arranges each of the electrode pads at a different position, grinding a back surface of the semiconductor wafer, performing reduction treatment on a surface of the Ni/Au film, and forming a solder bump over the Ni/Au film. In the reduction treatment, respective processes of flux application, reflow soldering and cleaning are performed and the solder bump is bonded to the Ni/Au film after the reduction treatment has been completed. Thereby, bonding reliability in flip chip bonding of a semiconductor device is improved.

公开(公告)号：US09209018B2

公开(公告)日：2015-12-08

申请号：US13534491

申请日：2012-06-27

申请人： Bernard Beaumont ,  Jean-Pierre Faurie

发明人： Bernard Beaumont ,  Jean-Pierre Faurie

IPC分类号： H01L29/15 ,  H01L21/02

CPC分类号： H01L21/0242 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  H01L2224/03848

摘要： A method for forming a substrate includes forming a base layer comprising a Group III-V material on a substrate, cooling the base layer and inducing cracks in the base layer, and forming a bulk layer comprising a Group III-V material on the base layer after cooling.

摘要翻译： 一种形成衬底的方法包括在衬底上形成包含III-V族材料的基底层，冷却基底层并引起基底层中的裂纹，以及在基底层上形成包含III-V族材料的体层 冷却后。

公开(公告)号：US20150287602A1

公开(公告)日：2015-10-08

申请号：US14747150

申请日：2015-06-23

申请人： Sensor Electronic Technology, Inc.

发明人： Remigijus Gaska ,  Xuhong Hu ,  Michael Shur ,  Mikhail Gaevski

IPC分类号： H01L21/283 ,  H01S5/30 ,  H01L33/40 ,  H01S5/042 ,  H01L31/0224 ,  H01L33/00

CPC分类号： H01L21/283 ,  H01L21/28264 ,  H01L21/28575 ,  H01L23/482 ,  H01L24/03 ,  H01L24/05 ,  H01L29/43 ,  H01L29/45 ,  H01L29/452 ,  H01L29/456 ,  H01L29/4966 ,  H01L31/022425 ,  H01L33/40 ,  H01L33/405 ,  H01L33/62 ,  H01L2224/03848 ,  H01L2224/05019 ,  H01L2224/0508 ,  H01L2224/05084 ,  H01L2224/051 ,  H01L2224/05116 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2924/10323 ,  H01L2924/1033 ,  H01L2924/10334 ,  H01L2924/10344 ,  H01L2924/12032 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2933/0016 ,  H01S5/0425 ,  H01S5/3013 ,  H01L2924/00

摘要： A contact to a semiconductor including sequential layers of Cr, Ti, and Al is provided, which can result in a contact with one or more advantages over Ti/Al-based and Cr/Al-based contacts. For example, the contact can: reduce a contact resistance; provide an improved surface morphology; provide a better contact linearity; and/or require a lower annealing temperature, as compared to the prior art Ti/Al-based contacts.

摘要翻译： 提供了与包括Cr，Ti和Al的连续层的半导体的接触，其可以导致与基于Ti / Al和Cr / Al的触点相关的一个或多个优点的接触。 例如，触点可以：降低接触电阻; 提供改进的表面形态; 提供更好的接触线性; 和/或要求较低的退火温度，与现有技术的Ti / Al基触点相比。

公开(公告)号：US09153548B2

公开(公告)日：2015-10-06

申请号：US14027875

申请日：2013-09-16

申请人： LuxVue Technology Corporation

发明人： Clayton Ka Tsun Chan ,  Andreas Bibl

IPC分类号： H01L27/15 ,  H01L23/00 ,  H01L25/075 ,  H01L33/00

CPC分类号： H01L24/00 ,  B81C1/00873 ,  B81C2201/0194 ,  H01L21/6835 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0753 ,  H01L27/156 ,  H01L33/0079 ,  H01L2221/68368 ,  H01L2224/0345 ,  H01L2224/03848 ,  H01L2224/04026 ,  H01L2224/05016 ,  H01L2224/05023 ,  H01L2224/05083 ,  H01L2224/05117 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/0519 ,  H01L2224/05562 ,  H01L2224/05564 ,  H01L2224/05568 ,  H01L2224/05638 ,  H01L2224/05644 ,  H01L2224/05669 ,  H01L2224/05688 ,  H01L2224/06181 ,  H01L2224/2745 ,  H01L2224/29005 ,  H01L2224/29007 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/32145 ,  H01L2224/32227 ,  H01L2224/83005 ,  H01L2224/83409 ,  H01L2224/83411 ,  H01L2224/83444 ,  H01L2224/83815 ,  H01L2224/83825 ,  H01L2224/8383 ,  H01L2224/9212 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1421 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01079 ,  H01L2924/01032 ,  H01L2924/01028 ,  H01L2924/0781 ,  H01L2224/034 ,  H01L2224/274 ,  H01L2924/014 ,  H01L2224/83

摘要： A method and structure for forming an array of micro devices is disclosed. An array of micro devices is formed over an array of stabilization posts included in a stabilization layer. Patterned sacrificial spacers are formed between the stabilization posts and between the micro devices. The patterned sacrificial spacers are disposed upon the patterned sacrificial spacers.

摘要翻译： 公开了一种用于形成微器件阵列的方法和结构。 在包括在稳定层中的稳定柱的阵列上形成微器件阵列。 图案化的牺牲间隔物形成在稳定柱之间和微型器件之间。 图案化的牺牲隔离物设置在图案化的牺牲间隔物上。