Patent search cpc:"H01L2924/10334" Page 1

1.

发明授权
Chromium/titanium/aluminum-based semiconductor device contact fabrication 有权
Title translation: 铬/钛/铝基半导体器件接触制造

公开(公告)号：US09514947B2

公开(公告)日：2016-12-06

申请号：US14747150

申请日：2015-06-23

Applicant: Sensor Electronic Technology, Inc.

Inventor： Remigijus Gaska , Xuhong Hu , Michael Shur , Mikhail Gaevski

IPC: H01L29/43 , H01L29/45 , H01L21/283 , H01L31/0224 , H01L33/40 , H01S5/042 , H01S5/30 , H01L23/482 , H01L23/00 , H01L33/62

CPC classification number: H01L21/283 , H01L21/28264 , H01L21/28575 , H01L23/482 , H01L24/03 , H01L24/05 , H01L29/43 , H01L29/45 , H01L29/452 , H01L29/456 , H01L29/4966 , H01L31/022425 , H01L33/40 , H01L33/405 , H01L33/62 , H01L2224/03848 , H01L2224/05019 , H01L2224/0508 , H01L2224/05084 , H01L2224/051 , H01L2224/05116 , H01L2224/05124 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05644 , H01L2924/10323 , H01L2924/1033 , H01L2924/10334 , H01L2924/10344 , H01L2924/12032 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2933/0016 , H01S5/0425 , H01S5/3013 , H01L2924/00

Abstract: A contact to a semiconductor including sequential layers of Cr, Ti, and Al is provided, which can result in a contact with one or more advantages over Ti/Al-based and Cr/Al-based contacts. For example, the contact can: reduce a contact resistance; provide an improved surface morphology; provide a better contact linearity; and/or require a lower annealing temperature, as compared to the prior art Ti/Al-based contacts.

Abstract translation: 提供了与包括Cr，Ti和Al的连续层的半导体的接触，其可以导致与基于Ti / Al和Cr / Al的触点相关的一个或多个优点的接触。例如，触点可以：降低接触电阻; 提供改进的表面形态; 提供更好的接触线性; 和/或要求较低的退火温度，与现有技术的Ti / Al基触点相比。

2.

发明授权
Electronic devices with yielding substrates 有权

公开(公告)号：US09426860B2

公开(公告)日：2016-08-23

申请号：US14976698

申请日：2015-12-21

Applicant: Michael A. Tischler , Philippe M. Schick , Ian Ashdown , Calvin Wade Sheen , Paul Jungwirth

Inventor： Michael A. Tischler , Philippe M. Schick , Ian Ashdown , Calvin Wade Sheen , Paul Jungwirth

IPC: H01L21/66 , H01L33/00 , H05B33/08 , F21K99/00 , H01L31/0468 , H01L31/042

CPC classification number: F21K9/66 , F21K9/20 , F21K9/275 , F21K9/278 , F21K9/64 , F21K9/65 , F21V3/02 , F21V9/30 , F21V23/003 , F21V23/02 , F21V29/74 , F21Y2115/10 , G02F1/133603 , H01L23/367 , H01L23/4985 , H01L23/5387 , H01L24/32 , H01L24/83 , H01L25/0753 , H01L27/156 , H01L31/0468 , H01L33/0025 , H01L33/06 , H01L33/08 , H01L33/28 , H01L33/30 , H01L33/32 , H01L33/36 , H01L33/483 , H01L33/486 , H01L33/502 , H01L33/505 , H01L33/58 , H01L33/60 , H01L33/62 , H01L51/0097 , H01L2224/06102 , H01L2224/16225 , H01L2224/2929 , H01L2224/32225 , H01L2224/73204 , H01L2224/83385 , H01L2224/83851 , H01L2225/107 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01058 , H01L2924/01063 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/07802 , H01L2924/07811 , H01L2924/10253 , H01L2924/10321 , H01L2924/10322 , H01L2924/10323 , H01L2924/10324 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/381 , H02S30/00 , H05B33/0854 , H05B37/0218 , H05B37/0227 , H05B37/0245 , H05K1/189 , H05K3/323 , H05K2201/09036 , H05K2201/10106 , H05K2203/302 , H01L2924/01015 , H01L2924/01031 , H01L2924/01051 , H01L2924/3512 , H01L2924/00 , H01L2924/00014

Abstract: In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.

3.

发明申请
METHOD FOR APPLYING A BONDING LAYER 有权
Title translation: 应用粘结层的方法

公开(公告)号：US20160190092A1

公开(公告)日：2016-06-30

申请号：US14909157

申请日：2013-09-13

Applicant: EV GROUP E. THALLNER GMBH

Inventor： Markus WIMPLINGER

IPC: H01L23/00 , B81C3/00

CPC classification number: H01L24/83 , B81C3/001 , B81C2203/036 , H01L24/29 , H01L24/32 , H01L2224/29082 , H01L2224/291 , H01L2224/29105 , H01L2224/29111 , H01L2224/29116 , H01L2224/29117 , H01L2224/29118 , H01L2224/29123 , H01L2224/29124 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/29155 , H01L2224/29157 , H01L2224/2916 , H01L2224/29166 , H01L2224/29169 , H01L2224/29171 , H01L2224/29184 , H01L2224/32145 , H01L2224/32507 , H01L2224/8302 , H01L2224/83022 , H01L2224/8381 , H01L2224/83894 , H01L2924/01003 , H01L2924/01005 , H01L2924/01011 , H01L2924/01012 , H01L2924/01019 , H01L2924/0102 , H01L2924/01034 , H01L2924/01037 , H01L2924/01038 , H01L2924/0105 , H01L2924/01052 , H01L2924/01055 , H01L2924/01056 , H01L2924/01322 , H01L2924/10251 , H01L2924/10252 , H01L2924/10253 , H01L2924/1026 , H01L2924/10271 , H01L2924/10272 , H01L2924/10323 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/10336 , H01L2924/10346 , H01L2924/1037 , H01L2924/10371 , H01L2924/10372 , H01L2924/10373 , H01L2924/10375 , H01L2924/10376 , H01L2924/10377 , H01L2924/10821 , H01L2924/10823 , H01L2924/10831 , H01L2924/00 , H01L2924/00014 , H01L2924/01032 , H01L2924/01013 , H01L2924/01031 , H01L2924/0103

Abstract: A method for applying a bonding layer that is comprised of a basic layer and a protective layer on a substrate with the following method steps: application of an oxidizable basic material as a basic layer on a bonding side of the substrate, at least partial covering of the basic layer with a protective material that is at least partially dissolvable in the basic material as a protective layer. In addition, the invention relates to a corresponding substrate.

Abstract translation: 一种通过以下方法将基底层和保护层构成的接合层施加于基板上的方法：将可氧化碱性材料作为基底层施加到基板的粘接侧，至少部分覆盖具有至少部分可溶解在作为保护层的基础材料中的保护材料的基础层。此外，本发明涉及相应的基板。

4.

发明授权
Method for fabricating a semiconductor package with conductive carrier integrated heat spreader 有权
Title translation: 用导电载体集成散热器制造半导体封装的方法

公开(公告)号：US09269655B2

公开(公告)日：2016-02-23

申请号：US14825382

申请日：2015-08-13

Applicant: International Rectifier Corporation

Inventor： Eung San Cho , Andrew N. Sawle , Mark Pavier , Daniel Cutler

IPC: H01L21/44 , H01L21/48 , H01L21/50 , H01L23/495 , H01L25/00 , H01L25/07 , H01L23/00

CPC classification number: H01L21/84 , H01L21/4825 , H01L21/4871 , H01L21/561 , H01L23/3121 , H01L23/49562 , H01L23/49568 , H01L23/49575 , H01L24/16 , H01L24/24 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/82 , H01L24/83 , H01L24/92 , H01L25/072 , H01L25/117 , H01L25/16 , H01L25/18 , H01L25/50 , H01L2224/16245 , H01L2224/24137 , H01L2224/24245 , H01L2224/29101 , H01L2224/2929 , H01L2224/32245 , H01L2224/73259 , H01L2224/73267 , H01L2224/8382 , H01L2224/8384 , H01L2224/92224 , H01L2224/92244 , H01L2924/10253 , H01L2924/10323 , H01L2924/10325 , H01L2924/1033 , H01L2924/10334 , H01L2924/10341 , H01L2924/10344 , H01L2924/10346 , H01L2924/10355 , H01L2924/10356 , H01L2924/10357 , H01L2924/10358 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/1426 , H01L2924/1815 , H01L2924/00 , H01L2924/0665 , H01L2924/00014 , H01L2924/014

Abstract: In one implementation, a semiconductor package includes a control conductive carrier having a die side and an opposite input/output (I/O) side connecting the semiconductor package to a mounting surface. The semiconductor package also includes a control FET of a power converter switching stage having a control drain attached to the die side of the control conductive carrier. The control conductive carrier is configured to sink heat produced by the control FET into the mounting surface. The semiconductor package includes a sync conductive carrier having another die side and another opposite I/O side connecting the semiconductor package to the mounting surface, and a sync FET of the power converter switching stage having a sync source attached to the die side of the sync conductive carrier.

Abstract translation: 在一个实施方案中，半导体封装包括具有裸片侧的控制导电载体和将半导体封装连接到安装表面的相反的输入/输出（I / O）侧。半导体封装还包括功率转换器开关级的控制FET，其具有附着到控制导电载体的管芯侧的控制漏极。控制导电载体被配置为将由控制FET产生的热量吸收到安装表面中。半导体封装包括具有另一管芯侧的同步导电载体和将半导体封装连接到安装表面的另一个相反的I / O侧，以及功率转换器开关级的同步FET，其具有连接到同步的管芯侧的同步源导电载体。

5.

发明授权
Electronic devices with yielding substrates 有权
Title translation: 具有屈服底物的电子设备

公开(公告)号：US09054290B2

公开(公告)日：2015-06-09

申请号：US14456573

申请日：2014-08-11

Applicant: Michael A. Tischler , Philippe M. Schick , Ian Ashdown , Calvin Wade Sheen , Paul Jungwirth

Inventor： Michael A. Tischler , Philippe M. Schick , Ian Ashdown , Calvin Wade Sheen , Paul Jungwirth

IPC: H01L33/00 , H01L21/00 , H01L33/62 , H05K3/32 , H01L33/60 , H01L33/08 , H01L33/32 , H01L33/50 , H01L33/58 , H01L27/15 , H01L23/367 , H01L23/498 , H01L23/00 , H01L33/48 , H05K1/18 , G02F1/1335

CPC classification number: F21K9/66 , F21K9/20 , F21K9/275 , F21K9/278 , F21K9/64 , F21K9/65 , F21V3/02 , F21V9/30 , F21V23/003 , F21V23/02 , F21V29/74 , F21Y2115/10 , G02F1/133603 , H01L23/367 , H01L23/4985 , H01L23/5387 , H01L24/32 , H01L24/83 , H01L25/0753 , H01L27/156 , H01L31/0468 , H01L33/0025 , H01L33/06 , H01L33/08 , H01L33/28 , H01L33/30 , H01L33/32 , H01L33/36 , H01L33/483 , H01L33/486 , H01L33/502 , H01L33/505 , H01L33/58 , H01L33/60 , H01L33/62 , H01L51/0097 , H01L2224/06102 , H01L2224/16225 , H01L2224/2929 , H01L2224/32225 , H01L2224/73204 , H01L2224/83385 , H01L2224/83851 , H01L2225/107 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01058 , H01L2924/01063 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/07802 , H01L2924/07811 , H01L2924/10253 , H01L2924/10321 , H01L2924/10322 , H01L2924/10323 , H01L2924/10324 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/381 , H02S30/00 , H05B33/0854 , H05B37/0218 , H05B37/0227 , H05B37/0245 , H05K1/189 , H05K3/323 , H05K2201/09036 , H05K2201/10106 , H05K2203/302 , H01L2924/01015 , H01L2924/01031 , H01L2924/01051 , H01L2924/3512 , H01L2924/00 , H01L2924/00014

Abstract: In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.

Abstract translation: 根据某些实施例，尽管半导体管芯的表面具有任何非平面性或半导体管芯接触件的非共面性，半导体管芯也用压力激活的粘合剂直接粘附到屈服基底上。

6.

发明授权
Semiconductor package with multiple conductive clips 有权
Title translation: 半导体封装带多个导电夹

公开(公告)号：US08987883B2

公开(公告)日：2015-03-24

申请号：US14192756

申请日：2014-02-27

Applicant: International Rectifier Corporation

Inventor： Eung San Cho , Chuan Cheah

IPC: H01L23/495 , H01L23/00

CPC classification number: H01L23/49517 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L24/37 , H01L24/40 , H01L24/48 , H01L24/49 , H01L25/165 , H01L2224/0603 , H01L2224/371 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/48091 , H01L2224/48106 , H01L2224/48137 , H01L2224/48247 , H01L2224/49111 , H01L2224/84801 , H01L2224/8485 , H01L2924/00014 , H01L2924/01029 , H01L2924/10323 , H01L2924/1033 , H01L2924/10334 , H01L2924/10344 , H01L2924/10346 , H01L2924/13091 , H01L2924/14 , H01L2924/1426 , H01L2924/181 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099

Abstract: One exemplary disclosed embodiment comprises a high power semiconductor package configured as a buck converter having a control transistor and a sync transistor disposed on a common leadframe pad, a driver integrated circuit (IC) for driving the control and sync transistors, and conductive clips electrically coupling the top surfaces of the transistors to substrate pads such as leadframe pads. In this manner, the leadframe and the conductive clips provide efficient grounding or current conduction by direct mechanical connection and large surface area conduction, thereby enabling a package with significantly reduced electrical resistance, form factor, complexity, and cost when compared to conventional packaging methods using wirebonds for transistor interconnections.

Abstract translation: 一个示例性的公开的实施例包括被配置为具有控制晶体管和设置在公共引线框焊盘上的同步晶体管的降压转换器的高功率半导体封装，用于驱动控制和同步晶体管的驱动器集成电路（IC）晶体管的顶表面到衬底焊盘，例如引线框焊盘。以这种方式，引线框架和导电夹子通过直接机械连接和大的表面积传导提供有效的接地或电流传导，从而与使用以下的传统封装方法相比，能够实现具有显着降低的电阻，形状因素，复杂性和成本的封装用于晶体管互连的引线。

7.

发明授权
Electronic devices with yielding substrates 有权
Title translation: 具有屈服底物的电子设备

公开(公告)号：US08907370B2

公开(公告)日：2014-12-09

申请号：US14169384

申请日：2014-01-31

Applicant: Michael A. Tischler , Philippe M. Schick , Ian Ashdown , Calvin Wade Sheen , Paul Jungwirth

Inventor： Michael A. Tischler , Philippe M. Schick , Ian Ashdown , Calvin Wade Sheen , Paul Jungwirth

IPC: H01L33/00 , H01L21/00

CPC classification number: F21K9/66 , F21K9/20 , F21K9/275 , F21K9/278 , F21K9/64 , F21K9/65 , F21V3/02 , F21V9/30 , F21V23/003 , F21V23/02 , F21V29/74 , F21Y2115/10 , G02F1/133603 , H01L23/367 , H01L23/4985 , H01L23/5387 , H01L24/32 , H01L24/83 , H01L25/0753 , H01L27/156 , H01L31/0468 , H01L33/0025 , H01L33/06 , H01L33/08 , H01L33/28 , H01L33/30 , H01L33/32 , H01L33/36 , H01L33/483 , H01L33/486 , H01L33/502 , H01L33/505 , H01L33/58 , H01L33/60 , H01L33/62 , H01L51/0097 , H01L2224/06102 , H01L2224/16225 , H01L2224/2929 , H01L2224/32225 , H01L2224/73204 , H01L2224/83385 , H01L2224/83851 , H01L2225/107 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01058 , H01L2924/01063 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/07802 , H01L2924/07811 , H01L2924/10253 , H01L2924/10321 , H01L2924/10322 , H01L2924/10323 , H01L2924/10324 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/15787 , H01L2924/381 , H02S30/00 , H05B33/0854 , H05B37/0218 , H05B37/0227 , H05B37/0245 , H05K1/189 , H05K3/323 , H05K2201/09036 , H05K2201/10106 , H05K2203/302 , H01L2924/01015 , H01L2924/01031 , H01L2924/01051 , H01L2924/3512 , H01L2924/00 , H01L2924/00014

Abstract: In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.

Abstract translation: 根据某些实施例，尽管半导体管芯的表面具有任何非平面性或半导体管芯接触件的非共面性，半导体管芯也用压力激活的粘合剂直接粘附到屈服基底上。

8.

发明授权
Bonding method 有权
Title translation: 粘合方法

公开(公告)号：US08641859B2

公开(公告)日：2014-02-04

申请号：US13131756

申请日：2009-11-30

Applicant: Franz Richter

Inventor： Franz Richter

IPC: B29C65/52

CPC classification number: H01L21/6835 , B32B37/1018 , B32B37/12 , B32B2457/14 , H01L21/67132 , H01L2221/6834 , H01L2224/2929 , H01L2924/0002 , H01L2924/10253 , H01L2924/10321 , H01L2924/10322 , H01L2924/10323 , H01L2924/10324 , H01L2924/10325 , H01L2924/10326 , H01L2924/10327 , H01L2924/10328 , H01L2924/10329 , H01L2924/1033 , H01L2924/10331 , H01L2924/10332 , H01L2924/10333 , H01L2924/10334 , H01L2924/10335 , H01L2924/157 , H01L2924/15788

Abstract: The invention relates to a method for bonding a first surface (1a) and a second surface (7a) by means of an interlayer (3), comprising the steps: a) providing a first item (1) which has the first surface (1a), b) providing flowable, solidifiable material for the interlayer (3), c) providing a second item (7) which has the second surface (7a), d) applying the material for the interlayer onto the first surface (1a) so that a bulge (3a) encircling the surface is produced, e) applying a vacuum around the first item (1) and the second item (2), f) bringing the second surface (7a) of the second item (7) into contact with the circumferential bulge so that a sealed-off cavity (5) is produced, g) increasing the ambient pressure so that the cavity (5) is eliminated without resulting in a stream of gas flowing into the cavity and h) increasing the viscosity of the material for the interlayer.

Abstract translation: 本发明涉及一种通过中间层（3）将第一表面（1a）和第二表面（7a）接合的方法，包括以下步骤：a）提供具有第一表面（1a）的第一项目（1）），b）为中间层（3）提供可流动的，可固化的材料，c）提供具有第二表面（7a）的第二项目（7），d）将用于中间层的材料施加到第一表面（1a）上产生环绕表面的凸起（3a），e）围绕第一物品（1）和第二物品（2）施加真空，f）使第二物品（7）的第二表面（7a）接触具有周向凸起，使得产生密封空腔（5），g）增加环境压力，使得消除空腔（5），而不会导致流入空腔的气流，并且h）增加中间层材料。

9.

发明申请
High Power Semiconductor Package with Conductive Clip on Multiple Transistors 有权
Title translation: 大功率半导体封装，多个晶体管导电夹

公开(公告)号：US20120168923A1

公开(公告)日：2012-07-05

申请号：US13095247

申请日：2011-04-27

Applicant: Eung San Cho , Chuan Cheah

Inventor： Eung San Cho , Chuan Cheah

IPC: H01L23/495

CPC classification number: H01L23/49517 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L24/37 , H01L24/40 , H01L24/48 , H01L24/49 , H01L25/165 , H01L2224/0603 , H01L2224/371 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/48091 , H01L2224/48106 , H01L2224/48137 , H01L2224/48247 , H01L2224/49111 , H01L2224/84801 , H01L2224/8485 , H01L2924/00014 , H01L2924/01029 , H01L2924/10323 , H01L2924/1033 , H01L2924/10334 , H01L2924/10344 , H01L2924/10346 , H01L2924/13091 , H01L2924/14 , H01L2924/1426 , H01L2924/181 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45099

Abstract: One exemplary disclosed embodiment comprises a high power semiconductor package configured as a buck converter having a control transistor, a sync transistor, a driver integrated circuit (IC) for driving the control and sync transistors, and a conductive clip extending from a sync drain on a top surface of the sync transistor to a control source on a top surface of the control transistor. The conductive clip may also connect to substrate pads such as a leadframe pad for current input and output. In this manner, the conductive clip provides an efficient connection between the control source and the sync drain by direct mechanical connection and large surface area conduction, thereby enabling a package with significantly reduced electrical resistance, form factor, complexity, and cost when compared to conventional packaging methods using wirebonds for transistor interconnections.

Abstract translation: 一个示例性的公开的实施例包括被配置为具有控制晶体管，同步晶体管，用于驱动控制和同步晶体管的驱动器集成电路（IC））的降压转换器的高功率半导体封装，以及从同步漏极同步晶体管的顶表面到控制晶体管的顶表面上的控制源。导电夹子还可以连接到衬底焊盘，例如用于电流输入和输出的引线框焊盘。以这种方式，导电夹子通过直接机械连接和大的表面积导通来提供控制源和同步漏极之间的有效连接，从而与常规的相比，能够实现具有显着降低的电阻，形状因子，复杂性和成本的封装封装方法使用引线用于晶体管互连。